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Giovanni VERZELLESI

Professore Ordinario presso: Dipartimento di Scienze e Metodi dell'Ingegneria


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Pubblicazioni

2019 - Effects of mole fraction variations and scaling on total variability in InGaAs MOSFETs [Articolo su rivista]
Zagni, N.; Puglisi, F. M.; Pavan, P.; Verzellesi, G.
abstract

Variability is one of the major roadblocks for III-V semiconductors in nanoscale devices, according to the recent International Roadmap for Devices and Systems (IRDS). A particular concern is the detrimental effect of variability of threshold voltage due to channel compositional variations. In this paper, we investigate the impact of this variability source and the effects of scaling on the performance of Dual-Gate-Ultra-Thin-Body (DG-UTB) In0.53Ga0.47As MOSFETs. We model mole fraction variations in terms of the Indium content by taking into account the spatial inhomogeneity of the channel and the corresponding bandgap variations, analyzing the effects on threshold voltage variability. We thus define a variability source, i.e., Band Gap Fluctuation (BGF), and we compare the associated variability with the ones from other important sources, namely, Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (B-LER and G-LER). We then define three corner cases for mole fraction variations to determine worst-case variability. Finally, the impact of scaling on variability is assessed by comparing results for two technology nodes on the linear and saturation threshold voltage, V-T,V-lin,V- V-T,V-sat, on-current, I-ON, leakage current, I-OFF, and linear and saturation sub-threshold slope, SS. We find that although scaling has no impact on BGF-induced V-T variability, it increases the total V-T, lin variability as well as that for I-ON and I-OFF.


2019 - Insights into the off-state breakdown mechanisms in power GaN HEMTs [Articolo su rivista]
Zagni, Nicolo'; Puglisi, F. M.; Pavan, P.; Chini, A.; Verzellesi, G.
abstract

We analyze the off-state, three-terminal, lateral breakdown in AlGaN/GaN HEMTs for power switching applications by comparing two-dimensional numerical device simulations with experimental data from device structures with different gate-to-drain spacing and with either undoped or Carbon-doped GaN buffer layer. Our simulations reproduce the different breakdown-voltage dependence on the gate-drain-spacing exhibited by the two types of device and attribute the breakdown to: i) a combination of gate electron injection and source-drain punch-through in the undoped HEMTs; and ii) avalanche generation triggered by gate electron injection in the C-doped HEMTs.


2019 - The Role of Carbon Doping on Breakdown, Current Collapse and Dynamic On-Resistance Recovery in AlGaN/GaN High Electron Mobility Transistors on Semi‐Insulating SiC Substrates [Articolo su rivista]
Zagni, Nicolò; Chini, Alessandro; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

In this work, the critical role of carbon doping in the electrical behavior of AlGaN/GaN High Electron Mobility Transistors (HEMTs) on semi-insulating SiC substrates is assessed by investigating the off-state three terminal breakdown, current collapse and dynamic on-resistance recovery at high drain-source voltages. Extensive device simulations of typical GaN HEMT structures are carried out and compared to experimental data from published, state-of-the-art technologies to: i) explain the slope of the breakdown voltage as a function of the gate-to-drain spacing lower than GaN critical electric field as a result of the non-uniform electrical field distribution in the gate-drain access region; ii) attribute the drain current collapse to trapping in deep acceptor states in the buffer associated with carbon doping; iii) interpret the partial dynamic on-resistance recovery after off-state stress at high drain-source voltages as a consequence of hole generation and trapping.


2018 - Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon [Articolo su rivista]
Pradeepkumar, Aiswarya; Zielinski, Marcin; Bosi, Matteo; Verzellesi, Giovanni; Gaskill, D. Kurt; Iacopi, Francesca
abstract

Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures.


2018 - On the impact of channel compositional variations on total threshold voltage variability in nanoscale InGaAs MOSFETs [Relazione in Atti di Convegno]
Zagni, Nicolo; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

In this paper we present an analysis of the impact of channel compositional variations on the total threshold voltage variability in nanoscale III-V MOSFETs. The analysis is carried out on a template Dual-Gate Ultra-Thin Body (DG-UTB) MOSFET through TCAD simulations in Sentaurus by Synopsys. The Impedance Field Method (IFM) is employed to evaluate statistical variability for five different sources: Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (B-LER and G-LER) and Band Gap Fluctuation (BGF). BGF arises due to the compositional variations of Indium in the compound semiconductor composing the channel, namely InGaAs. Our analysis shows that, by appropriately modeling band gap fluctuations, it is possible to identify a worst-case total relative Vt variability for different amounts of Indium mole fraction variations, providing technologists with an important reference. Side-effects of channel compositional variations on other variability sources are evaluated as well, and are found to have a non-negligible impact on B-LER only.


2018 - Optimization of 0.25µm GaN HEMTs through numerical simulations [Relazione in Atti di Convegno]
Chini, Alessandro; Verzellesi, Giovanni; Lanzieri, Claudio; Pantellini, Alessio; Rzin, Mehdi; Rampazzo, Fabiana; Meneghini, Matteo; Meneghesso, Gaudenzio; Zanoni, Enrico
abstract

0.25µm GaN HEMTs performance dependence from epitaxial and geometrical parameters has been investigated by means of numerical simulations. A single-heterojunction GaN HEMT structure with an iron doped buffer layer also including a mushroom-gate layout forming a gate-connected field-plate over the device SiN passivation layer was considered. Numerical simulations including static-IV characteristics and breakdown voltage estimation, small signal analysis and double pulse-IV characteristics have been carried out on more than 400 different structures. Simulations results showed that contact resistance, gate-source spacing, barrier thickness and AlGaN/SiN interface trap density are critical for improving device RF gain. Field-plate extension and passivation layer thickness were found to be parameters that can be used for trading off between device breakdown voltage and RF gain. Increasing iron-doping in the buffer layer leaded to larger breakdown voltage and RF gain but, due to the enhanced trapping effects, also to poorer large-signal operation.


2018 - Physical mechanisms limiting the performance and the reliability of GaN-based LEDs [Capitolo/Saggio]
De Santi, Carlo; Meneghini, Matteo; Tibaldi, Alberto; Vallone, Marco; Goano, Michele; Bertazzi, Francesco; Verzellesi, Giovanni; Meneghesso, Gaudenzio; Zanoni, Enrico
abstract

GaN-based optoelectronic devices are the market standard for light emission in the blue-green visible range, and the emission wavelengths are rapidly approaching the UV part of the electromagnetic spectrum. Given the complexity of their structure, composed of multiple quantum wells (MQWs), carrier blocking layers, nucleation layers, and strain relief structures for the reduction of the strain caused by the hetero-epitaxial growth, the analysis of the mechanisms influencing their performance is not straightforward, and often involves the use of computer-assisted simulations.The dynamics of the loss mechanisms may significantly change during the operation of the devices, resulting in the worsening of the overall optical and electrical properties. The generation of defects inside the active region, enhanced by the temperature and the bias level, affects the trap-assisted tunneling current components and the amount of non-radiative recombination. The diffusion of impurities/point defects, often originating from the p-side of the device, may lead to an increase in the non-radiative recombination components.The first part of this chapter describes the main processes that influence the optical and electrical behavior of the devices below and above the optical turn-on, along with their theoretical framework and a brief review of the literature on the topic. In the second part, we present a comprehensive analysis of diffusion-related degradation processes, based on previous literature reports. Finally, we present a discussion on the possible physical models able to explain experimental data on degradation of GaN-based optoelectronic devices.


2017 - A novel test methodology for RONand VTHmonitoring in GaN HEMTs during switch-mode operation [Relazione in Atti di Convegno]
Iucolano, Ferdinando; Parisi, Antonino; Reina, Santo; Meneghesso, Gaudenzio; Verzellesi, Giovanni; Chini, Alessandro
abstract

One of the critical issues limiting the performances and reliability of GaN power devices is the degradation of their on-resistance (Ron) when they are operated at high drain-source voltages. Being able to monitor RON variation during device operation thus becomes a necessary task in order to investigate the physical mechanisms leading to the observed drifts. Standard measurement equipment does not allow to perform easily this task, specifically when Ron variation should be monitored when the device operates in switch-mode. Moreover, to better understand the physical mechanisms involved it is very important to monitor other device parameters such as its threshold-voltage VTH which is typically not monitored during device switch-mode operation. Therefore, in this work is presented a novel testing methodology which allows the simultaneous monitoring of device Ron and Vth during switchmode operation with the ability to capture the variation of said parameters starting from the very first switching cycles.


2017 - A pixelated x-ray detector for diffraction imaging at next-generation high-rate FEL sources [Relazione in Atti di Convegno]
Lodola, L.; Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Forti, F.; Casarosa, G.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benkechkache, M. A.; Dalla Betta, G. -F.; Mendicino, R.; Pancheri, L.; Verzellesi, G.; Xu, H.
abstract

The PixFEL collaboration has developed the building blocks for an X-ray imager to be used in applications at FELs. In particular, slim edge pixel detectors with high detection efficiency over a broad energy range, from 1 to 12 keV, have been developed. Moreover, a multichannel readout chip, called PFM2 (PixFEL front-end Matrix 2) and consisting of 32 × 32 cells, has been designed and fabricated in a 65 nm CMOS technology. The pixel pitch is 110 μm, the overall area is around 16 mm2. In the chip, different solutions have been implemented for the readout channel, which includes a charge sensitive amplifier (CSA) with dynamic signal compression, a time-variant shaper and an A-To-D converter with a 10 bit resolution. The CSA can be configured in four different gain modes, so as to comply with photon energies in the 1 to 10 keV range. The paper will describe in detail the channel architecture and present the results from the characterization of PFM2. It will discuss the design of a new version of the chip, called PFM3, suitable for post-processing with peripheral, under-pad through silicon vias (TSVs), which are needed to develop four-side buttable chips and cover large surfaces with minimum inactive area.


2017 - A wireless personal sensor node for real time dosimetry of interventional radiology operators [Relazione in Atti di Convegno]
Magalotti, Daniel; Placidi, Pisana; Fabiani, Stefania; Bissi, Lucia; Paolucci, Massimiliano; Scorzoni, Andrea; Calandra, Andrea; Verzellesi, Giovanni; Servoli, Leonello
abstract

Wireless Sensor Networks (WSN) featuring portable devices are widely used for healthcare applications such as real time patient monitoring. In this paper the attention has been focused on dose monitoring of Interventional Radiology operators by describing the design of a dedicated WSN for real time monitoring. The performances of the network have been evaluated inside the operating room showing that it is possible to achieve data delivery in clinical environments. Data have been acquired during medical Interventional Radiology procedures making use of a final prototype ("Prototype2"), a non-miniaturized prototype (Prototype1) and a reference acquisition system ("Demo2") with the aim to compare their performance and to show the correct functionality of the prototypes during operating conditions.


2017 - Combined variability/sensitivity analysis in III-V and silicon FETs for future technological nodes [Relazione in Atti di Convegno]
Zagni, Nicolo'; Puglisi, Francesco Maria; Verzellesi, Giovanni; Pavan, Paolo
abstract

In this paper, we present a combined analysis of variability and sensitivity effects on electrical characteristics of In0.53Ga0.47As and Si ultra-scaled devices with LG= 15 nm. Two different structures, namely Dual-Gate and FinFET, are analyzed for both channel materials. Variability sources considered in this work are Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body-and Gate-Line Edge Roughness (LER). Sensitivity is assessed by varying process parameters, namely gate length, channel thickness, oxide thickness, and channel doping. Results show that variability in lnGaAs is dominated by both WFF and Body-LER, whereas WFF only dominates in Si devices. Moreover, control over gate length and channel thickness in In0.53Ga0.47As technology is fundamental in order to keep variability under reasonable values, with FinFET showing slightly better results than Dual-Gate structure. Variability is a major challenge for the industrial introduction of In0.53Ga0.47As, which could limit the alleged superior performance of In0.53Ga0.47As over Si.


2017 - Comprehensive Capacitance-Voltage Simulation and Extraction Tool Including Quantum Effects for High-k on SixGe1-x and InxGa1-xAs: Part I-Model Description and Validation [Articolo su rivista]
Anwar, Sarkar R. M.; Vandenberghe, William G.; Bersuker, Gennadi; Veksler, Dmitry; Verzellesi, Giovanni; Morassi, Luca; Galatage, Rohit V.; Jha, Sumit; Buie, Creighton; Barton, Adam T.; Vogel, Eric M.; Hinkle, Christopher L.
abstract

High-mobility alternative channel materials to silicon are critical to the continued scaling of MOS devices. The analysis of capacitance-voltage (C-V) measurements on these new materials with high-k gate dielectrics is a critical technique to determine many important gate-stack parameters. While there are very useful C-V analysis tools available to the community, these tools are all limited in their applicability to alternative semiconductor channel MOS gate-stack analysis since they were developed for silicon. Here, we report on a new comprehensive C-V simulation and extraction tool, called CV Alternative Channel Extraction (ACE), that incorporates a wide range of semiconductors and dielectrics with the capability to implement customized gate stacks. Fermi-Dirac carrier statistics, nonparabolic bands, and quantum mechanical effects are all implemented with options to turn each of these off as the user desires. Interface state capacitance (Cit) is implemented using a common model for systems like Si and Ge. A more complex Cit model is also implemented for III-Vs that accurately captures frequency dispersion in accumulation that arises from tunneling. CV ACE enables extremely fast simulation and extraction and can accommodate measurements performed at variable temperatures and frequencies to allow for a more accurate extraction of interface state density (Dit).


2017 - Comprehensive Capacitance-Voltage Simulation and Extraction Tool Including Quantum Effects for High-k on SixGe1-x and InxGa1-xAs: Part II-Fits and Extraction from Experimental Data [Articolo su rivista]
Anwar, Sarkar R. M.; Vandenberghe, William G.; Bersuker, Gennadi; Veksler, Dmitry; Verzellesi, Giovanni; Morassi, Luca; Galatage, Rohit V.; Jha, Sumit; Buie, Creighton; Barton, Adam T.; Vogel, Eric M.; Hinkle, Christopher L.
abstract

Capacitance-voltage (C-V) measurement and analysis is highly useful for determining important information about MOS gate stacks. Parameters such as the equivalent oxide thickness (EOT), substrate doping density, flatband voltage, fixed oxide charge, density of interface traps (Dit), and effective gate work function can all be extracted from experimental C-V curves. However, to extract these gate-stack parameters accurately, the correct models must be utilized. In Part I, we described the modeling and implementation of a C-V code that can be used for alternative channel semiconductors in conjunction with high-k gate dielectrics and metal gates. Importantly, this new code (CV ACE) includes the effects of nonparabolic bands and quantum capacitance, enabling accurate models to be applied to experimental C-V curves. In this paper, we demonstrate the capabilities of this new code to extract accurate parameters, including EOT and Dit profiles from experimental high-k on Ge and In0.53Ga0.47As gate stacks.


2017 - Modelling nanoscale n-MOSFETs with III-V compound semiconductor channels: From advanced models for band structures, electrostatics and transport to TCAD [Relazione in Atti di Convegno]
Caruso, E.; Carapezzi, S.; Visciarelli, M.; Gnani, E.; Zagni, N.; Pavan, P.; Palestri, P.; Esseni, D.; Gnudi, A.; Reggiani, S.; Puglisi, F. M.; Verzellesi, G.; Selmi, L
abstract

We review a few state of the art solutions and recent developments to model short channel III-V compound semiconductor n-MOSFETs based on full quantum transport, semiclassical multi-valley / multi-subband transport and TCAD models. The pros and cons of each, and the insights they can deliver, are illustrated with examples from recent technology developments and literature. Areas where improvements and implementations at TCAD level are most necessary are highlighted as well.


2017 - Modelling of GaN HEMTs: From Device-Level Simulation to Virtual Prototyping [Capitolo/Saggio]
Curatola, Gilberto; Verzellesi, Giovanni
abstract

We describe an approach to modelling of power GaN HEMTs, aimed at full sys-tem optimization through concurrent simulation of device, package, and applica-tion. We believe this “virtual prototyping” approach is an effective means to link fundamental understanding of the device properties to circuit- and system-level performance. Results are specifically presented from detailed simulations and comparison with experiments for both normally-on insulated-gate GaN HEMTs and normally-off pGaN devices in real switching applications.


2017 - Random dopant fluctuation variability in scaled InGaAs dual-gate ultra-thin body MOSFETs: source and drain doping effect [Relazione in Atti di Convegno]
Zagni, Nicolo; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

In this paper, we present simulation results on statistical variability of threshold voltage and the respective sensitivity to process variations in Dual Gate Ultra-Thin Body (DG-UTB) InGaAs nMOSFETs at two technological nodes (with physical gate length Lg = 15 nm and Lg = 10.4 nm). Particularly, we focus on the effect of Random Dopant Fluctuations (RDF) in both the channel and the source/drain regions. While the effect of other variability sources (i.e., workfunction fluctuation, WFF, and line edge roughness, LER) can be controlled by existing technological strategies, RDF can become significant due to the 'source-starvation' effect. From our analysis, we find in fact that RDF is strongly dependent on source/drain doping, while the effect due to channel doping variation is marginal. Moreover, results indicate the possibility of achieving lower RDF variability effects at very high source/ drain doping levels that are beyond the reach of current process technology. Hence, RDF can potentially become the limiting factor to the overall variability in ultra-scaled InGaAs devices due to the difficulties in achieving very high source/drain doping.


2017 - The PixFEL front-end for X-ray imaging in the radiation environment of next generation FELs [Relazione in Atti di Convegno]
Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladini, A.; Paoloni, E.; Rizzo, G.; Benkechkache, M. A.; Dalla Betta, G. -F.; Mendicino, R.; Pancheri, L.; Verzellesi, G.; Xu, H.
abstract

In the framework of the PixFEL project, a processing channel for pixel sensor readout has been designed and fabricated in a 65 nm CMOS technology. The detector under development is aimed at applications to coherent X-ray diffraction imaging (CXDI) at the next generation free electron lasers (FELs). Especially in the detector region around the hole for the unscattered photon beam, pixels will be subjected to huge doses of ionizing radiation, in the order of tens of Grad(SiO 2 , during their lifetime. The total ionizing dose (TID) for the frontend electronics, while significantly reduced by the shielding effect of the detector, is still expected to exceed one Grad(SiO 2 . This paper investigates the performance degradation in the PixFEL readout circuit, in particular in the charge sensitive amplifier, after exposure to X-ray doses up to 100 Mrad(SiO 2 .


2017 - The impact of interface and border traps on current–voltage, capacitance–voltage, and split‐CV mobility measurements in InGaAs MOSFETs [Articolo su rivista]
Pavan, Paolo; Zagni, Nicolo'; Puglisi, Francesco Maria; Alian, Alireza; Thean, Aaron Voon Yew; Collaert, Nadine; Verzellesi, Giovanni
abstract

In this article, we present coupled experimental/simulated results about the influence of interface and border traps on the electrical characteristics and split-CV mobility extraction in InGaAs MOSFETs. These results show that border traps limit the maximum drain current under on-state conditions, induce a hysteresis in the quasi-static transfer characteristics, as well as affect CV measurements, inducing an increase in the accumulation capacitance even at high frequencies where trap effects are commonly assumed to be negligible. Hysteresis in the transfer characteristics can be used as a sensitive monitor of border traps, as suggested by a sensitivity analysis where either the energetic or the spatial distribution of border traps are varied. Finally, we show that mobility extraction by means of the split-CV method is affected by appreciable errors related to the spurious contributions of interface and border traps to the total gate charge, ultimately resulting in significant channel mobility underestimation. In very narrow channel devices, channel electron spilling over the InP buffer layer can also contribute to mobility measurement inaccuracy.


2017 - Threshold Voltage Statistical Variability and Its Sensitivity to Critical Geometrical Parameters in Ultrascaled InGaAs and Silicon FETs [Articolo su rivista]
Zagni, Nicolo'; Puglisi, Francesco Maria; Verzellesi, Giovanni; Pavan, Paolo
abstract

We investigate the statistical variability of the threshold voltage and its sensitivity to critical geometrical parameters in ultrascaled In0.53Ga0.47As and Si MOSFETs by means of 3-D quantum-corrected drift-diffusion simulations. Dual-gate ultrathin-body and FinFET device structures are analyzed for both channel materials. To assess the variability and sensitivity effects also from the scaling perspective, we consider devices belonging to two technological nodes with gate lengths 15 and 10.4 nm, designed according to International Technology Roadmap for Semiconductors (ITRS) specifications. Variability sources included in our analysis are random-dopant fluctuation, work-function fluctuation (WFF), as well as body- and gate-line-edge roughness (LER). Sensitivity to critical geometrical parameters is assessed by varying gate length, channel thickness, and oxide thickness. Results point out the major detrimental effect of WFF and Body-LER for InGaAs FETs, whereas WFF dominates in Si counterparts. Moreover, the sensitivity analysis shows that control over gate length and channel thickness in the InGaAs technology is fundamental in order to keep variability within tolerable values. Scaling of the InGaAs technology highlights the importance of abiding to ITRS projections regarding LER control improvement. Furthermore, a tight channel thickness control is required in ultrascaled devices due to the large sensitivity of the threshold voltage to the channel thickness combined with increased variability.


2017 - Variability and sensitivity to process parameters variations in InGaAs Dual-Gate Ultra-Thin Body MOSFETS: A scaling perspective [Relazione in Atti di Convegno]
Zagni, Nicolò; Puglisi, Francesco Maria; Verzellesi, Giovanni; Pavan, Paolo
abstract

In this work, we present a combined analysis on the statistical variability of threshold voltage, on-state current, and leakage current of III-V ultra-scaled MOSFETs. In addition, we analyze the sensitivity of threshold voltage to critical geometrical and process parameters variations (i.e, gate length, channel thickness, oxide thickness and channel doping). Our analysis verifies the scaling potential of the InGaAs Technology from the variability/sensitivity standpoint for two technologicaTnodes (Lg = 15 nm, Lg = 10.4 nm), by means of Quantum Drift-Diffusion (QDD) simulations. The structure under investigation is a template Dual-Gate Ultra-Thin Body device realized following ITRS projections. The variability sources under consideration are: Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (LER). The sensitivity analysis of threshold voltage is performed by considering also the effects of statistical variability to evaluate their combined effect. The results of the statistical variability analysis highlight the importance of carefully controlling Body-LER, as forecasted in the new IRDS report. Moreover, the combined effect of variability and sensitivity to channel thickness are found to be critical to the scaling process (down to Lg =10.4 nm), as it leads to significant leakage increase or performance reduction, potentially resulting in always-on devices.


2016 - A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion [Articolo su rivista]
Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Rizzo, G.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Giorgi, M.; Morsani, F.; Paladino, A.; Paoloni, E.; Pancheri, L.; Dalla Betta, G. F.; Mendicino, R.; Verzellesi, Giovanni; Xu, H.; Benkechkache, M. A.
abstract

A readout channel for applications to X-ray diffraction imaging at free electron lasers has been developed in a 65 nm CMOS technology. The analog front-end circuit can achieve an input dynamic range of 100 dB by leveraging a novel signal compression technique based on the non-linear features of MOS capacitors. Trapezoidal shaping is accomplished through a transconductor and a switched capacitor circuit, performing gated integration and correlated double sampling. A small area, low power 10 bit successive approximation register (SAR) ADC, operated in a time-interleaved fashion, is used for numerical conversion of the amplitude measurement. Operation at 5 MHz of the analog channel including the shaper was demonstrated. Also, the channel was found to be compliant with single 1 keV photon resolution at 1.25 MHz. The ADC provides a signal-to-noise ratio (SNR) of 56 dB, corresponding to an equivalent number of bits (ENOB) of 9 bits, and a differential non linearity DNL<1 LSB at a sampling rate slightly larger than 1.8 MHz.


2016 - A comprehensive reliability evaluation of high-performance AlGaN/GaN HEMTs for space applications [Abstract in Atti di Convegno]
De Santi, Carlo; Dalcanale, Stefano; Stocco, Antonio; Rampazzo, Fabiana; Gerardin, Simone; Meneghini, Matteo; Meneghesso, Gaudenzio; Chini, Alessandro; Verzellesi, Giovanni; Grünenpütt, Jan; Lambert, Benoit; Schauwecker, Bernd; Blanck, Hervé; Zanoni, Andrew Barnes and E.
abstract

A systematic analysis of the reliability of GaN HEMT technologies for space applications in L-, S- and C- band up to 6 GHz (GH50, gate length 0,5 um) and C-, X- and Ku-band up to 20 GHz (GH25, gate length 0.25 um) has been carried out by means of on-wafer short-term (<24 h) tests, long-term high temperature storage and life tests. Specific long-term tests included: (1) 4000h thermal storage at three different temperatures (300°C, 325°C and 350°C); (2) 4000h DC life-test at 250°C, 300°C and 350°C junction temperature at a VDS value of 50 V and to 30 V respectively for GH50 and GH25 and at other bias points, up to VDS=100 V (GH50) and 60 V (GH25); (3) 500h RF life-tests at Tj=350°C, VDS=50V, IDS=50mA/mm, 1.7 GHz for GH50, and at Tj=325°C, VDS=30V, IDS=100mA/mm, 9 GHz for GH25, respectively. For both RF tests the input power corresponding to the maximum PAE value was selected. For all tested devices, degradation of main DC and RF parameters has been very limited. Even at 350°C, the highest temperature adopted for both thermal storage and life tests, the decrease of drain saturation current or transconductance did not exceed 20% after 4000 hours.


2016 - Challenges towards the simulation of GaN-based LEDs beyond the semiclassical framework [Relazione in Atti di Convegno]
Goano, Michele; Bertazzi, Francesco; Zhou, Xiangyu; Mandurrino, Marco; Dominici, Stefano; Vallone, Marco; Ghione, Giovanni; Tibaldi, Alberto; Calciati, Marco; Debernardi, Pierluigi; Dolcini, Fabrizio; Rossi, Fausto; Verzellesi, Giovanni; Meneghini, Matteo; Trivellin, Nicola; De Santi, Carlo; Zanoni, Enrico; Bellotti, Enrico
abstract

We discuss some of the key issues to be addressed along the way to complement, and possibly to replace, the standard semiclassical Boltzmann picture with genuine quantum approaches for the simulation of carrier transport and recombination in GaN-based LEDs, with the goal of gradually removing the fitting parameters presently required by semiempirical «quantum corrections» and to better understand the processes responsible for the efficiency droop. As examples of augmented semiclassical models, we present a three-step description of trap-Assisted tunneling, especially relevant below the optical turn-on, and a carrier-density-dependent estimate of the phonon-Assisted capture rate from bulk states to quantum wells (QWs). Moving to genuine quantum models, we solve the semiconductor Bloch equations to calculate the gain/absorption spectra of AlGaN/GaN QWs, and we discuss our first simulations of spatially and energetically resolved currents across the active region of a single-QW LED based on the nonequilibrium Green's function approach.


2016 - Correlation between dynamic Rdson transients and Carbon related buffer traps in AlGaN/GaN HEMTs [Relazione in Atti di Convegno]
Iucolano, F.; Parisi, A.; Reina, S.; Patti, A.; Coffa, S.; Meneghesso, G.; Verzellesi, Giovanni; Fantini, Fausto; Chini, Alessandro
abstract

The on resistance increment observed when the device is operated at high drain-source voltages is one the topics that limits the performance of the AlGaN/GaN HEMT devices. In this paper, the physical mechanisms responsible of the RDSon degradation are investigated. The dynamic RDSon transient method is used in order to get insight to characterize the traps states. By calculating the Arrhenius plot associated with the RDSon transients an activation energy of 0.86eV was extracted, that can be correlated to the traps due to the incorporation of Carbon inside the buffer. This hypothesis was further supported by the analyses performed on a simpler structure (TLM). By applying a negative substrate bias the effect of only the buffer traps was studied. A fairly close value of the activation energy (0.9eV) to the one extracted when analyzing the RDSon transient was obtained.


2016 - Design and TCAD simulation of planar p-on-n active-edge pixel sensors for the next generation of FELs [Articolo su rivista]
Dalla Betta, G. F.; Batignani, G.; Benkechkache, M. A.; Bettarini, S.; Casarosa, G.; Comotti, D.; Fabris, L.; Forti, F.; Grassi, M.; Latreche, S.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Mendicino, R.; Morsani, F.; Paladino, A.; Pancheri, L.; Paoloni, E.; Ratti, L.; Re, V.; Rizzo, G.; Traversi, G.; Vacchi, C.; Verzellesi, Giovanni; Xu, H.
abstract

We report on the design and TCAD simulations of planar p-on-n sensors with active edge aimed at a four-side buttable X-ray detector module for future FEL applications. Edge terminations with different number of guard rings were designed to find the best trade-off between breakdown voltage and border gap size. The methodology of the sensor design, the optimization of the most relevant parameters to maximize the breakdown voltage and the final layout are described.


2016 - Effects of Border Traps on Transfer Curve Hysteresis and Split-CV Mobility Measurement in InGaAs Quantum-Well MOSFETs [Relazione in Atti di Convegno]
Pavan, Paolo; Zagni, Nicolo'; Puglisi, Francesco Maria; Alian, Alireza; Thean, Aaron Voon Yew; Collaert, Nadine; Verzellesi, Giovanni
abstract

In this paper we present TCAD simulation and experimental results on the influence of interface and border traps on the electrical characteristics of InGaAs quantum-well MOSFETs. These results show that border traps limit the maximum ION, induce a hysteresis in the quasi-static transfer characteristics, and markedly affect CV measurements, inducing a large increase in the accumulation capacitance even at high frequencies where trap effects are commonly assumed to be negligible. The latter effect is particularly insidious from the technologist's perspective, since it can partially compensate quantum capacitance reduction effects, leading to CV data misinterpretation. Interface traps affect mainly the subthreshold slope of IV characteristics and cause frequency dispersion under depletion conditions. Finally, we show that channel mobility extracted by means of the split-CV method is affected by spurious contributions to the gate charge related to both interface and border traps, resulting in channel mobility underestimation.


2016 - Experimental and Numerical Analysis of Hole Emission Process from Carbon-Related Traps in GaN Buffer Layers [Articolo su rivista]
Chini, Alessandro; Meneghesso, G.; Meneghini, M.; Fantini, Fausto; Verzellesi, Giovanni; Patti, A.; Iucolano, F.
abstract

The role of carbon-related traps in GaN-based ungated high-electron mobility transistor structures has been investigated both experimentally and by means of numerical simulations. A clear quantitative correlation between the experimental data and numerical simulations has been obtained. The observed current decrease in the tested structure during backgating measurements has been explained simply by means of a thermally activated hole-emission process with E-A = 0.9eV, corresponding to the distance of the acceptor-like hole-Trap level from the GaN valence band. Moreover, it has been demonstrated by means of electrical measurements and numerical simulations that only a low percentage of the nominal carbon doping levels induces the observed current reduction when negative substrate bias is applied to the tested structure.


2016 - First experimental results on active and slim-edge silicon sensors for XFEL [Articolo su rivista]
Pancheri, L.; Benkechcache, M. E. A.; Betta, G. F. Dalla; Xu, H.; Verzellesi, Giovanni; Ronchin, S.; Boscardin, M.; Ratti, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Vacchi, C.; Manghisoni, M.; Re, V.; Traversi, G.; Batignani, G.; Bettarini, S.; Casarosa, G.; Giorgi, M.; Forti, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Morsani, F.; Fabris, L.
abstract

This work presents the first characterization results obtained on a pilot fabrication run of planar sensors, tailored for X-ray imaging applications at FELs, developed in the framework of INFN project PixFEL. Active and slim-edge p-on-n sensors are fabricated on n-type high-resistivity silicon with 450 μm thickness, bonded to a support wafer. Both diodes and pixelated sensors with a pitch of 110 μm are included in the design. Edge structures with different number of guard rings are designed to comply with the large bias voltage required by the application after accumulating an ionizing radiation dose as large as 1GGy. Preliminary results from the electrical characterization of the produced sensors, providing a first assessment of the proposed approach, are discussed. A functional characterization of the sensors with a pulsed infrared laser is also presented, demonstrating the validity of slim-edge configurations.


2016 - In-pixel conversion with a 10 bit SAR ADC for next generation X-ray FELs [Articolo su rivista]
Lodola, L.; Batignani, G.; Benkechkache, M. A.; Bettarini, S.; Casarosa, G.; Comotti, D.; Dalla Betta, G. F.; Fabris, L.; Forti, F.; Grassi, M.; Latreche, S.; Malcovati, P.; Manghisoni, M.; Mendicino, R.; Morsani, F.; Paladino, A.; Pancheri, L.; Paoloni, E.; Ratti, L.; Re, V.; Rizzo, G.; Traversi, G.; Vacchi, C.; Verzellesi, Giovanni; Xu, H.
abstract

This work presents the design of an interleaved Successive Approximation Register (SAR) ADC, part of the readout channel for the PixFEL detector. The PixFEL project aims at substantially advancing the state-of-the-art in the field of 2D X-ray imaging for applications at the next generation Free Electron Laser (FEL) facilities. For this purpose, the collaboration is developing the fundamental microelectronic building blocks for the readout channel. This work focuses on the design of the ADC carried out in a 65 nm CMOS technology. To obtain a good tradeoff between power consumption, conversion speed and area occupation, an interleaved SAR ADC architecture was adopted.


2016 - PFM2: A 32 × 32 processor for X-ray diffraction imaging at FELs [Articolo su rivista]
Manghisoni, M.; Fabris, L.; Re, V.; Traversi, G.; Ratti, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Vacchi, C.; Pancheri, L.; Benkechcache, M. E. A.; Betta, G. F. Dalla; Xu, H.; Verzellesi, Giovanni; Ronchin, S.; Boscardin, M.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Giorgi, M.; Paladino, A.; Paoloni, E.; Rizzo, G.; Morsani, F.
abstract

This work is concerned with the design of a readout chip for application to experiments at the next generation X-ray Free Electron Lasers (FEL). The ASIC, named PixFEL Matrix (PFM2), has been designed in a 65 nm CMOS technology and consists of 32 × 32 pixels. Each cell covers an area of 110 × 110 μm2 and includes a low-noise charge sensitive amplifier (CSA) with dynamic signal compression, a time-variant shaper used to process the preamplifier output signal, a 10-bit successive approximation register (SAR) analog-to-digital converter (ADC) and digital circuitry for channel control and data readout. Two different solutions for the readout channel, based on different versions of the time-variant filter, have been integrated in the chip. Both solutions can be operated in such a way to cope with the high frame rate (exceeding 1 MHz) foreseen for future X-ray FEL machines. The ASIC will be bump bonded to a slim/active edge pixel sensor to form the first demonstrator for the PixFEL X-ray imager. This work has been carried out in the frame of the PixFEL project funded by Istituto Nazionale di Fisica Nucleare (INFN), Italy.


2016 - PFM2: A 32×32 readout chip for the PixFEL X-ray imager demonstrator [Relazione in Atti di Convegno]
Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benkechkache, M. A.; Dalla Betta, G. -F.; Mendicino, R.; Pancheri, L.; Verzellesi, G.; Xu, H.
abstract

A readout chip, consisting of 32×32 square cells, has been designed in a 65 nm CMOS technology. The circuit will be bump bonded to a slim/active edge pixel sensor to form the first demonstrator for the PixFEL X-ray imager, envisaged for applications to experiments at the next generation X-ray FELs. The pixel pitch is 110 μm, for a total area of about 16 mm2. Different solutions for the readout channel, which includes a charge preamplifier, a time-variant filter and a 10 bit ADC, have been integrated in the chip. In particular, a couple of different versions for the time-variant processor have been implemented. The charge preamplifier is provided with four different gain settings, therefore improving the system capability to comply with photon energies in the 1 keV to 10 keV interval. This work, besides discussing in detail the readout channel and array architecture, will present the first results from the chip characterization.


2016 - The PixFEL project: Progress towards a fine pitch X-ray imaging camera for next generation FEL facilities [Articolo su rivista]
Rizzo, G.; Batignani, G.; Benkechkache, M. A.; Bettarini, S.; Casarosa, G.; Comotti, D.; Dalla Betta, G. F.; Fabris, L.; Forti, F.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Mendicino, R.; Morsani, F.; Paladino, A.; Pancheri, L.; Paoloni, E.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.; Verzellesi, Giovanni; Xu, H.
abstract

The INFN PixFEL project is developing the fundamental building blocks for a large area X-ray imaging camera to be deployed at next generation free electron laser (FEL) facilities with unprecedented intensity. Improvement in performance beyond the state of art in imaging instrumentation will be explored adopting advanced technologies like active edge sensors, a 65nm node CMOS process and vertical integration. These are the key ingredients of the PixFEL project to realize a seamless large area focal plane instrument composed by a matrix of multilayer four-side buttable tiles. In order to minimize the dead area and reduce ambiguities in image reconstruction, a fine pitch active edge thick sensor is being optimized to cope with very high intensity photon flux, up to 104 photons per pixel, in the range from 1 to 10keV. A low noise analog front-end channel with this wide dynamic range and a novel dynamic compression feature, together with a low power 10bit analog to digital conversion up to 5MHz, has been realized in a 110μm pitch with a 65nm CMOS process. Vertical interconnection of two CMOS tiers will be also explored in the future to build a four-side buttable readout chip with high density memories. In the long run the objective of the PixFEL project is to build a flexible X-ray imaging camera for operation both in burst mode, like at the European X-FEL, or in continuous mode with the high frame rates anticipated for future FEL facilities.


2015 - A 10 bit resolution readout channel with dynamic range compression for X-ray imaging at FELs [Relazione in Atti di Convegno]
Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benckechkache, M. A.; Betta, G. F. Dalla; Mendicino, R.; Pancheri, L.; Verzellesi, Giovanni; Xu, H.
abstract

This work presents the characterization results of the first prototype of a readout channel for silicon pixel detectors, developed by the PixFEL collaboration in view of future X-ray Free Electron Laser (FEL) applications. The circuit, fabricated in a 65 nm CMOS technology by TSMC, has been designed to deal with a maximum input signal of 104 photons with energy from 1 keV to 10 keV, by exploiting a non-linear technique implemented at front-end level. Moreover, it has been envisioned for operation with the demanding frame rates of next generation FEL facilities, which can reach a few MHz. This paper presents results from measurements performed on the building blocks of the readout processor, along with a summary of the overall performance of the complete readout channel.


2015 - Analysis of off-state leakage mechanisms in GaN-based MIS-HEMTs: Experimental data and numerical simulation [Articolo su rivista]
Marino, F. A.; Bisi, D.; Meneghini, M.; Verzellesi, Giovanni; Zanoni, E.; Van Hove, M.; You, S.; Decoutere, S.; Marcon, D.; Stoffels, S.; Ronchi, N.; Meneghesso, G.
abstract

This paper presents an extensive analysis of the off-state conduction mechanisms in AlGaN/GaN Meta-Insulator-Semiconductor (MIS) transistors. Based on combined bi-dimensional numerical simulation and experimental measurements, we demonstrate the following relevant results: (i) under off-state bias conditions, the drain current can show a significant increase when the drain bias is swept up to 600 V; (ii) several mechanisms can be responsible for off-state current conduction, including band-to-band tunneling and impact ionization; (iii) two-dimensional numerical simulations indicate that band-to-band tunneling plays a major role, while impact ionization does not significantly contribute to the overall leakage. Temperature-dependent I-V measurements were also carried out to identify the origin of the vertical drain-bulk leakage.


2015 - Extraction of interface state density in oxide/III-V gate stacks [Articolo su rivista]
Veksler, Dmitry; Bersuker, Gennadi; Madan, H.; Morassi, Luca; Verzellesi, Giovanni
abstract

Extracted interface trap densities (Dit) in the oxide/III-V gate stacks vary strongly with the utilized measurement procedures and values of device parameters used in the extraction analysis. Such Dit dependency on both selected procedures and parameters compromises unambiguous extraction of energy distributions of defects affecting device characteristics. To overcome this uncertainty, we propose an extraction approach, which combines the essential features of the high-low method and Terman method, allowing us to self-consistently determine Dit distribution along with values of the critical device parameters, effective oxide thickness (EOT) and substrate doping density (Nd).


2015 - Modeling challenges for high-efficiency visible light-emitting diodes [Relazione in Atti di Convegno]
Bertazzi, F.; Dominici, S.; Mandurrino, M.; Robidas, D.; Xiangyu, Zhou; Vallone, M.; Calciati, M.; Debernardi, P.; Verzellesi, Giovanni; Meneghini, M.; Bellotti, E.; Ghione, G.; Goano, M.
abstract

In order to predict through numerical simulation the optical and carrier transport properties of GaN-based light-emitting diodes (LEDs), a genuine quantum approach should be combined with an atomistic description of the electronic structure. However, computational considerations have elicited the empirical inclusion of quantum contributions within conventional semiclassical drift-diffusion approaches. The lack of first-principles validation tools has left these “quantum corrections” largely untested, at least in the context of LED simulation. We discuss here the results obtained comparing state-of-the-art commercial numerical simulators, in order to assess the predictive capabilities of some of the most important quantum-based models complementing the drift-diffusion equations.


2015 - Off-state breakdown characteristics of AlGaN/GaN MIS-HEMTs for switching power applications [Relazione in Atti di Convegno]
Curatola, Gilberto; Huber, Martin; Daumiller, Ingo; Haeberlen, Oliver; Verzellesi, Giovanni
abstract

A consistent description of breakdown characteristics in ohmic-to-ohmic, ohmic-to-substrate and HEMT structures has been achieved by means of device simulations for a depletion-mode AlGaN/GaN MIS-HEMT technology on Si substrate suited for power switching applications. For relatively short gate-drain distances or ohmic-to-ohmic spacings, source-drain punch-through is suggested to be the limiting breakdown mechanism in either HEMTs under off-state conditions or ohmic-to-ohmic isolation test structures, respectively. The mechanism ultimately limiting the HEMT off-state voltage blocking capability is instead the vertical drain-to-substrate breakdown for long gate-drain spacings. The latter phenomenon is induced, in HEMTs on a low-resistivity p-type substrate like those considered here, by the triggering of a high-field carrier generation mechanism rather than by carrier injection.


2015 - Physics-based modeling and experimental implications of trap-assisted tunneling in InGaN/GaN light-emitting diodes [Articolo su rivista]
Mandurrino, Marco; Verzellesi, Giovanni; Goano, Michele; Vallone, Marco; Bertazzi, Francesco; Ghione, Giovanni; Meneghini, Matteo; Meneghesso, Gaudenzio; Zanoni, Enrico
abstract

In a combined experimental and numerical investigation, we present the effects of trap-assisted tunneling on the sub-threshold forward bias characteristics of a blue InGaN/GaN single-quantum-well LED test structure grown on a SiC substrate. The different role of donor- and acceptor-like traps has been studied, for the information it can provide on the role played by point defects. Using the energy Et and trap density Nt as the only tunneling-related fitting parameters, the behavior of the measured I(V) curves is well reproduced by our model over a wide current and temperature range. The very good agreement between simulations and experiments suggests that trap-assisted forward tunneling is one of the most relevant contributions to the current flow below the optical turn-on of the diode.


2015 - PixFEL: developing a fine pitch, fast 2D X-ray imager for the next generation X-FELs [Articolo su rivista]
Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benkechkache, M. A.; Dalla Betta, G. F.; Mendicino, R.; Pancheri, L.; Verzellesi, Giovanni; Xu, H.
abstract

The PixFEL project is conceived as the first stage of a long term research program aiming at the development of advanced X-ray imaging instrumentation for applications at the free electron laser (FEL) facilities. The project aims at substantially advancing the state-of-the-art in the field of 2D X-ray imaging by exploring cutting-edge solutions for sensor development, for integration processes and for readout channel architectures. The main focus is on the development of the fundamental microelectronic building blocks for detector readout and on the technologies for the assembly of a multilayer module with minimum dead area. This work serves the purpose of introducing the main features of the project, together with the simulation results leading to the first prototyping run.


2015 - Semiclassical simulation of trap-assisted tunneling in GaN-based light-emitting diodes [Articolo su rivista]
Mandurrino, Marco; Goano, Michele; Vallone, Marco; Bertazzi, Francesco; Ghione, Giovanni; Verzellesi, Giovanni; Meneghini, Matteo; Meneghesso, Gaudenzio; Zanoni, Enrico
abstract

We present a combined theoretical, numerical and experimental investigation on trap-assisted tunneling (TAT) in the subthreshold regime of III-nitride-based light-emitting diodes (LEDs). Starting from the basic formulation of the TAT models provided by Hurkx and Schenk, we discuss the derivation of a detailed approach based on both multiphonon and elastic nonlocal processes. A sensitivity study conducted over the main trap- and phonon-related physical parameters of this nonlocal TAT model confirms the importance of tunneling assisted by lattice defects on the LED electrical behavior in the low-medium forward bias range. Comparisons with measured temperature-dependent electrical characteristics I(V;T) of a single quantum well LED grown on a highly conductive SiC substrate demonstrate that I(V;T) can be accurately reproduced in the range between 200 and 400 K by implementing the nonlocal model for TAT processes via traps in the electron-blocking and spacer layers.


2015 - The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities [Articolo su rivista]
Rizzo, G.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Dalla Betta, G. F.; Pancheri, L.; Verzellesi, Giovanni; Xu, H.; Mendicino, R.; Benkechkache, M. A.
abstract

The PixFEL project aims to develop an advanced X-ray camera for imaging suited for the demanding requirements of next generation free electron laser (FEL) facilities. New technologies can be deployed to boost the performance of imaging detectors as well as future pixel devices for tracking. In the first phase of the PixFEL project, approved by the INFN, the focus will be on the development of the microelectronic building blocks, carried out with a 65 nm CMOS technology, implementing a low noise analog front-end channel with high dynamic range and compression features, a low power ADC and high density memory. At the same time PixFEL will investigate and implement some of the enabling technologies to assembly a seamless large area X-ray camera composed by a matrix of multilayer four-side buttable tiles. A pixel matrix with active edge will be developed to minimize the dead area of the sensor layer. Vertical interconnection of two CMOS tiers will be explored to build a four-side buttable readout chip with small pixel pitch and all the on-board required functionalities. The ambitious target requirements of the new pixel device are: single photon resolution, 1 to 10(4) photons @ 1 keV to 10 keV input dynamic range, 10-bit analog to digital conversion up to 5 MHz, 1 kevent in-pixel memory and 100 mu m pixel pitch. The long term goal of PixFEL will be the development of a versatile X-ray camera to be operated either in burst mode (European XFEL), or in continuous mode to cope with the high frame rates foreseen for the upgrade phase of the LCLS-II at SLAC.


2015 - Trap-assisted tunneling contributions to subthreshold forward current in InGaN/GaN light-emitting diodes [Relazione in Atti di Convegno]
Mandurrino, M.; Goano, M.; Dominici, S.; Vallone, M.; Bertazzi, F.; Ghione, G.; Bernabei, Mario; Rovati, Luigi; Verzellesi, Giovanni; Meneghini, M.; Meneghesso, G.; Zanoni, E.
abstract

We present results from a combined experimental and numerical investigation of trap-assisted tunneling contributions to subthreshold forward current in InGaN/GaN light-emitting diodes. We show that the excess forward leakage current in single-quantum-well InGaN/GaN light-emitting diodes can be explained by non-local tunneling-into-traps processes and subsequent non-radiative recombination with free carriers.


2014 - Breakdown investigation in GaN-based MIS-HEMTdevices [Relazione in Atti di Convegno]
Marino, Fabio Alessio; Bisi, Davide; Meneghini, Matteo; Verzellesi, Giovanni; Zanoni, Enrico; Hove, Marleen Van; You, Shuzhen; Decoutere, Stefaan; Marcon, Denis; Stoffels, Steve; Ronchi, Nicolo'; Meneghesso, Gaudenzio
abstract

Breakdown mechanisms in AlGaN/GaN HEMT devices are here analyzed, placing particular emphasis in the analysis of GaN based device grown on silicon substrate. Based on combined experimental data and bi-dimensional numerical simulation we demonstrate that many physical mechanisms can contribute to increase the leakage current leading to the final breakdown of the device. In particular we show how band-to-band phenomena, rather than impact ionization, can be responsible of the premature breakdown even in double-heterostructure HEMTs.


2014 - Correlating electroluminescence characterization and physics-based models of InGaN/GaN LEDs: Pitfalls and open issues [Articolo su rivista]
Marco, Calciati; Michele, Goano; Francesco, Bertazzi; Marco, Vallone; Xiangyu, Zhou; Giovanni, Ghione; Matteo, Meneghini; Gaudenzio, Meneghesso; Enrico, Zanoni; Enrico, Bellotti; Verzellesi, Giovanni; Dandan, Zhu; Colin, Humphreys
abstract

Electroluminescence (EL) characterization of InGaN/GaN light-emitting diodes (LEDs), coupled with numerical device models of different sophistication, is routinely adopted not only to establish correlations between device efficiency and structural features, but also to make inferences about the loss mechanisms responsible for LED efficiency droop at high driving currents. The limits of this investigative approach are discussed here in a case study based on a comprehensive set of currentand temperature-dependent EL data from blue LEDs with low and high densities of threading dislocations (TDs). First, the effects limiting the applicability of simpler (closed-form and/or one-dimensional) classes of models are addressed, like lateral current crowding, vertical carrier distribution nonuniformity, and interband transition broadening. Then, the major sources of uncertainty affecting state-of-the-art numerical device simulation are reviewed and discussed, including (i) the approximations in the transport description through the multi-quantum-well active region, (ii) the alternative valence band parametrizations proposed to calculate the spontaneous emission rate, (iii) the difficulties in defining the Auger coefficients due to inadequacies in the microscopic quantum well description and the possible presence of extra, non-Auger high-current-density recombination mechanisms and/or Auger-induced leakage. In the case of the present LED structures, the application of three-dimensional numerical-simulation-based analysis to the EL data leads to an explanation of efficiency droop in terms of TD-related and Auger-like nonradiative losses, with a C coefficient in the 10−30 cm6/s range at room temperature, close to the larger theoretical calculations reported so far. However, a study of the combined effects of structural and model uncertainties suggests that the C values thus determined could be overestimated by about an order of magnitude. This preliminary attempt at uncertainty quantification confirms, beyond the present case, the need for an improved description of carrier transport and microscopic radiative and nonradiative recombination mechanisms in device-level LED numerical models.


2014 - Design and TCAD simulations of planar active-edge pixel sensors for future XFEL applications [Relazione in Atti di Convegno]
Dalla Betta, Gian franco; Batignani, Giovanni; Benkechkache, Mohamed El Amine; Bettarini, Stefano; Casarosa, Giulia; Comotti, Daniele; Fabris, Lorenzo; Forti, Francesco; Grassi, Marco; Latreche lassoued, Saida; Lodola, Luca; Malcovati, Piero; Manghisoni, Massimo; Mendicino, Roberto; Morsani, Fabio; Paladino, Antonio; Pancheri, Lucio; Paoloni, Eugenio; Ratti, Lodovico; Re, Valerio; Rizzo, Giuliana; Traversi, Gianluca; Vacchi, Carla; Verzellesi, Giovanni; Xu, Hesong
abstract

We report on the design and TCAD simulations of planar active-edge pixel sensors within the INFN PixFEL project. These devices are intended as one of the building blocks for the assembly of a multilayer, four-side buttable tile for X-ray imaging applications in future Free Electron Laser facilities. The requirements in terms of very wide dynamic range and tolerance to extremely high ionizing radiation doses call for high operation voltages. A comprehensive TCAD simulation study is presented, aimed at the best trade-offs between the minimization of the edge region size and the sensor breakdown voltage.


2014 - ESD degradation and robustness of RGB LEDs and modules: An investigation based on combined electrical and optical measurements [Articolo su rivista]
Matteo, Meneghini; Simone, Vaccari; Matteo Dal, Lago; Stefano, Marconi; Marco, Barbato; Nicola, Trivellin; Alessio, Griffoni; Alberto, Alfier; Verzellesi, Giovanni; Gaudenzio, Meneghesso; Enrico, Zanoni
abstract

This paper presents an extensive analysis of the robustness of state-of-the-art RGB LEDs and LED modules submitted to Electrostatic Discharges (ESD). We studied both single RGB LEDs, and small modules constituted by the series connection of 2, 3, and 4 monochromatic LEDs. ESD events were simulated by a Transmission Line Pulser (TLP), capable of generating voltage pulses with a duration of 100 ns and increasing amplitude: after each of the pulses the electrical and optical parameters of the devices were monitored, with the aim of describing the effects of ESD events on the performance of the devices. The results indicate that: (i) the ESD robustness strongly depends on the LED wavelength; InGaN-based LEDs (the green and the blue LEDs) have a lower robustness with respect to the AlInGaP devices (i.e., red LEDs); (ii) non-destructive ESD events can induce significant modifications in the performance of the devices even below the failure voltage/current level; (iii) the ESD robustness of LED modules strongly depends on the robustness of each LED of the chain, and on the variability of the devices. The results presented in this paper provide important information for the design of high robustness multi-LED systems.


2014 - Influence of Buffer Carbon Doping on Pulse and AC Behavior of Insulated-Gate Field-Plated Power AlGaN/GaN HEMTs [Articolo su rivista]
Verzellesi, Giovanni; Morassi, Luca; Meneghesso, Gaudenzio; Meneghini, Matteo; Zanoni, Enrico; Pozzovivo, Gianmauro; Lavanga, Simone; Detzel, Thomas; Haberlen, Oliver; Curatola, Gilberto
abstract

Pulse behavior of insulated-gate double-field-plate power AlGaN/GaN HEMTs with C-doped buffers showing small current-collapse effects and dynamic RDS,on increase can accurately be reproduced by numerical device simulations that assume the CN-CGa autocompensation model as carbon doping mechanism. Current-collapse effects much larger than experimentally observed are instead predicted by simulations if C doping is accounted by dominant acceptor states. This suggests that buffer growth conditions favoring CN-CGa autocompensation can allow for the fabrication of power AlGaN/GaN HEMTs with reduced current-collapse effects. The drain-source capacitance of these devices is found to be a sensitive function of the C doping model, suggesting that its monitoring can be adopted as a fast technique to assess buffer compensation properties.


2014 - Low-noise readout channel with a novel dynamic signal compression for future X-FEL applications [Relazione in Atti di Convegno]
Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benckechkache, M. A.; Dalla Betta, G. F.; Mendicino, R.; Pancheri, L.; Verzellesi, Giovanni; Xu, H.
abstract

This work presents the design of a read-out channel suitable for application to silicon pixel detectors for the next generation Free Electron Laser (FEL) experiments. The readout architecture, which has been carried out in a 65 nm CMOS technology, consists of a low-noise charge sensitive amplifier (CSA) with dynamic signal compression, a time-variant shaping stage and a low-power analog-to-digital converter (ADC), hosted in a 100 μm-pitch pixel. The blocks will be operated in such a way to cope with the high frame rates (exceeding 1 MHz) foreseen for future X-ray FEL machines. The paper describes in detail the architecture and the performance of the CSA and provides an overview about the analog readout channel.


2014 - PixFEL: Enabling technologies, building blocks and architectures for advanced X-ray pixel cameras at the next generation FELs [Relazione in Atti di Convegno]
Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benkechkache, M. A.; Dalla Betta, G. . F.; Mendicino, R.; Pancheri, L.; Verzellesi, Giovanni; Xu, H.
abstract

The PixFEL project is conceived as the first stage of a long term research program aiming at the development of advanced instrumentation for coherent X-ray diffractive imaging applications at the next generation free electron laser (FEL) facilities. The project aims at substantially advancing the state-of-the-art in the field of 2D X-ray imaging through the adoption of cutting-edge microelectronic technologies and innovative design and architectural solutions. For this purpose, the collaboration is developing the fundamental microelectronic building blocks (low noise analog front-end with dynamic compression feature, high resolution, low power ADC, high density memories) and investigating and implementing the enabling technologies (active edge pixel sensors, high density and low density through silicon vias) for the assembly of a multilayer four side buttable tile. The building block design is being carried out in a 65 nm CMOS technology. The ambitious goal of the research program is the fabrication of an X-ray camera with single photon resolution, 1 to 104 photons @ 1 keV to 10 keV input dynamic range, 1 kevent in-pixel memory, 100 μm pixel pitch, and the capability to be operated at the fast (1 MHz or larger) rates foreseen for the future X-ray FEL machines.


2014 - Threshold voltage instabilities in D-mode GaN HEMTs for power switching applications [Relazione in Atti di Convegno]
G., Meneghesso; R., Silvestri; M., Meneghini; A., Cester; E., Zanoni; Verzellesi, Giovanni; G., Pozzovivo; S., Lavanga; T., Detzel; O., Haberlen; G., Curatola
abstract

Threshold voltage instabilities observed in GaN HEMTs designed for power switching applications when submitted to either DC or pulsed testing are here presented and interpreted. Main results can be summarized as follows: i) two acceptor trap levels, characterized by two well distinct time constants, are present in the UID GaN channel and C-doped GaN buffer respectively and behave as electron and hole traps respectively; ii) the trapped charge is modulated by the high voltage biasing of the gate and drain terminals; iii) when empty, channel electron traps induce a negative threshold-voltage shift, while buffer hole traps induce a positive threshold-voltage shift; iv) when the device is pulsed from off-to on-state conditions, trap charge/discharge dynamics induces negative and positive threshold-voltage instabilities over distinct time scales.


2014 - Trap-assisted tunneling in InGaN/GaN LEDs: experiments and physics-based simulation [Relazione in Atti di Convegno]
Mandurrino, M.; Verzellesi, Giovanni; Goano, M.; Vallone, M. E.; Bertazzi, F.; Ghione, G.; Meneghini, M.; Meneghesso, G.; Zanoni, E.
abstract

We present results from a combined experimental and numerical investigation of a blue InGaN/GaN LED test structure grown on a SiC substrate, confirming that tunneling represents a critical contribution to the sub-threshold forward bias current and discussing the relative importance of different trap-assisted electron tunneling processes.


2014 - Trapping and High Field Related Issues in GaN Power HEMTs [Relazione in Atti di Convegno]
Meneghesso, Gaudenzio; Meneghini, Matteo; Chini, Alessandro; Verzellesi, Giovanni; Zanoni, Enrico
abstract

Gallium Nitride HEMTs grown on Si substrates are the most promising solution for the future technologies in the power electronics industry. Compensation of unintentional GaN n-type conductivity is specifically mandatory in the buffer for an optimum device blocking function. Carbon (C) or Iron (Fe) doping are the most common solutions that however are responsible also for the introduction of traps in the buffer, that induce large charge trapping and current collapse when devices are biased at high voltages as well as affect breakdown behavior of these devices. This paper reviews the main high field related issues recently reported in GaN-on-Si devices for power applications.


2013 - Advances in the development of pixel detector for the SuperB Silicon Vertex Tracker [Articolo su rivista]
E., Paoloni; D., Comotti; M., Manghisoni; V., Re; G., Traversi; L., Fabbri; A., Gabrielli; F., Giorgi; G., Pellegrini; C., Sbarra; N., Semprini Cesari; S., Valentinetti; M., Villa; A., Zoccoli; A., Berra; D., Lietti; M., Prest; A., Bevan; F., Wilson; G., Beck; J., Morris; F., Gannaway; R., Cenci; L., Bombelli; M., Citterio; S., Coelli; C., Fiorini; V., Liberali; M., Monti; B., Nasri; N., Neri; F., Palombo; A., Stabile; G., Balestri; G., Batignani; A., Bernardelli; S., Bettarini; F., Bosi; G., Casarosa; M., Ceccanti; F., Forti; M. A., Giorgi; A., Lusiani; P., Mammini; F., Morsani; B., Oberhof; A., Perez; G., Petragnani; A., Profeti; G., Rizzo; A., Soldani; J., Walsh; L., Gaioni; A., Manazza; E., Quartieri; L., Ratti; S., Zucca; G. F., Dalla Betta; G., Fontana; L., Pancheri; M., Povoli; Verzellesi, Giovanni; L., Bosisio; L., Lanceri; I., Rashevskaya; C., Stella; L., Vitale
abstract

The latest advances in the design and characterization of several pixel sensors developed to satisfy the very demanding requirements of the innermost layer of the SuperB Silicon Vertex Tracker will be presented in this paper. The SuperB machine is an electron positron collider operating at the Gamma(4S) peak to be built in the very near future by the Cabibbo Lab consortium. A pixel detector based on extremely thin, radiation hard devices able to cope with rate in the tens of MHz/cm2 range will be the optimal solution for the upgrade of the inner layer of the SuperB tracking system. At present several options with different levels of maturity are being investigated to understand advantages and potential issues of the different technologies: thin hybrid pixels, DeepN-Well CMOS MAPS, INMAPS CMOS MAPS featuring a quadruple well and high resistivity substrates and CMOS MAPS realized with Vertical Integration technology. The newest results from beam test, the outcomes of the radiation damage studies and the laboratory characterization of the latest prototypes will be reported.


2013 - Beam test results for the SuperB-SVT thin striplet detector [Articolo su rivista]
L., Fabbri; D., Comotti; M., Manghisoni; V., Re; G., Traversi; A., Gabrielli; F., Giorgi; G., Pellegrini; C., Sbarra; N., Semprini Cesari; S., Valentinetti; M., Villa; A., Zoccoli; A., Berra; D., Lietti; M., Prest; A., Bevan; F., Wilson; G., Beck; J., Morris; F., Ganaway; R., Cenci; L., Bombelli; M., Citterio; S., Coelli; C., Fiorini; V., Liberali; M., Monti; B., Nasri; N., Neri; F., Palombo; A., Stabile; G., Balestri; G., Batignani; A., Bernardelli; S., Bettarini; F., Bosi; G., Casarosa; M., Ceccanti; F., Forti; M. A., Giorgi; A., Lusiani; P., Mammini; F., Morsani; B., Oberhof; E., Paoloni; A., Perez; G., Petragnani; A., Profeti; G., Rizzo; A., Soldani; J., Walsh; L., Gaioni; A., Manazza; E., Quartieri; L., Ratti; S., Zucca; G., Alampi; G., Cotto; D., Gamba; S., Zambito; G. F., Dalla Betta; G., Fontana; L., Pancheri; M., Povoli; Verzellesi, Giovanni; M., Bomben; L., Bosisio; P., Cristaudo; L., Lanceri; B., Liberti; I., Rashevskaya; C., Stella; L., Vitale
abstract

The baseline detector option for the first layer of the SuperB Silicon Vertex Tracker (SVT) is a high resistivity double-sided silicon device with short strips (striplets) at 45° angle to the detector's edge. A prototype was tested with a 120 GeV/c pion beam in September 2011 at the SPS-H6 test-beam line at CERN. In this paper studies on efficiency, resolution and cluster size are reported.


2013 - Efficiency droop in InGaN/GaN blue light-emitting diodes: Physical mechanisms and remedies [Articolo su rivista]
Verzellesi, Giovanni; Saguatti, Davide; Meneghini, Matteo; Bertazzi, Francesco; Goano, Michele; Meneghesso, Gaudenzio; Zanoni, Enrico
abstract

Physical mechanisms causing the efficiency droop in InGaN/GaN blue light-emitting diodes and remedies proposed for droop mitigation are classified and reviewed. Droop mechanisms taken into consideration are Auger recombination, reduced active volume effects, carrier delocalization, and carrier leakage. The latter can in turn be promoted by polarization charges, inefficient hole injection, asymmetry between electron and hole densities and transport properties, lateral current crowding, quantum-well overfly by ballistic electrons, defect-related tunneling, and saturation of radiative recombination. Reviewed droop remedies include increasing the thickness or number of the quantum wells, improving the lateral current uniformity, engineering the quantum barriers (including multi-layer and graded quantum barriers), using insertion or injection layers, engineering the electron-blocking layer (EBL) (including InAlN, graded, polarization-doped, and superlattice EBL), exploiting reversed polarization (by either inverted epitaxy or N-polar growth), and growing along semi- or non-polar orientations. Numerical device simulations of a reference device are used through the paper as a proof of concept for selected mechanisms and remedies.


2013 - Functional test of a Radon sensor based on a high-resistivity-silicon BJT detector [Articolo su rivista]
G. F., Dalla Betta; V., Tyzhnevyi; A., Bosi; Bonaiuti, Matteo; C., Angelini; G., Batignani; S., Bettarini; F., Bosi; F., Forti; M. A., Giorgi; F., Morsani; E., Paoloni; G., Rizzo; J., Walsh; A., Lusiani; R., Ciolini; G., Curzio; F., D'Errico; A., Del Gratta; Bidinelli, Luca; Rovati, Luigi; Saguatti, Davide; Verzellesi, Giovanni; L., Bosisio; I., Rachevskaia; M., Boscardin; G., Giacomini; A., Picciotto; C., Piemonte; N., Zorzi; M., Calamosca; S., Penzo; F., Cardellini
abstract

A battery-powered, wireless Radon sensor has been designed and realized using a BJT, fabricated on a high-resistivity-silicon substrate, as a radiation detector. Radon daughters are electrostatically collected on the detector surface. Thanks to the BJT internal amplification, real-time a particle detection is possible using simple readout electronics, which records the particle arrival time and charge. Functional tests at known Radon concentrations, demonstrated a sensitivity up to 4.9 cph/(100 Bq/m3) and a count rate of 0.05 cph at nominally-zero Radon concentration.


2013 - Latest results of the R&D on CMOS MAPS for the Layer0 of the SuperB SVT [Articolo su rivista]
G., Balestri; G., Batignani; G., Beck; A., Bernardelli; A., Berra; S., Bettarini; Bevan, |. A.; L., Bombelli; F., Bosi; L., Bosisio; G., Casarosa; M., Ceccanti; R., Cenci; M., Citterio; S., Coelli; D., Comotti; G. F., Dalla Betta; L., Fabbri; C., Fiorini; G., Fontana; F., Forti; A., Gabrielli; L., Gaioni; F., Gannaway; F., Giorgi; M. A., Giorgi; L., Lanceri; V., Liberali; D., Lietti; A., Lusiani; P., Mammini; A., Manazza; M., Manghisoni; M., Monti; J., Morris; F., Morsani; B., Nasri; N., Neri; B., Oberhof; F., Palombo; L., Pancheri; E., Paoloni; G., Pellegrini; A., Perez; G., Petragnani; M., Prest; M., Povoli; A., Profeti; E., Quartieri; I., Rashevskaya; L., Ratti; V., Re; G., Rizzo; C., Sbarra; N., Semprini Cesari; A., Soldani; A., Stabile; C., Stella; G., Traversi; S., Valentinetti; Verzellesi, Giovanni; M., Villa; L., Vitale; J., Walsh; F., Wilson; A., Zoccoli; S., Zucca
abstract

Physics and high background conditions set very challenging requirements on readout speed, material budget and resolution for the innermost layer of the SuperB Silicon Vertex Tracker operated at the full luminosity. Monolithic Active Pixel Sensors (MAPS) are very appealing in this applications since the thin sensitive region allows grinding the substrate to tens of microns. Deep NWell MAPS, developed in the ST 130nm CMOS technology, achieved in-pixel sparsification and fast time stamping. Further improvements are being explored with an intense R&D program, including both vertical integration and 2D MAPS with the INMAPS quadruple well. We present the results of the characterization with IR laser, radioactive sources and beam of several chips produced with the 3D (Chartered/Tezzaron) process. We have also studied prototypes exploiting the features of the quadruple well and the high resistivity epitaxial layer of the INMAPS 180 nm process. Promising results from an irradiation campaign with neutrons on small matrices and other test-structures, as well as the response of the sensors to high energy charged tracks are presented.


2013 - Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker [Articolo su rivista]
G., Rizzo; D., Comott; M., Manghisoni; V., Re; G., Traversi; L., Fabbri; A., Gabrielli; F., Giorgi; G., Pellegrini; C., Sbarra; N., Semprini Cesari; S., Valentinetti; M., Villa; A., Zoccoli; A., Berra; D., Lietti; M., Prest; A., Bevan; F., Wilson; G., Beck; J., Morris; F., Gannaway; R., Cenci; L., Bombelli; M., Citterio; S., Coelli; C., Fiorini; V., Liberali; M., Monti; B., Nasri; N., Neri; F., Palombo; A., Stabile; G., Balestri; G., Batignani; A., Bernardelli; S., Bettarini; F., Bosi; G., Casarosa; M., Ceccanti; F., Forti; M. A., Giorgi; A., Lusiani; P., Mammini; F., Morsani; B., Oberhof; E., Paoloni; A., Perez; G., Petragnani; A., Profeti; A., Soldani; J., Walsh; M., Chrzaszcz; L., Gaioni; A., Manazza; E., Quartieri; L., Ratti; S., Zucca; G., Alampi; G., Cotto; D., Gamba; S., Zambito; G. F., Dalla Betta; G., Fontana; L., Pancheri; M., Povoli; Verzellesi, Giovanni; M., Bomben; L., Bosisio; P., Cristaudo; L., Lanceri; B., Liberti; I., Rashevskaya; C., Stella; L., Vitale
abstract

In the design of the Silicon Vertex Tracker for the high luminosity SuperB collider, very challenging requirements are set by physics and background conditions on its innermost Layer0: small radius (about 1.5 cm), resolution of 10-15 um in both coordinates, low material budget <1% Xo, and the ability to withstand a background hit rate of several tens of MHz/cm2. Thanks to an intense R&D program the development of Deep NWell CMOS MAPS (with the ST Microelectronics 130 nm process) has reached a good level of maturity and allowed for the first time the implementation of thin CMOS sensors with similar functionalities as in hybrid pixels, such as pixel-level sparsification and fast time stamping. Further MAPS performance improvements are currently under investigation with two different approaches: the INMAPS CMOS process, featuring a quadruple well and a high resistivity substrate, and 3D CMOS MAPS, realized with vertical integration technology. In both cases specific features of the processes chosen can improve charge collection efficiency, with respect to a standard DNW MAPS design, and allow to implement a more complex in-pixel logic in order to develop a faster readout architecture. Prototypes of MAPS matrix, suitable for application in the SuperB Layer0, have been realized with the INMAPS 180 nm process and the 130 nm Chartered/Tezzaron 3D process and results of their characterization will be presented in this paper.


2013 - Study of dosimetric observables to be used in Active Pixel Sensor based devices for Interventional Radiology applications [Relazione in Atti di Convegno]
L., Bissi; P., Placidi; E., Conti; D., Magalotti; M., Paolucci; A., Scorzoni; Verzellesi, Giovanni; L., Servoli; F., Crescioli
abstract

Interventional radiologists and staff members, during all their professional activities, are frequently exposed to protracted low doses of ionizing radiation. The authors present a novel approach to perform on line monitoring of the staff during interventional procedures by using a device based on a CMOS Active Pixel Sensor (APS). The sensor performance as an X-ray radiation detector has been evaluated with a dedicated experimental set-up and dosimetric observables have been assessed from the frames acquired by the sensor using a purposely designed algorithm. A data reduction strategy has also been implemented without significant loss of the performances. Finally a linear correlation with dosimetric measurements made using TLDs has been verified.


2013 - The front-end chip of the SuperB SVT detector [Articolo su rivista]
F., Giorgi; D., Comotti; M., Manghisoni; V., Re; G., Traversi; L., Fabbri; A., Gabrielli; G., Pellegrini; C., Sbarra; N., Semprini Cesari; S., Valentinetti; M., Villa; A., Zoccoli; A., Berra; D., Lietti; M., Prest; A., Bevan; F., Wilson; G., Beck; J., Morris; F., Ganaway; R., Cenci; L., Bombelli; M., Citterio; S., Coelli; C., Fiorini; V., Liberali; M., Monti; B., Nasri; N., Neri; F., Palombo; A., Stabile; G., Balestri; G., Batignani; A., Bernardelli; S., Bettarini; F., Bosi; G., Casarosa; M., Ceccanti; F., Forti; M. A., Giorgi; A., Lusiani; P., Mammini; F., Morsani; B., Oberhof; E., Paoloni; A., Perez; G., Petragnani; A., Profeti; G., Rizzo; A., Soldani; J., Walsh; L., Gaioni; A., Manazza; E., Quartieri; L., Ratti; S., Zucca; G. F., Dalla Betta; G., Fontana; L., Pancheri; M., Povoli; Verzellesi, Giovanni; L., Bosisio; L., Lanceri; I., Rashevskaya; C., Stella; L., Vitale
abstract

The asymmetric e+/e- collider SuperB is designed to deliver a high luminosity, greater than 10^36 cm-2 s-1, with moderate beam currents and a reduced center of mass boost with respect to earlier B-Factories. The innermost detector is the Silicon Vertex Tracker which is made of 5 layers of double sided silicon strip sensors plus a layer 0, that can be equipped with short striplets detectors in a first phase of the experiment. In order to achieve an overall track reconstruction efficiency above 98% it is crucial to optimize both analog and digital readout circuits. The readout architecture being developed for the front-end chips will be able to cope with the very high rates expected in the first layer. The digital readout will be optimized to be fully efficient for hit rates up to 2 MHz/strip, including large margins on the maximum expected background rates, but can potentially accommodate higher rates with a proper tuning of the buffer depth. The readout is based on a triggered architecture where each of the 128 strip channel is provided with a dedicated digital buffer. Each buffer collects the digitized charge information by means of a 4-bit TOT, storing it in conjunction with the related time stamp. The depth of buffers was dimensioned considering the expected trigger latency and hit rate including suitable safety margins. Every buffer is connected to a highly parallelized circuit handling the trigger logic, rejecting expired data in the buffers and channeling the parallel stream of triggered hits to the common output of the chip. The presented architecture has been modeled by HDL language and investigated with a Monte Carlo hit generator emulating the analog front-end behavior. The simulations showed that even applying the highest stressing conditions, about 2 MHz per strip, the efficiency of the digital readout remained above 99.8%.


2012 - Engineering Barrier and Buffer Layers in InGaAs Quantum-Well MOSFETs [Articolo su rivista]
Morassi, Luca; Verzellesi, Giovanni; Han, Zhao; Jack C., Lee; Dmitry, Veksler; Gennadi, Bersuker
abstract

Properties of InGaAs buried-channel quantum-well MOSFETs affected by the barrier and buffer layers are analyzed by numerical simulations to assist device engineering and optimization. The interplay between the charge-neutrality level position at the barrier/dielectric interface and conduction band discontinuity at the barrier/channel interface is shown to critically impact the achievement of an enhancement-mode device with full turn-on. A p-doped buffer is found to be a more suitable option than the standard unintentionally doped buffers to control short-channel effects.


2012 - Errors Limiting Split-CV Mobility Extraction Accuracy in Buried-Channel InGaAs MOSFETs [Articolo su rivista]
Morassi, Luca; Verzellesi, Giovanni; H., Zhao; J. C., Lee; D., Veksler; G., Bersuker
abstract

The accuracy of the split-CV mobility extraction method is analyzed in buried-channel InGaAs MOSFETs with Al2O3 gate dielectric and InP barrier, through a “simulated experiment” procedure using two-dimensional numerical device simulations preliminarily calibrated against experimental IV and CV curves. The different error sources limiting the method accuracy are pointed out. It is suggested that, as a result of these errors, the split-CV method can appreciably underestimate the actual channel mobility in these devices, with an error >20% and >50% on peak and high-VGS mobility, respectively. The method should therefore not be adopted for accurate mobility measurement in this operating regime, but only as a fast response technique providing a conservative estimation of channel mobility. Moreover, the method provides mobility values that rapidly drop below the peak value for decreasing VGS. It is shown that this behavior can be an artifact of the extraction method, that may mask physical mechanisms causing real mobility drop with decreasing channel carrier density like Coulomb scattering mechanisms. This poses limitations to the adoption of split-CV mobility as a reference for mobility model assessment in this operating regime. The proposed methodology can be applied to other III-V field-effect transistors, including both heterostructure-based and inversion-mode devices.


2012 - Investigation of Efficiency-Droop Mechanisms in Multi-Quantum-Well InGaN/GaN Blue Light-Emitting Diodes [Articolo su rivista]
Saguatti, Davide; Bidinelli, Luca; Verzellesi, Giovanni; Meneghini, Matteo; Meneghesso, Gaudenzio; Zanoni, Enrico; Butendeich, Rainer; Hahn, Berthold
abstract

Efficiency-droop mechanisms and related technologicalremedies are critically analyzed in multi-quantum-well (QW) InGaN/GaN blue light-emitting diodes by means of numerical device simulations and their comparison with experimental data. Auger recombination, electron leakage, and incomplete QW carrier capture can separately produce droop effects in quantitative agreement with experimental data, but “extreme” values, at the limit of or outside their generally accepted range, must be imposed for related droop-controlling parameters. Less stringent conditions are needed if combinations of the aforementioned mechanisms are assumed to act jointly. Applying technological/structural modifications like QW thickness or number increase and barrier p-type doping leads to distinctive effects on droop characteristics depending on the assumed droop mechanism. Increasing the QW number appears, in particular, to be the most effective droop remedyin case the phenomenon is induced by Auger recombination. Possible technology-dependent variation of droop-controlling parameters and/or multiple droop mechanisms can, however, makediscrimination of droop origin on the basis of the effects of applied technological remedies very difficult.


2012 - Performance of a Radon Sensor Based on a BJT Detector on High-Resistivity Silicon [Relazione in Atti di Convegno]
A., Bosi; Bidinelli, Luca; Saguatti, Davide; G. F., Dalla Betta; V., Tyzhnevyi; Rovati, Luigi; Verzellesi, Giovanni; G., Batignani; S., Bettarini; F., Forti; F., D'Errico; A., Del Gratta; L., Bosisio; I., Rachevskaia; M., Boscardin; G., Giacomini; M., Calamosca; S., Penzo; F., Cardellini
abstract

An autonomous Radon sensor with wireless connectivity has been developed, using a BJT detector on high-resistivity silicon as alpha-particle detector. Charged Radon daughters are collected on the detector surface electrostatically. Thanks to the BJT internal amplification, real-time alpha particle detection is made possible using a very simple readout electronics which records alpha-particle arrival time and charge. Functional tests at known Radon concentrations demonstrated a sensitivity up to 4.9 cph/(100 Bq/m3), which translates into the capability of detecting a Radon concentration of 200±20 Bq/m3 and 500±50 Bq/m3 after 10 and 4 h, respectively. The count rate at nominally-zero Radon concentration was 0.05 cph.


2011 - Analysis of efficiency-droop mechanisms in GaN-based light-emitting diodes, related technological solutions and discriminating experiments [Abstract in Atti di Convegno]
Saguatti, Davide; Verzellesi, Giovanni; M., Meneghini; G., Meneghesso; E., Zanoni; R., Butendeich; B., Hahn
abstract

GaN LEDs suffer from the efficiency droop, limiting their use in applications like general lighting and projection displays. Different mechanisms have been held responsible for the droop. Different technological solutions have correspondingly been devised, and discriminating experiments have been proposed. We will report on a systematic analysis of above aspects (mechanisms, solutions, and experiments) carried out by means of numerical device simulations and their comparison with experimental results. Aims are (i) to improve the insight into the droop mechanism(s), (ii) to provide guidelines for LED optimization.


2011 - Analysis of efficiency-droop mechanisms in single-quantum-well InGaN/GaN light-emitting diodes [Abstract in Atti di Convegno]
Saguatti, Davide; Verzellesi, Giovanni; Bidinelli, Luca; M., Meneghini; G., Meneghesso; E., Zanoni; R., Butendeich; B., Hahn
abstract

In this work, we investigate different mechanisms that have been proposed to be at the origin of the efficiency droop, by comparing numerical device simulations with measurements from single-quantum-well (SQW) InGaN/GaN LEDs. The suitability of each mechanism to explain the droop as observed in the adopted devices and the impact on the droop effect of possible technological modifications are investigated.


2011 - BJT detector for alpha-particle and Radon detection and monitoring [Relazione in Atti di Convegno]
V., Tyzhnevyi; G. F., Dalla Betta; Verzellesi, Giovanni; L., Bosisio; G., Batignani; G., Giacomini; A., Picciotto
abstract

In this work we report on the first results of functional characterization of a new batch of BJT detectorsfabricated at FBK-irst (Trento, Italy). The results confirmed that BJT detectors can be efficiently used for alpha-particle detection and consequently for radon detection. Moreover, analysis of the performance of detectors under different temperatures has shown that the detector can be efficiently used in a rather wide range of temperatures (0° - 30° C) confirming that the detector can be used both in indoor and outdoor applications.


2011 - BJT detector with FPGA-based read-out for alpha particle monitoring [Articolo su rivista]
V., Tyzhnevyi; G. F., Dalla Betta; Rovati, Luigi; Verzellesi, Giovanni; N., Zorzi
abstract

In this work we introduce a new prototype of readout electronics (ALPHADET), which was designed for an a-particle detection system based on a bipolar junction transistor (BJT) detector. The system uses an FPGA, which provides many advantages at the stage of prototyping and testing the detector. The main design and electrical features of the board are discussed in this paper, along with selected results from the characterization of ALPHADET coupled to BJT detectors.


2011 - Design and characterization of current-assisted photonic demodulators in 0.18-um CMOS technology [Articolo su rivista]
G. F., Dalla Betta; S., Donati; Q. D., Hossain; G., Martini; L., Pancheri; Saguatti, Davide; D., Stoppa; Verzellesi, Giovanni
abstract

We report on the design of a Current-Assisted Photonic Demodulator (CAPD) using a standard 0.18-um CMOS technology, and its electro-optical characterization. The device can perform both light detection and demodulation in the charge domain, owing to a drift field generated in the silicon substrate by a majority carrier flow. Minimum-size, 10×10 um2 CAPDs exhibit a DC charge-transfer efficiency larger than 80% (corresponding to a demodulation contrast larger than 40% under sine-wave modulation) at the modest power consumption of 10 uW, and a 3-dB bandwidth > 45 MHz. An excellentlinearity with an error lower than 0.11% is obtained in phasemeasurements. CAPDs with optimized modulation-electrode geometries are finally designed, aiming at improved contrast-vs-power trade-off.


2011 - Dispositivo e metodologia per la misura di concentrazione di gas radon [Brevetto]
Bidinelli, Luca; Bonaiuti, Matteo; Bosi, Andrea; DALLA BETTA GIAN, Franco; Rovati, Luigi; Saguatti, Davide; Verzellesi, Giovanni
abstract

Un dispositivo di misura della concentrazione di gas Radon comprende una camera di misura (20) dotata di un dispositivo rivelatore (23), atto a rivelare particelle alfa da gas Radon; il dispositivo dell’invenzione comprende inoltre un elettrodo di raccolta (22) esterno alla camera di misura(20), atto a raccogliere i prodotti di decadimento del Radon elettricamente carichi provenienti dalla camera di misura (20).Un’unità di controllo (30) temporizza il passaggio tra due fasi operative (I, II) in cui il dispositivo rivelatore (23) e l’elettrodo di raccolta (22) sono attivi non contemporaneamente. [FIG. 1]


2011 - Errors affecting split-CV mobility measurements in InGaAs MOS-HEMTs [Relazione in Atti di Convegno]
Morassi, Luca; Verzellesi, Giovanni; Larcher, Luca; H., Zhao; J. C., Lee
abstract

The accuracy of the split-CV mobility extraction method is analyzed in implant-free, buried-channel InGaAs MOS-HEMTs with Al2O3 gate dielectric through a “simulated experiment” procedure. The different error sources affecting the method accuracy are pointed out. As a result of these errors, the split-CV mobility can appreciably underestimate the actual channel mobility under on-state conditions.


2011 - Experimental/numerical investigation of buried-channel InGaAs MOS-HEMTs with Al2O3 gate dielectric [Relazione in Atti di Convegno]
Morassi, Luca; Verzellesi, Giovanni; Pavan, Paolo; D., Veksler; I., Ok; H., Zhao; J. C., Lee; G., Bersuker
abstract

We analyze the electrical behavior of buried-channel InGaAs MOS-HEMTs with Al2O3 gate dielectric by means of measurements and numerical device simulations, with the aim of pointing out peculiar aspects that can be critical for device design/optimization purposes. Our analysis focuses in particular on effects associated with traps at the dielec-tric/barrier interface and unintentional doping in the buffer layer, showing their combined impact on crucial device pa-rameters like threshold voltage, subthreshold slope and drain-bias dependence of subthreshold drain current.


2011 - Improvement of breakdown and DC-to-pulse dispersion properties in field-plated InGaAs-InAlAs pHEMTs [Relazione in Atti di Convegno]
Saguatti, Davide; M., Mohamad Isa; K. W., Ian; Chini, Alessandro; Verzellesi, Giovanni; Fantini, Fausto; M., Missous
abstract

We report on novel, high voltage InGaAs-InAlAs pHEMTs, which have been processed on an optimized epilayer and incorporate field-plate structures of different dimensions. Fabricated devices demonstrate great improvements in break-down voltage and gate leakage, while keeping the same DC and RF behaviour with respect to baseline devices, i.e. with no field-plate implemented. In addition, the field plate strongly attenuates DC-to-pulse dispersion, making these devices suitable for high-power-density RF power amplifiers.


2011 - Interface-trap effects in inversion-type enhancement-mode InGaAs/ZrO2 n-channel MOSFETs [Articolo su rivista]
Morassi, Luca; Padovani, Andrea; Verzellesi, Giovanni; D., Veksler; I., Ok; G., Bersuker
abstract

Interface-trap effects are analyzed in inversion-type enhancement-mode In0.53Ga0.47As/ZrO2 and In0.53Ga0.47As/In0.2Ga0.8As/ZrO2 n-channel MOSFETs bycomparing the measurements and the numerical device simulationsof dc transfer characteristics. Device simulations can reproduce measured threshold voltages under the hypothesis thatinterface traps are donorlike throughout the InGaAs band gap,allowing for strong inversion operation regardless of the relativelyhigh interface-trap density. The effects induced by the donorlikeinterface traps in MOSFETs having a thin In0.2Ga0.8As cap layer interposed between gate dielectric and channel are qualitatively different from those observed in standard MOSFETs (without the cap). Increasing the donorlike trap density decreases the threshold voltage in capped devices, whereas it leaves it unchanged in uncapped ones. As a result, donorlike interface traps can explain the threshold-voltage difference observed in MOSFETs with and without the cap.


2011 - Sensori per la rivelazione del Radon [Spin Off]
Rovati, Luigi; Verzellesi, Giovanni; Gian franco Della, Betta; Luca, Bidinelli; Davide, Saguatti; Andrea, Bosi; Matteo, Bonaiuti
abstract


2011 - TOF-range image sensor in 0.18μm CMOS technology based on current assisted photonic demodulators [Relazione in Atti di Convegno]
G. F., Dalla Betta; S., Donati; Q. D., Hossain; G., Martini; L., Pancheri; D., Stoppa; Verzellesi, Giovanni
abstract

We report on a 0.18μm CMOS range image sensor with 120×160 array of 10×10μm2 photonic demodulation pixels allowing for real-time 3D imaging with a worst-case accuracy of 3.3% in the distance interval [1.2-3.7] m.


2010 - A 180-nm CMOS Time-of-Flight 3-D Image Sensor [Relazione in Atti di Convegno]
G. F., Dalla Betta; L., Pancheri; D., Stoppa; S., Donati; G., Martini; Verzellesi, Giovanni
abstract

We report on the design and the experimental characterization of a new 3-D image sensor, based on a new 180-nm CMOS-compatible photo-detector, which features an internal demodulation mechanism effective up to high frequencies. The distance range covered by our proof-of-concept device spans from 1 m to a few meters, and the resolution is about 1 cm.


2010 - A 2.4-GHz wireless alpha-ray sensor for remote monitoring and spectroscopy [Relazione in Atti di Convegno]
Rovati, Luigi; Verzellesi, Giovanni; Bonaiuti, Matteo; Bidinelli, Luca; Saguatti, Davide; G. F., Dalla Betta; V., Tyzhnevyi; N., Zorzi; S., Bettarini
abstract

Wireless alpha-ray device has been designed, realizedand tested in operation. The first prototype is a battery-suppliedsystem with a compact package and wireless communicationcapability. One of the more attractive features is its ability tooperate in a star network (single point-to-multipoint). The sensorrecords the arrival time of the alpha particles and the spectrumof the produced charge; it transmits this information in regulartime intervals or upon request to the base station. The overallsystem has a compact package suitable for remote alpha-rayspectroscopy.


2010 - Analysis of DC and rf degradation of AlGaN/GaN High Electron Mobility Transistors based on pulsed measurements and spectroscopic techniques [Abstract in Atti di Convegno]
Zanoni, E.; Chini, Alessandro; Stocco, A.; Rossetto, I.; Meneghini, M.; Rampazzo, F.; Ronchi, N.; Tazzoli, A.; Verzellesi, Giovanni; Meneghesso, G.
abstract

The experimentally observed DC and rf degradation of AlGaN/GaN High Electron Mobility Transistors has been analyzed and discussed by means of pulsed measurements and spectroscopic techniques.


2010 - Analysis of current collapse effect in AlGaN/GaN HEMT: experiments and numerical simulations [Articolo su rivista]
M., Faqir; M., Bouya; N., Malbert; N., Labat; D., Carisetti; B., Lambert; Verzellesi, Giovanni; Fantini, Fausto
abstract

In this work, current collapse effects in AlGaN/GaN HEMTs are investigated by means of measurements and two-dimensional physical simulations. According to pulsed measurements, the used devices exhibit a significant gate-lag and a less pronounced drain-lag ascribed to the presence of surface/barrier and buffer traps, respectively. As a matter of fact, two trap levels (0.45 eV and 0.78 eV) were extracted by trapping analysis based on isothermal current transient. On the other hand, 2D physical simulations suggest that the kink effect can be explained by electron trapping into barrier traps and a consequent electron emission after a certain electric-field is reached.


2010 - Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs [Relazione in Atti di Convegno]
Morassi, Luca; Verzellesi, Giovanni; Padovani, Andrea; Larcher, Luca; Pavan, Paolo; D., Veksler; Injo, Ok; G., Bersuker
abstract

Interface-trap effects are analyzed in inversion-type, self-aligned In0.53Ga0.47As and In0.53Ga0.47As/In0.2Ga0.8As MOSFETs with ALD ZrO2 gate dielectric. Interface-trap densities in the order of 1e13 cm-2 eV-1 are required to explain the measured subthreshold slopes. For these Dit values, donor-like interface traps are compatible with threshold-voltage values in the 0-0.15 V range as those observed in these devices. Moreover, the presence of donor-like interface traps can explain the negative threshold-voltage shift induced by the inclusion of the In0.2Ga0.8As cap layer, as the result of the influence of interface traps located at the In0.2Ga0.8As/ZrO2 interface on the inversion channel forming at the In0.53Ga0.47As/In0.2Ga0.8As interface.


2010 - Dispositivo per la ripresa di immagini 3D basato su tecnologiaCMOS 180nm e telemetria a modulazione sinusoidale [Relazione in Atti di Convegno]
G. F., Dalla Betta; Q. D., Hossain; S., Donati; G., Martini; M., Fathi; E., Randone; Verzellesi, Giovanni; Saguatti, Davide; D., Stoppa; L., Pancheri; N., Massari
abstract

We present the design and a few preliminary results for a 3-D camera based on a new CMOS compatible photo-detector providing an internal demodulation mechanism. The device has on-board pixel processing of the phase-to-distance signal and works in connection with a laser illuminator emitting 0.2 to 4 W of optical power modulated at a frequency of 20 to 50 MHz, to cover a range of distance 5 to 50 m with resolution of 1-5 cm.


2010 - Fabrication of novel high frequency and high breakdown InAlAs-InGaAs pHEMTs [Relazione in Atti di Convegno]
M., Mohamad Isa; Saguatti, Davide; Verzellesi, Giovanni; Chini, Alessandro; K. W., Ian; M., Missous
abstract

This paper presents a Novel low noise, high breakdown InAlAs/InGaAspseudomorphic High Electron Mobility Transistors (pHEMTs). Theimprovements in breakdown voltage are brought about by a judiciouscombination of epitaxial layer design and field plate techniques. No significant degradations of DC and RF characteristics are observed for devices with field plate structures. An outstanding improvement in breakdown voltages of >30% is attained by field plate devices which should allow their usage in efficient high-added power efficiency amplifiers design.


2010 - Laser and alpha particle characterization of floating-base BJT detector [Articolo su rivista]
V., Tyzhnevyi; G., Batignani; L., Bosisio; G. F., Dalla Betta; Verzellesi, Giovanni; N., Zorzi
abstract

In this work, we investigate the detection properties of existing prototypes of BJT detectors operated with floating base. We report about results of two functional tests. The charge-collection properties of BJT detectors were evaluated by means of a pulsed laser setup. The response to alfa-particles emitted fromradioactive 241Am source are also presented. Experimental results show that current gains of about 450 with response times in the order of 50 ms are preserved even in this non-standard operation mode, in spite of a non-optimized structure.


2010 - Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics [Relazione in Atti di Convegno]
Morassi, Luca; Padovani, Andrea; Verzellesi, Giovanni; D., Veksler; I., Ok; G., Bersuker
abstract

In this paper, we use 2D numerical device simulations [Sentaurus Device, Synopsys Inc.] to investigate the impact of interface traps on the electrical characteristics of MOSFETs and MOSHEMTs with InGaAs channel and high-k gate dielectrics. More specifically, the following two technologies are taken into consideration: A) self-aligned inversion-type InGaAs/ZrO2 MOSFETs; B) implant-free InGaAs/Al2O3 MOSHEMTs.


2010 - TCAD optimization of field-plated InAlAs-InGaAs HEMTs [Relazione in Atti di Convegno]
Saguatti, Davide; Chini, Alessandro; Verzellesi, Giovanni; M., Mohamad Isa; K. W., Ian; M., Missous
abstract

High-voltage InGaAs-InAlAs HEMTs featuring optimized field-plate structures are being developed. A TCAD approach has been adopted for their design. Two-dimensional device simulations have preliminarily been calibrated by comparison with DC and RF measurements from the baseline InP HEMT technology into which the field plate is being incorporated. Simulations have then been used to design field-plate structures with optimal length andpassivation thickness.


2009 - A 4096-pixel MAPS device with on-chip data sparsification [Articolo su rivista]
A., Gabrielli; G., Batignani; S., Bettarini; F., Bosi; G., Calderini; R., Cenci; M., Dell’Orso; F., Forti; P., Giannetti; M. A., Giorgi; A., Lusiani; G., Marchiori; F., Morsani; N., Neri; E., Paoloni; G., Rizzo; J., Walsh; C., Andreoli; L., Gaioni; E., Pozzati; L., Ratti; V., Speziali; M., Manghisoni; V., Re; G., Traversi; M., Bomben; L., Bosisio; G., Giacomini; L., Lanceri; I., Rachevskaia; L., Vitale; G. F., Dalla Betta; G., Soncini; G., Fontana; L., Pancheri; Verzellesi, Giovanni; D., Gamba; G., Giraudo; P., Mereu; R., Di Sipio; M., Bruschi; B., Giacobbe; F., Giorgi; C., Sbarra; N., Semprini; R., Spighi; S., Valentinetti; M., Villa; A., Zoccoli
abstract

A prototype of a mixed-mode ASIC composed of a fast readout architecture that interfaces with a matrix of 4096 Monolithic Active Pixel Sensor (MAPS) was fabricated via STM 130nm CMOS technology. Groups of 44 pixels formamacro-pixel (MP). The readout architecture is parallel and could overcome the readout speed limit of big matrices.As the output port can only accept one-hit information at a time, an internal queuing system has been provided to face high hit-rate conditions.The ASIC can work in two different manners as it can be connected to an actual full custom matrix of MAPS or to a digital matrix emulator composed of standard cells, for testing facilities. For both operating modes a slow-control phase is required to load the chip configuration. Previous versions of similar ASICs were designed and tested.The work is aimed at improving the design of MAPS detectors with an on-chip fast sparsification system,for particle tracking,to match the requirements of future high-energy physics experiments. The readout architecture implemented is data driven extending the flexibility of the system to be also used in first level triggers on tracks in vertex detectors. Preliminary simulations and tests indicate that the readout system can cope with an average hit-rate up to100 MHz/cm2 if a master clock of 80MHz is used, while maintaining an overall efficiency over 99%.


2009 - Alpha-particle detection based on the BJT detector and simple, IC-based readout electronics [Articolo su rivista]
Rovati, Luigi; S., Bettarini; Bonaiuti, Matteo; L., Bosisio; G. F., Dalla Betta; V., Tyzhnevyi; Verzellesi, Giovanni; N., Zorzi
abstract

In this paper we propose a portable instrument for alpha-particle detection based on apreviously-developed BJT detector and a simple, IC-based readout electronics. Experimental testsof the BJT detector and readout electronics are reported. Numerical simulations are adopted topredict the performance enhancement achievable with optimized BJT detectors.


2009 - Design of field-plated InP-based HEMTs [Abstract in Atti di Convegno]
Saguatti, Davide; DI LECCE, Valerio; Esposto, Michele; Chini, Alessandro; Fantini, Fausto; Verzellesi, Giovanni; Boulay, S.; Bouloukou, A.; Boudjelida, B.; Missous, M.
abstract

The design of field-plated InP-based HEMTs is presented by means of numerical simulations tools aimed at the optimization of device breakdown voltages.


2009 - False surface-trap signatures induced by buffer traps in AlGaN-GaN HEMTs [Relazione in Atti di Convegno]
Verzellesi, Giovanni; Faqir, Mustapha; Chini, Alessandro; Fantini, Fausto; Meneghesso, G.; Zanoni, E.; Danesin, F.; Zanon, F.; Rampazzo, F.; Marino, F. A.; Cavallini, A.; Castaldini, A.
abstract

Buffer traps can induce “false” surface-trap signatures in AlGaN-GaN HEMTs, namely the same type of current-mode DLTS peaks and pulse responses that are generally attributed to surface traps. Device simulations are adopted to clarify the underlying physics. Being aware of the above phenomenon is important for both reliability testing and device optimization, as it can lead to erroneous identification of the degradation mechanism, thus resulting in inappropriate correction actions on the technological process.


2009 - Influence of interface states at Schottky junction on the large signal behaviour of Cu-gate standard AlGaN/GaN HEMTs [Abstract in Atti di Convegno]
Esposto, Michele; DI LECCE, Valerio; Bonaiuti, Matteo; Fantini, Fausto; Verzellesi, Giovanni; De Guido, S.; De Vittorio, M.; Passaseo, A.; Chini, Alessandro
abstract

Copper (Cu)-gate AlGaN/GaN High Electron Mobility Transistors have been already proposed by Ao et al. [5] and more recently by Sun et al. [6]. Gate leakage currents, Schottky barrier heights and other small signal parameters have found to be very interesting for Cu-gate devices. The aim of our work is to evaluate the large signal characteristics, giving a direct comparison between Cu-gate device and Ni/Au-gate one.


2009 - Long-term stability of Gallium Nitride High Electron Mobility Transistors: a reliability physics approach [Relazione in Atti di Convegno]
E., Zanoni; G., Meneghesso; M., Meneghini; A., Tazzoli; N., Ronchi; A., Stocco; F., Zanon; Chini, Alessandro; Verzellesi, Giovanni; A., Cetronio; C., Lanzieri; M., Peroni
abstract

Several groups have demonstrated nitride-based High Electron Mobility Transistors with excellent rf output power, with a constant increase in performances. However, despite the large efforts spent in the last few years, and the progress in MTTF (Mean Time To Failure) values, reliability of GaN HEMTs (High Electron Mobility Transistors) and MMICs (Millimeter Microwave Integrated Circuits) still has to be fully demonstrated, due to the continuous evolution of adopted processes and technologies, and to the lack of information concerning failure modes and mechanisms. The role of temperature in promoting GaN HEMT failure is controversial, and the factors accelerating degradation are largely unknown. This paper proposes a methodology for the analysis of failure modes and mechanisms of GaN HEMTs, based on the extensive characterization of deep levels using Deep Level Transient Spectroscopy (DLTS) and pulsed measurements, on the detailed analysis of electrical characteristics, and on comparison with two-dimensional device simulations. Results of failure analysis using various microscopy and spectroscopy techniques are presented and failure mechanisms observed at the high electric field values typical of the operation of these devices are reviewed.


2009 - On-Chip Fast Data Sparsification for a Monolithic 4096-Pixel Device [Articolo su rivista]
Alessandro, Gabrielli; G., Batignani; S., Bettarini; F., Bosi; G., Calderini; R., Cenci; M., Dell'Orso; F., Forti; P., Giannetti; M. A., Giorgi; A., Lusiani; G., Marchiori; F., Morsani; N., Neri; E., Paoloni; G., Rizzo; J., Walsh; C., Andreoli; L., Gaioni; E., Pozzati; L., Ratti; V., Speziali; M., Manghisoni; V., Re; G., Traversi; M., Bomben; L., Bosisio; G., Giacomini; L., Lanceri; I., Rachevskaia; L., Vitale; G. F., Dalla Betta; G., Soncini; G., Fontana; L., Pancheri; Verzellesi, Giovanni; D., Gamba; G., Giraudo; P., Mereu; R., Di Sipio; M., Bruschi; B., Giacobbe; F., Giorgi; N., Semprini; C., Sbarra; R., Spighi; S., Valentinetti; M., Villa; A., Zoccoli
abstract

The paper describes a mixed-mode ASIC composed of a fast readout architecture that interfaces with a matrix of 4096 Monolithic Active Pixel Sensors (MAPS). The matrix has 128 columns and 32 rows of pixels and is divided into 256 regions of 4x4 pixels, named macro-pixels (MPs). The chip is an upgrade of a smaller version having 256 pixels that was designed and tested. The two chips were designed via STM 130 nm CMOS technology. The pixel dimension is 50 by 50 um2. The work is aimed at improving the design of MAPS detectors with an on-chip fast sparsification system, for particle tracking, to match the requirements of future high-energy physics experiments. The readout architecture implemented is data driven to extend the flexibility of the system, to be also used in first level triggers on tracks in vertex detectors. Simulations indicate that the readout system can cope with an average hit rate up to 100 MHz/cm2 if a master clock of 80 MHz is used, while maintaining an overall efficiency over 99%.


2008 - Characterization and Numerical Simulations of High Power Field-Plated pHEMTs [Relazione in Atti di Convegno]
Chini, Alessandro; Esposto, Michele; Verzellesi, Giovanni; S., Lavanga; C., Lanzieri; A., Cetronio
abstract

This paper presents the results obtained both by experimental measurements and numerical simulations carried out on state-of-the-art Field-Plated GaAs-based pHEMTs. The effect of field-plate length on DC and RF operation of pHEMTs will be discussed showing that the adoption of an optimal fieldplate structure can significantly boost the device RF power performance, resulting in power density up to 2W/mm measured under continuous wave RF signals at 2GHz. The physical origin of the DC-to-RF dispersion in the fabricated devices has been associated with a hole-trap located at 0.65eV from the valence band as obtained from current-DLTS measurements. The experimental results will also be supported and validated by numerical simulations. It will be shown that the beneficial effects arising from the adoption of the field-plate structure lie in its control on the trapped charge population responsible for the DC-to-RF dispersion mechanism.


2008 - Effects of Surface and Buffer Traps in Passivated AlGaN-GaN HEMT [Abstract in Atti di Convegno]
Faqir, Mustapha; Verzellesi, Giovanni; Chini, Alessandro; Fantini, Fausto; Danesin, F.; Rampazzo, F.; Meneghesso, G.; Zanoni, E.; Labat, N.; Touboul, A.; Dua, C.
abstract

The effects of surface and buffer traps in passivated AlGaN-GaN HEMT on their pulsed I-V characteristics has been investigated by means of numerical simulations.


2008 - Effects of surface and buffer traps in passivated AlGaN/GaN HEMTs [Abstract in Atti di Convegno]
Faqir, Mustapha; Verzellesi, Giovanni; Chini, Alessandro; Fantini, Fausto; F., Danesin; F., Rampazzo; G., Meneghesso; E., Zanoni; N., Labat; A., Touboul; C., Dua
abstract

The physical mechanisms underlying RF current collapse effects in AlGaN-GaN HEMTs are investigated by means of measurements and numerical device simulations. Our study suggests that 1) both surface and buffer traps can contribute to RF current collapse through a similar physical mechanism involving capture/emission of electrons tunneling from the gate; 2) surface passivation strongly mitigate RF current collapse, by reducing the surface electric field and inhibiting electron injection into traps; 3) for surface donor trap densities lower than 9e12 /cm2, surface potential barriers in the 1-2 eV range can coexist with surface traps having much a shallower energy depth and inducing, therefore, current-collapse effects characterized by relatively short time constants.


2008 - Influence of Device Self-Heating on the Activation Energy Extraction During Current-DLTS Measurement [Abstract in Atti di Convegno]
Chini, Alessandro; Esposto, Michele; Bonaiuti, Matteo; Verzellesi, Giovanni; Zanon, F.; Zanoni, E.; Meneghesso, G.
abstract

Results obtained by current-DLTS measurements on GaN-based HEMTs are presented. It is shown that device self-heating can significantly influence the extraction of trap ionization energy leading to a large underestimation of the latter.


2008 - Investigation of High-Electric-Field Degradation Effects in AlGaN/GaN HEMTs [Articolo su rivista]
Faqir, Mustapha; Verzellesi, Giovanni; G., Meneghesso; E., Zanoni; Fantini, Fausto
abstract

High-electric-field degradation phenomena are investigated in GaN-capped AlGaN-GaN HEMTs by comparing experimental data with numerical device simulations. 150-hour DC stresses were carried out under power-state and off-state conditions. Degradations effects characterizing both stress experiments were: a drop in the DC drain current, the amplification of gate-lag effects, and a decrease in the reverse gate leakage current. Numerical simulations indicate that the simultaneous generation of surface (and/or barrier) traps and of buffer traps can account for all of the above degradation modes. Experiments showed also that the power-state stress induced a drop in the transconductance at high gate-source voltages only, whereas the off-state stress led to a uniform transconductance drop over the entire gate-source-voltage range. This behavior can be reproduced by simulations provided that, under power-state stress, traps are assumed to accumulate over a wide region extending laterally from the gate edge towards the drain contact, whereas, under off-state stress, trap generation is supposed to take place in a narrower portion of the drain access region close to the gate edge and to be accompanied by a significant degradation of the channel transport parameters.


2008 - Mechanisms of RF Current Collapse in AlGaN–GaN High Electron Mobility Transistors [Articolo su rivista]
Faqir, Mustapha; Verzellesi, Giovanni; Chini, Alessandro; Fantini, Fausto; Danesin, F.; Meneghesso, G.; Zanoni, E.; Dua, C.
abstract

The physical mechanisms underlying RF current collapse effects in AlGaN-GaN HEMTs are investigated by means of measurements and numerical device simulations. Our study suggests that 1) both surface and buffer traps can contribute to RF current collapse through a similar physical mechanism involving capture and emission of electrons tunneling from the gate; 2) surface passivation strongly mitigates RF current collapse by reducing the surface electric field and inhibiting electron injection into traps; 3) for surface-trap densities lower than 9e12 cm-2, surface potential barriers in the 1-2 eV range can coexist with surface traps having much a shallower energy and therefore inducing RF current collapse effects characterized by relatively-short time constants.


2008 - Radon alpha-ray detector based on a high-resistivity-silicon BJT and a low-cost readout electronics [Relazione in Atti di Convegno]
Rovati, Luigi; Verzellesi, Giovanni; Bonaiuti, Matteo; G., Batignani; L., Bosisio; G. F., Dalla Betta; G., Giacomini; C., Piemonte; N., Zorzi
abstract

Radon dosimetry yields valuable information about radioactive health risks in closed environments. Indeed, World Health Organization (WHO) and the International Agency for Research on Cancer (IARC) have recently classified radon as a human carcinogen and have demonstrated a correlation between environmental radon concentration and lung cancer risk. Dose measurements are traditionally based on laboratory analysis of alpha-ray traces in ionization chambers exposed to environmental air. In this paper we propose a portable instrument for real-time radon alpha-ray detection based on a previously-developed high-resistivity-silicon BJT sensor and a low-cost, IC-based readout electronics.


2008 - Reliability of GaN high-electron-mobility transistors: state of the art and perspectives [Articolo su rivista]
G., Meneghesso; Verzellesi, Giovanni; F., Danesin; F., Rampazzo; F., Zanon; A., Tazzoli; M., Meneghini; E., Zanoni
abstract

Failure modes and mechanisms of AlGaN/GaN High Electron Mobility Transistors are reviewed. Data from three DC accelerated tests are presented, which demonstrate a closecorrelation between failure modes and bias point. Maximum degradation was found in “semion” conditions, close to the maximum of hot electron generation which was detected with theaid of electroluminescence measurements. This suggests a contribution of hot-electron effects to device degradation, at least at moderate drain bias (Vds < 30 V). A procedure for the characterization of hot carrier phenomena based on electroluminescence microscopy and spectroscopy is described. At high drain bias (Vds> 30 V - 50 V) new failure mechanisms are triggered, which induce an increase of gate leakage current. The latter is possibly related with the inverse piezoelectric effect leading to defect generation due to strain relaxation, and/or to localized permanent breakdown of the AlGaN barrier layer.Results are compared with literature data throughout the text.


2008 - Trapping phenomena in field-plated high power GaAs pHEMTs [Abstract in Atti di Convegno]
Chini, Alessandro; DI LECCE, Valerio; Esposto, Michele; Verzellesi, Giovanni; Lavanga, S.; Cetronio, A.; Lanzieri, C.
abstract

This paper presents the results obtained both by experimental measurements and numerical simulations carried out on state-of-the-art field plated GaAs-based pHEMTs.The effect of the field-plate length on DC and RF operation will be discussed showing that the adoption of an optimal field-plate structure can significantly boost the device RF power performance, resulting in power density up to 2W/mm measured at 2 GHz.


2007 - A review of failure modes and mechanisms of GaN-based HEMTs [Relazione in Atti di Convegno]
E., Zanoni; G., Meneghesso; Verzellesi, Giovanni; F., Danesin; M., Meneghini; F., Rampazzo; A., Tazzoli; F., Zanon
abstract

Failure modes and mechanisms of AlGaN/GaN HEMTs, observed during accelerated tests at various bias conditions are reviewed.


2007 - Analysis of High-Electric-Field Degradation in AlGaN/GaN HEMTs [Relazione in Atti di Convegno]
Faqir, Mustapha; Chini, Alessandro; Verzellesi, Giovanni; Fantini, Fausto; Rampazzo, F.; Meneghesso, G.; Zanoni, E.; Kordos, P.
abstract

High-electric-field degradation phenomena are investigated in GaN-capped AlGaN-GaN HEMTs by comparing experimental data with numerical device simulations. Simulations indicate that the stress-induced amplification of gate-lag effects and the correlated gate-leakage-current reduction can be ascribed to the generation of acceptor traps at the gate-drain surface and/or in the device barrier. The drop in DC drain current observed after stress should rather be attributed to trap accumulation within the GaN buffer region. Only the simultaneous generation of surface (and/or barrier) and buffer traps can account for all of the observed degradation modes. Simulations suggest also that under power-state stress traps should accumulate over a wide region extending laterally from the gate edge towards the drain contact, whereas, under off-state stress, trap generation should rather take place in a narrower portion of the drain access region close to the gate edge and should be accompanied by a significant degradation of the channel transport parameters. Channel hot electrons and electric-field-induced strain-enhancement are finally suggested to play major roles in power-state and off-state degradation, respectively.


2007 - Application of the BJT Detector for Simple, Low-Cost, and Low-Power Alpha-Particle Detection Systems [Relazione in Atti di Convegno]
Verzellesi, Giovanni; G., Batignani; Bonaiuti, Matteo; L., Bosisio; G. F., DALLA BETTA; G., Giacomini; C., Piemonte; Rovati, Luigi; N., Zorzi
abstract

We present a simple, low-cost, and low-power alpha-particle detection system for environmental radioactivity monitoring. The system exploits a previuosly-developed high- resistivity-silicon detector with internal amplification capability based on the bipolar-transistor (BJT) effect and readout electronics based on commercial IC's. Two-dimensional numerical device simulations are adopted to assess the feasibility of the BJT detector as an alpha-particle detector that can be operated, without losing its internal signal amplification capability, with floating base and low collector voltages, so that device technology can be kept simple, very small DC power consumption can be achieved, and a single 5-V power-supply voltage can be used for readout electronics and detector biasing. The charge amplification accomplished by the BJT detector allows a single, commercial chip to be adopted, to perform charge preamplification and 20-bit A/D conversion. The digital output is sent to a low-cost microcontroller that can be periodically interrogated through the IR port. The cost of the readout electronics is in the order of 60$ and it can operate with standard Li-ion battery for about 60 hours.


2007 - Characterization and analysis of trap-related effects in AlGaN/GaN HEMTs [Articolo su rivista]
Faqir, Mustapha; Verzellesi, Giovanni; Fantini, Fausto; F., Danesin; F., Rampazzo; G., Meneghesso; E., Zanoni; A., Cavallini; A., Castaldini; N., Labat; A., Touboul; C., Dua
abstract

Traps are characterized in AlGaN-GaN HEMTs by means of DLTS techniques and the associated charge/discharge behavior is interpreted with the aid of numerical device simulations. Under specific bias conditions, buffer traps can produce “false” surface-trap signals, i.e. the same type of current-mode DLTS (I-DLTS) or ICTS signals that are generally attributed to surface traps. Clarifying this aspect is important for both reliability testing and device optimization, as it can lead to erroneous identification of the degradation mechanism, thus resulting in wrong correction actions on the technological process.


2007 - Development of deep N-well monolithic active pixel sensors in a 0.13 um CMOS technology [Articolo su rivista]
S., Bettarini; A., Bardi; G., Batignani; F., Bosi; G., Calderini; R., Cenci; M., Dell’Orso; F., Forti; P., Giannetti; M. A., Giorgi; A., Lusiani; G., Marchiori; F., Morsani; N., Neri; E., Paoloni; G., Rizzo; J., Walsh; C., Andreoli; E., Pozzati; L., Ratti; V., Speziali; M., Manghisoni; V., Re; G., Traversi; L., Bosisio; G., Giacomini; L., Lanceri; I., Rachevskaia; L., Vitale; M., Bruschi; B., Giacobbe; N., Semprini; R., Spighi; M., Villa; A., Zoccoli; D., Gamba; G., Giraudo; P., Mereu; G. F., Dalla Betta; G., Soncini; G., Fontana; L., Pancheri; Verzellesi, Giovanni
abstract

By exploiting the triple-well option available in a deep-submicron CMOS process, we developed monolithic active pixel sensors (MAPS) with the unique features of full analog signal processing and digital functionality implemented at the pixel level. After briefly reviewing the results achieved with the first prototype chip, we report on the extensive measurements on the second prototype, containing both single-channel sensors, with an improved noise figure, and an 8x8 pixel array. For the pixel having a collecting electrode area of 900 um2 we measured an equivalent noise charge of about 40 electrons. Using the 55Fe 5.9 keV line, we obtained a Signal-to-noise (S/N) ratio of about 30. The pixel matrix (50x50 um2) has been successfully readout up to 30 MHz. Through noise scans, an expected significant threshold dispersion has been measured. The measurements presented in this paper confirm the capability of our MAPS, based on the deep n-well concept, to be operated as ionizing radiation detectors and suggest a series of improvements we are already implementing in the design of the next prototype chip.


2007 - Interpretation of buffer-trap effects in AlGaN/GaN HEMTs [Abstract in Atti di Convegno]
Faqir, Mustapha; Verzellesi, Giovanni; Fantini, Fausto; A., Cavallini; A., Castaldini; F., Danesin; G., Meneghesso; E., Zanoni
abstract

Traps are identified in AlGaN-GaN HEMTs by means of different characterization techniques and the associated physical behavior is interpreted with the aid of numerical device simulations. It is in particular been shown that, under specific bias conditions, buffer traps can produce the same type of current-mode DLTS (I-DLTS), ICTS, and gm-dispersion signals that are generally attributed to surface traps. Clarifying this fact is crucial for both reliability testing and device optimization, as it can completely hinder a correct identification of degradation mechanisms.


2007 - Monolithic integration of detectors and transistors on high-resistivity silicon [Articolo su rivista]
G. F., DALLA BETTA; G., Batignani; M., Boscardin; L., Bosisio; P., Gregori; L., Pancheri; C., Piemonte; L., Ratti; Verzellesi, Giovanni; N., Zorzi
abstract

We report on the most recent results from an R&D activity aimed at the development of silicon radiation detectors with embeddedfront-end electronics. The key features of the fabrication technology and the available active devices are described. Selected results from the characterization of transistors and test structures are presented and discussed, and the considered application fields are addressed.


2007 - Proposal of a data sparsification unit for a mixed-mode MAPS detector [Relazione in Atti di Convegno]
A., Gabrielli; G., Batignani; S., Bettarini; F., Bosi; G., Calderini; R., Cenci; M., Dell'Orso; F., Forti; P., Giannetti; M. A., Giorgi; A., Lusiani; G., Marchiori; F., Morsani; N., Neri; E., Paoloni; G., Rizzo; J., Walsh; M., Massa; A., Cervelli; C., Andreoli; E., Pozzati; L., Ratti; V., Speziali; M., Manghisoni; V., Re; G., Traversi; L., Bosisio; G., Giacomini; L., Lanceri; I., Rachevskaia; L., Vitale; G. F., Dalla Betta; G., Soncini; G., Fontana; L., Pancheri; Verzellesi, Giovanni; D., Gamba; G., Giraudo; P., Mereu; M., Bruschi; B., Giacobbe; N., Semprini; R., Spighi; M., Villa; A., Zoccoli
abstract

The Italian Silicon-detectors-with-Low-Interaction-with Material collaboration (SLIM5) has designed, fabricated and tested several prototypes of CMOS Monolithic Active Pixel Sensors (MAPS). This paper shows the design of a new mixedmode chip prototype composed of a bidimensional matrix of pixels, and of an off-pixel digital readout sparsification circuit. The readout logic is based on commercial standard cells and implements an optimized non token readout technique. Also, a MAPS emulator software toool is presented. The project is aimed at overcoming the readout speed limit of future large-matrix pixel detectors for particle tracking, by matching the requirements of future high-energy physics experiments. The readout architecture extends the flexibility of the MAPS devices to be also used in first level triggers on tracks in vertex detectors.


2007 - Recent development on triple well 130 nm CMOS MAPS with in-pixel signal processing and data sparsification capability [Relazione in Atti di Convegno]
G., Rizzo; G., Batignani; S., Bettarini; F., Bosi; G., Calderini; R., Cenci; A., Cervelli; M., Dell'Orso; F., Forti; P., Giannetti; M. A., Giorgi; A., Lusiani; G., Marchiori; M., Massa; F., Morsani; N., Neri; E., Paoloni; J., Walsh; C., Andreoli; L., Gaioni; E., Pozzati; L., Ratti; V., Speziali; M., Manghisoni; V., Re; G., Traversi; M., Bomben; L., Bosisio; G., Giacomini; L., Lanceri; I., Rachevskaia; L., Vitale; G. F., Dalla Betta; G., Soncini; G., Fontana; L., Pancheri; Verzellesi, Giovanni; D., Gamba; G., Giraudo; P., Mereu; M., Bruschi; A., Gabrielli; B., Giacobbe; N., Semprini; R., Spighi; M., Villa; A., Zoccoli
abstract

A different approach to the design of CMOS MAPS has recently been proposed. By exploiting the triple well option of a CMOS commercial process, a deep n-well (DNW) MAPS sensor has been realized with a full in-pixel signal processing chain: charge preamplifier, shaper, discriminator and a latch. This readout approach beeing compatible with data sparsification will improve the readout speed potential of MAPS sensors. The first protoype chips, realized with STMicroelectronics 130 nm triple well process, proved the new design proposed for DNW MAPS is viable with a good sensitivity to photons from 55Fe and electrons from 90Sr. Extensive tests performed to characterize the second generation of the APSEL chips based on the DNW MAPS design are reported. Small 3x3 pixel matrices with full analog output have been tested with radioactive sources to characterize charge collection. Pixel noise equivalent charge (ENC) of 50 e- and Signal-to-Noise ratio for MIPs of about 14 have been measured. Improved pixel noise and reduced threshold dispersion (about 100 e-) have been measured in the 8x8 matrix with a sequential readout. Based on the new DNW MAPS design a dedicated fast readout architecture to perform on-chip data sparsification is currently under development. The aim is to incorporate in the same detector the advantages of the thin CMOS sensors and similar functionalities as in hybrid pixels.


2007 - Recent developments in 130 nm CMOS monolithic active pixel detectors [Articolo su rivista]
G., Batignani; S., Bettarini; F., Bosi; G., Calderini; R., Cenci; M., Dell'Orso; F., Forti; P., Giannetti; M. A., Giorgi; A., Lusiani; G., Marchiori; F., Morsani; N., Neri; E., Paoloni; G., Rizzo; J., Walsh; L., Gaioni; M., Manghisoni; V., Re; G., Traversi; M., Bruschi; A., Gabrielli; B., Giacobbe; N., Semprini; R., Spighi; M., Villa; A., Zoccoli; Verzellesi, Giovanni; C., Andreoli; E., Pozzati; L., Ratti; V., Speziali; D., Gamba; G., Giraudo; P., Mereu; L., Bosisio; G., Giacomini; L., Lanceri; I., Rachevskaia; L., Vitale
abstract

We developed monolithic active pixel detectors, by exploiting the triple well option available in a deep-submicron CMOS process. The novel features are the full analog signal processing and digital functionality implemented at the pixel level. The charge collecting element is realized using the deep N-well (DNW), the full in-pixel signal processing chain includes charge preamplifier, shaper, discriminator and latch. We report on the characterization of the two prototype chips, the first (APSEL0) containing single-channel sensors, with different collecting electrode area, and the latter (APSEL1) with several single pixel structures with improved noise figure implementing also an 8x8 matrix of 50x50 um2 pixel area. So far, the pixel matrix has a simple row by row readout, successfully tested with clock frequency up to 30 MHz. The response of the sensors to infra-red laser, β-rays and soft X-rays (from radioactive sources, 90Sr and 55Fe respectively) will be presented. The results achieved so far demonstrate the viability of the technology and suggest new design improvements implemented in the next prototype chips submission (APSEL2).


2007 - Vertex detector for the SuperB factory [Relazione in Atti di Convegno]
Rizzo, G.; Batignani, G.; Bettarini, S.; Bosi, F.; Calderini, G.; Cenci, R.; Cervelli, A.; Dell'Orso, M.; Forti, F.; Giannetti, P.; Giorgi, M. A.; Lusiani, A.; Marchiori, G.; Massa, M.; Morsani, F.; Neri, N.; Paoloni, E.; Piendibene, M.; Raffaelli, F.; Walsh, J.; Andreoli, C.; Gaioni, L.; Pozzati, E.; Ratti, L.; Speziali, V.; Manghisoni, M.; Re, V.; Traversi, G.; Bomben, M.; Bosisio, L.; Giacomini, G.; Lanceri, L.; Rachevskaia, I.; Vitale, L.; Verzellesi, Giovanni; Gamba, D.; Giraudo, G.; Mereu, P.; Bruschi, M.; Gabrielli, A.; Giacobbe, B.; Semprini, N.; Spighi, R.; Villa, M.; Zoccoli, A.
abstract

A new concept for a high-luminosity B-Factory (SuperB) has been recently proposed to deliver a luminosity greater than 1036cm-2s-1 with moderate beam currents. Comparing to current BFactories, the reduced center of mass boost of the SuperB machine requires improved vertex resolution for optimal time dependent measurements, which form the basis of the SuperB scientific program. Design studies indicate that such improved resolution is achievable with a vertex detector based on the BABAR silicon vertex tracker layout with the addtion of an innermost Layer 0 at radius of about 1.5 cm, with a material budget of about 0.5% X0 and capable to sustain a background rate of about 5 MHz/cm2. Several options for the Layer 0 design are reviewed in this paper. CMOS Monolithic Active Pixels (MAPS) is the most promising technology but extensive R&amp;D is needed to meet all the requirements. The most recent developments on a new CMOS MAPS sensor, based on Deep NWell (DNW), are discussed. The design of DNW CMOS MAPS has been recently proposed by the SLIM5 Collaboration to develop a thin pixel system with sparsified readout suitable for application in the SuperB Layer 0. Several prototype chips, realized with the STMicroelectronics 130 nm triple well process, have demonstrated that the design is viable with good sensitivity to electrons from 90Sr. Based on the new DNW MAPS design, a dedicated fast readout architecture to perform on-chip data sparsification is currently under development.


2006 - BJT-based detector on high-resistivity silicon with integrated biasing structure [Articolo su rivista]
Verzellesi, Giovanni; G., Batignani; S., Bettarini; M., Boscardin; L., Bosisio; G. F., DALLA BETTA; G., Giacomini; C., Piemonte
abstract

A novel method for biasing phototransistor-based radiation detectors on high-resistivity Si is presented, that relies on the integration into the detector base of a pnp transistor acting as a current source. The proposed approach can be extended in a natural way to the biasing of npn detector arrays, allowing different detectors to be biased at the same quiescent current, by connecting all the biasing pnp transistors with a diode-connected reference transistor (integrated onto the same chip), so that they form a current-mirror circuit. Relying on two-dimensional numerical device simulations, several test structures have been designed and fabricated, including single BJT detectors and detector arrays with pnp biasing transistors connected in the current-mirror configuration. The electrical characterization of fabricated structures shows that both single detectors and detector arrays are operational and behave in good agreement with simulations, thus demonstrating the feasibility of the proposed approach.


2006 - Current Collapse and High-Electric-Field Reliability of Unpassivated GaN/AlGaN/GaN HEMTs [Articolo su rivista]
Meneghesso, G; Rampazzo, F; Kordos, P; Verzellesi, Giovanni; Zanoni, E.
abstract

Long-term on-state and off-state high-electric-field stress results are presented for unpassivated GaN/AlGaN/GaN HEMTs on SiC substrates. Thanks to the thin GaN cap layer, devices show minimal current-collapse effects prior to high-electric-field stress, despite they are not passivated. This comes at the price of a relatively-high gate-leakage current. Under the assumption that donor-like electron traps are present within the GaN cap, two-dimensional numerical device simulations provide an explanation for the influence of the GaN cap layer on current collapse and for the correlation between the latter and the gate-leakage current. Both on-state and off-state stresses produce simultaneouscurrent-collapse increase and gate-leakage-current decrease, which can be interpreted to be the result of gate-drainsurfacedegradation and reduced gate electron injection. This study shows that, although the thin GaN cap layer is effective in suppressing surface-related dispersion effects in virgin devices, it does not, per se, protect the device from high-electric-field degradation and it should, to this aim, be adopted in conjunction with other technological solutions like surface passivation, pre-passivation surface treatments and/or field-plate gate.


2006 - Development of 130nm CMOS Monolithic Active Pixels with In-pixel Signal Processing [Relazione in Atti di Convegno]
F., Forti; C., Andreoli; G., Batignani; S., Bettarini; F., Bosi; L., Bosisio; M., Bruschi; G., Calderini; R., Cenci; G. F., Dalla Betta; M., Dell'Orso; G., Fontana; A., Gabrielli; D., Gamba; B., Giacobbe; G., Giacomini; P., Giannetti; M. A., Giorgi; G., Giraudo; L., Lanceri; A., Lusiani; M., Manghisoni; G., Marchiori; P., Mereu; F., Morsani; N., Neri; L., Pancheri; E., Paoloni; E., Pozzati; I., Rachevskaia; L., Ratti; V., Re; G., Rizzo; N., Semprini; G., Soncini; R., Spighi; V., Speziali; G., Traversi; J., Walsh; Verzellesi, Giovanni; L., Vitale; M., Villa; A., Zoccoli
abstract

We developed monolithic active pixel detectors that exploit the triple well option of CMOS 130nm technology to implement analog and digital signal processing at the pixel level. The charge collecting element is realized using the deep N-well (DNW) and partially overlaps the analog circuit. With this scheme we were able to implement a full in-pixel signal processing chain, composed of a charge preamplifier, shaper, discriminator, and latch. This approach has been validated by a first prototype (APSEL0), and we report here on the extensive measurements performed on the second prototype (APSEL1), containing various single pixel structures with analog readout and an 8x8 matrix of 50x50 um2 pixels with sequential digital readout. For 900 um2 pixels the equivalent noise charge has been measured to be 40 e−, with a S/N ratio of about 30 for the 55Fe 5.9 keV signal. The matrix readout has been tested up to 30 MHz and the crosstalk between pixels characterized. The threshold dispersion and the noise of the pixels in the matrix have been measured through noise scans. These measurements confirm the viability of the triple well process for MAPS fabrication, and indicate the design improvements for the next prototype chip (APSEL2).


2006 - Fabrication, Characterization and Numerical Simulation of High Breakdown Voltage pHEMTs [Relazione in Atti di Convegno]
Chini, Alessandro; S., Lavanga; M., Peroni; C., Lanzieri; A., Cetronio; V., Teppati; V., Camarchia; G., Ghione; Verzellesi, Giovanni
abstract

High Breakdown Voltage pHEMTs have been successfully developed by implementing a field-plate (FP) structure. Devices with and without FP have been fabricated on the same wafer in order to compare the improvements induced by adopting the FP. Both kind of devices showed little or no current dispersion under pulse measurement conditions. Moreover the off-state breakdown voltage improved from 23V, for the devices without FP, to 38V for the field-plated devices. At 4GHz an output power as high as 1.6W/mm was measured for a FP device, resulting in a 60% improvement with respect to the device without FP. The fabricated structures were also evaluated by carrying out 2D numerical simulations. Experimental results on MISpHEMTs have been explained by means of a donor trap at the SiN/GaAs interface located at 0.18eV from the GaAs conduction band. Finally, a good agreement between experimental and simulated device characteristics was obtained.


2006 - N-p-n bipolar-junction-transistor detector with integrated p-n-p biasing transistor - feasibility study, design and first experimental results [Articolo su rivista]
Verzellesi, Giovanni; D., Bergamini; GF DALLA, Betta; C., Piemonte; M., Boscardin; L., Bosisio; S., Bettarini; G., Batignani
abstract

We propose a novel n-p-n BJT radiation detector on high-resistivity silicon with integrated p-n-p transistor providing the quiescent base current of the detector. The do operational limits of the proposed detector are analysed by means of numerical device simulations, pointing out that, by properly distancing the base of the p-n-p transistor from the emitter of the n-p-n detector, the latch-up of the parasitic thyristor embedded within the detector-plus-biasing-transistor structure takes place at relatively high current levels, where detector operation should anyway be avoided in order to prevent the associated current-gain loss. Numerical simulations provides insight about the bias dependence of charge-collection waveforms, indicating that minimization of the collecting time requires the detector quiescent current to be adjusted at the highest value still allowing high-injection effects to be avoided. A small-signal equivalent circuit of the proposed structure is also derived, allowing the impact of p-n-p biasing transistor and load resistance on the charge-collecting time constant to be evaluated. First experimental results show that fabricated structures are immune from the latch-up of the parasitic thyristor throughout their high-current-gain operating region and feature a minimum charge-collecting time constant of 35 us, as tested by pulsed laser illumination.


2006 - Off-state breakdown optimization in field plated GaAs-pHEMTs by means of two-dimensional numerical simulation [Abstract in Atti di Convegno]
Chini, Alessandro; Verzellesi, Giovanni
abstract

The optimization of a field plated pHEMT structure has been presented. It has been shown that by optimizing the FP length (LFP) and the SiN layer thickness the off-state breakdown voltage can be improved as much as four times for the selected pHEMT structure. Choosing the right SiN thickness (in this case in the 40-60nm range) and LFP (in this case in the 0.8-1.2um range) is crucial in order to obtain a significant benefit in the device off-state breakdown.


2006 - Performance evaluation of radiation sensors with internal signal amplification based on the BJT effect [Articolo su rivista]
L., Bosisio; G., Batignani; S., Bettarini; M., Boscardin; G. F., DALLA BETTA; G., Giacomini; C., Piemonte; Verzellesi, Giovanni; N., Zorzi
abstract

Prototypes of ionizing radiation detectors with internal signal amplification based on the bipolar transistor effect have been fabricated at ITC-irst (Trento, Italy). Results from the electrical characterization and preliminary functional tests of the devices have been previously reported. Here, we present a more detailed investigation of the performance of this type of detector, with particular attention to their noise and rate limits. Measurements of the signal waveform and of the gain versus frequency dependence are performed by illuminating the devices with, respectively, pulsed or sinusoidally modulated IR light. Pulse height spectra of X-rays from an 241Am source have been taken with very simple front-end electronics (an LF351 operational amplifier) or by directly reading with an oscilloscope the voltage drop across a load resistor connected to the emitter. An equivalent noise charge (referred to input) of 380 electrons r.m.s. has been obtained with the first setup for a small device, with an active area of 0.5x0.5 mm2 and a depleted thickness of 0.6 mm. The corresponding power dissipation in the BJT was 17 mW. The performance limitations of the devices are discussed.


2006 - Physical investigation of high-field degradation mechanisms in GaN/AlGaN/GaN hemts [Relazione in Atti di Convegno]
Faqir, Mustapha; Chini, Alessandro; Verzellesi, Giovanni; Fantini, Fausto; Rampazzo, F.; Meneghesso, G.; Zanoni, E.; Bernat, J.; Kordos, P.
abstract

High-electric-field degradation phenomena are investigated in GaN-capped AlGaN-GaN HEMTs by comparing experimental data with numerical device simulations. Simulations indicate that the stress-induced amplification of gate-lag effects and the correlated gate-leakage-current reduction can be ascribed to the generation of acceptor traps at the gate-drain surface. The drop in DC drain current observed after stress should rather be attributed to trap accumulation within the GaN buffer region. Only the simultaneous generation of surface and buffer traps can account for all of the observed degradation modes. © 2006 JEDEC.


2006 - Study of high-field degradation phenomena in GaN-capped AlGaN/GaN HEMTs [Abstract in Atti di Convegno]
Faqir, Mustapha; Chini, Alessandro; Verzellesi, Giovanni; Fantini, Fausto; Rampazzo, F.; Meneghesso, G.; Zanoni, E.; Bernat, J.; Kordos, P.
abstract

High-electric-field degradation phenomena are studied in GaN-capped AlGaN-GaN HEMTs by comparing experimental results with numerical device simulations and assessing the suitability of different degradation scenarios to account for the observed electrical stress effects.


2006 - Transient Phenomena in GaAs and GaN Devices, including Electroluminescence and Emission Spectroscopy, for Future THz Applications [Abstract in Atti di Convegno]
Chini, Alessandro; Verzellesi, Giovanni; Meneghesso, G.; Zanoni, E.
abstract

Transient Phenomena in GaAs and GaN Devices are reviewed focusing on the physical mechanisms limiting their performance. Device characterization by means of Electroluminescence and Emission Spectroscopy techniques are also presented.


2006 - Very high power low-cost field-plate GaAs PHEMTs for X-band applications [Abstract in Atti di Convegno]
Ghione, G.; Lanzieri, C.; Peroni, M.; Lavanga, S.; Chini, Alessandro; Verzellesi, Giovanni; Camarchia, V.; Cappelluti, F.; Angelini, A.; Limiti, E.; Serino, A.
abstract

A low cost fabrication process based on field-plated GaAs pHEMT for X-Band applications is presented by also focusing on the device performances evaluated by means of experimental measurments.


2005 - DC-to-RF dispersion effects in GaAs- and GaN-based heterostructure FETs: performance and reliability issues [Articolo su rivista]
Verzellesi, Giovanni; Meneghesso, G.; Chini, Alessandro; Zanoni, E.; Canali, Claudio
abstract

The performance and reliability implications of DC-to-RF dispersion effects are addressed. The proposed physical explanations and technological counteractions are reviewed. GaAs- and GaN-based FET technologies are considered, trying to point out both similar and peculiar aspects.


2005 - Effect of CF4/O2 plasma damage on AlGaN/GaN HEMTs [Abstract in Atti di Convegno]
Chini, Alessandro; Peroni, M.; Romanini, P.; Lanzieri, C.; Teppati, V.; Camarchia, V.; Passaseo, A.; Verzellesi, Giovanni
abstract

We report on the pulsed and RF power measurements of passivated GaN HEMTs obtained by two different gate evaporation process. Due to the SiN lateral overetch prior to the gate metalization step, devices with a self-aligned gate evaporation showed larger dispersion with respect to those where an angled evaporation was performed. The poorer performances of the self-aligned devices have to be related to the surface regions that are not covered by the gate metal, and that have been exposed to the SiN CF4/O2 dry etch process.


2005 - Hot-electron-stress degradation in unpassivated GaN/AlGaN/GaN HEMTs on SiC [Relazione in Atti di Convegno]
Meneghesso, G.; Pierobon, R.; Rampazzo, F.; Tamiazzo, G.; Zanoni, E.; Bernat, J.; Kordos, P.; Basile, Alberto Francesco; Chini, Alessandro; Verzellesi, Giovanni
abstract

Long term on-state and off-state stress on GaN-AlGaN-GaN HEMTson Sic substrates are presented. Hot carrier effects and theirdependence on bias conditions are evaluated withelectroluminescence measurements. Both hot-electron stressconditions produce drain current gate-lag dispersion and gate current decrease. However on- and off- state stresses induce degradation in different gate-to drain surface device regions, i.e. close to the drain contact for the on-state stress and close to the gate contact in the off-state stress. Furthermore a correlation between gate-leakage current and gate-lag dispersion is also observed.


2005 - Light sensitivity of current DLTS and its implications on the physics of DC-to-RF dispersion in AlGaAs-GaAs HFETs [Articolo su rivista]
Verzellesi, Giovanni; Basile, Alberto Francesco; Cavallini, A.; Castaldini, A.; Chini, Alessandro; Canali, Claudio
abstract

The light sensitivity of current deep-level transient spectroscopy (I-DLTS) is analyzed with the aim of gaining insight about the physics of surface-trap related dc-to-RF dispersion effects in AlGaAs-GaAs heterostructure field-effect transistors. I-DLTS experiments under dark reveals three surface-trap levels with activation energies 0.44 eV (h1), 0.59 eV (h2), and 0.85 eV (W), as well as a bulk trap with activation energy 0.45 eV (e1). While the I-DLTS signal peaks associated with the two shallower surface traps h1 and h2 are suppressed by optical illumination with energy larger than the AlGaAs bandgap, that which is associated with the deepest surface trap h3 is nearly unaffected by light up to the highest intensity adopted. Two-dimensional device simulations assuming that surface traps behave as hole traps provide an interpretation for the observed different light sensitivity of surface traps, explaining it as the result of the temperature dependence of surface hole concentration and negative trap-charge density, making trap-charge modulation at increasing temperature less and less sensitive to excess carriers generated by light.


2005 - Radiation-hard semiconductor detectors for SuperLHC [Articolo su rivista]
M., Bruzzi; J., Adey; A., Al Ajili; P., Alexandrov; G., Alfieri; P. P., Allport; A., Andreazza; M., Artuso; S., Assouak; B. S., Avset; L., Barabash; E., Baranova; A., Barcz; A., Basile; R., Bates; N., Belova; S. F., Biagi; G. M., Bilei; D., Bisello; A., Blue; A., Blumenau; V., Boisvert; G., Bolla; G., Bondarenko; E., Borchi; L., Borrello; D., Bortoletto; M., Boscardin; L., Bosisio; T. J. V., Bowcock; T. J., Brodbeck; J., Broz; A., Brukhanov; A., Brzozowski; M., Buda; P., Buhmann; C., Buttar; F., Campabadal; D., Campbell; A., Candelori; G., Casse; A., Cavallini; A., Chilingarov; D., Chren; V., Cindro; M., Citterio; P., Collins; R., Coluccia; D., Contarato; J., Coutinho; D., Creanza; W., Cunningham; V., Cvetkov; G. F., Dalla Betta; G., Davies; I., Dawson; W., de Boer; M., De Palma; R., Demina; P., Dervan; A., Dierlamm; S., Dittongo; L., Dobrzanski; Z., Dolezal; A., Dolgolenko; T., Eberlein; V., Eremin; C., Fall; F., Fasolo; T., Ferbel; F., Fizzotti; C., Fleta; E., Focardi; E., Forton; S., Franchenko; E., Fretwurst; F., Gamaz; C., Garcia; J. E., Garcia Navarro; E., Gaubas; M. H., Genest; K. A., Gill; K., Giolo; M., Glaser; C., Goessling; V., Golovine; S., González Sevilla; I., Gorelov; J., Goss; A., Gouldwell; G., Grégoire; P., Gregori; E., Grigoriev; C., Grigson; A., Grillo; A., Groza; J., Guskov; L., Haddad; J., Härkönen; R., Harding; F., Hauler; S., Hayama; M., Hoeferkamp; F., Hönniger; T., Horazdovsky; R., Horisberger; M., Horn; A., Houdayer; B., Hourahine; A., Hruban; G., Hughes; I., Ilyashenko; K., Irmscher; A., Ivanov; K., Jarasiunas; T., Jin; B. K., Jones; R., Jones; C., Joram; L., Jungermann; E., Kalinina; P., Kaminski; A., Karpenko; A., Karpov; V., Kazlauskiene; V., Kazukauskas; V., Khivrich; V., Khomenkov; J., Kierstead; J., Klaiber Lodewigs; M., Kleverman; R., Klingenberg; P., Kodys; Z., Kohout; S., Korjenevski; A., Kowalik; R., Kozlowski; M., Kozodaev; G., Kramberger; O., Krasel; A., Kuznetsov; S., Kwan; S., Lagomarsino; T., Lari; K., Lassila Perini; V., Lastovetsky; G., Latino; S., Latushkin; S., Lazanu; I., Lazanu; C., Lebel; K., Leinonen; C., Leroy; Z., Li; G., Lindström; L., Lindstrom; V., Linhart; A., Litovchenko; P., Litovchenko; V., Litvinov; A., Lo Giudice; M., Lozano; Z., Luczynski; P., Luukka; A., Macchiolo; A., Mainwood; L. F., Makarenko; I., Mandić; C., Manfredotti; S. Marti i., Garcia; S., Marunko; K., Mathieson; A., Mozzanti; J., Melone; D., Menichelli; C., Meroni; A., Messineo; S., Miglio; M., Mikuž; J., Miyamoto; M., Moll; E., Monakhov; F., Moscatelli; L., Murin; F., Nava; D., Naoumov; E., Nossarzewska Orlowska; S., Nummela; J., Nysten; P., Olivero; V., Oshea; T., Palviainen; C., Paolini; C., Parkes; D., Passeri; U., Pein; G., Pellegrini; L., Perera; M., Petasecca; B., Piatkowski; C., Piemonte; G. U., Pignatel; N., Pinho; I., Pintilie; L., Pintilie; L., Polivtsev; P., Polozov; A. I., Popa; J., Popule; S., Pospisil; G., Pucker; V., Radicci; J. M., Rafí; F., Ragusa; M., Rahman; R., Rando; R., Roeder; T., Rohe; S., Ronchin; C., Rott; P., Roy; A., Roy; A., Ruzin; A., Ryazanov; H. F. W., Sadrozinski; S., Sakalauskas; M., Scaringella; L., Schiavulli; S., Schnetzer; B., Schumm; S., Sciortino; A., Scorzoni; G., Segneri; S., Seidel; A., Seiden; G., Sellberg; P., Sellin; D., Sentenac; I., Shipsey; P., Sicho; T., Sloan; M., Solar; S., Son; B., Sopko; N., Spencer; J., Stahl; I., Stavitski; D., Stolze; R., Stone; J., Storasta; N., Strokan; W., Strupinski; M., Sudzius; B., Surma; J., Suuronen; A., Suvorov; B. G., Svensson; P., Tipton; M., Tomasek; C., Troncon; A., Tsvetkov; E., Tuominen; E., Tuovinen; T., Tuuva; M., Tylchin; H., Uebersee; J., Uher; M., Ullán; J. V., Vaitkus; P., Vanni; J., Velthuis; Verzellesi, Giovanni; E., Verbitskaya; V., Vrba; G., Wagner; I., Wilhelm; S., Worm; V., Wright; R., Wunstorf; P., Zabierowski; A., Zaluzhny; M., Zavrtanik; M., Zen; V., Zhukov; N., Zorzi
abstract

An option of increasing the luminosity of the Large Hadron Collider (LHC) at CERN to 1035 cm2 s1 has been envisaged to extend the physics reach of the machine. An efficient tracking down to a few centimetres from the interaction point will be required to exploit the physics potential of the upgraded LHC. As a consequence, the semiconductor detectors close to the interaction region will receive severe doses of fast hadron irradiation and the inner tracker detectors will need to survive fast hadron fluences of up to above 1016 cm2. The CERN-RD50 project ‘‘Development of Radiation Hard Semiconductor Devices for Very High Luminosity Colliders’’ has been established in 2002 to explore detector materials and technologies that will allow to operate devices up to, or beyond, this limit. The strategies followed by RD50 to enhance the radiation tolerance include the development of new or defect engineered detector materials (SiC, GaN, Czochralski and epitaxial silicon, oxygen enriched Float Zone silicon), the improvement of present detector designs and the understanding of the microscopic defects causing the degradation of the irradiated detectors. The latest advancements within the RD50 collaboration on radiation hard semiconductor detectors will be reviewed and discussed in this work.


2005 - Silicon carbide for alpha, beta, ion and soft X-ray high performance detectors [Relazione in Atti di Convegno]
Bertuccio, G; Binetti, S; Caccia, S; Casiraghi, R; Castaldini, A; Cavallini, A; Lanzieri, C; Le Donne, A; Nava, Filippo; Pizzini, S; Rigutti, L; Verzellesi, Giovanni; Vittone, E.
abstract

High performance SiC detectors for ionising radiation have been designed, manufactured and tested. Schottky junctions on low-doped epitaxial 4H-SiC with leakage current densities of few pA/cm(2) at room temperature has been realised at this purpose. The epitaxial layer has been characterised at different dose of radiations in order to investigate the SiC radiation hardness. The response of the detectors to alpha and beta particle and to soft X-ray have been measured. High energy resolution and full charge collection efficiency have been successfully demonstrated.


2004 - Current collapse associated with surface states in GaN-based HEMT’s. Theoretical/experimental investigations. [Relazione in Atti di Convegno]
A., Sleiman; A., DI CARLO; Verzellesi, Giovanni; G., Meneghesso; E., Zanoni
abstract

The effect of air/AlGaN and GaN/substrate polarization charges on the performances of GaN-based HEMTs have been investigated. We find that surface charges and, with a minor extend, GaN/substrate charges are responsible for the observed premature saturation of the dc output characteristics. Moreover, our work show that the polarization charges and holes trap appear as the source of the drain current collapse observed in GaN-based HEMTs.


2004 - Experimental and simulated gate lag transients in unpassivated GaN/AlGaN/GaN HEMTs [Abstract in Atti di Convegno]
R., Pierobon; F., Rampazzo; G., Meneghesso; E., Zanoni; J., Bernat; M., Marso; P., Kordos; Basile, Alberto Francesco; Verzellesi, Giovanni
abstract

Unpassivated GaN/AlGaN/GaN HEMTs on SiC substrate both with intentionally undoped and doped structures with an extremely weak current collapse in the 50ns range have been presented. The characterization with gate-lag techniques did not shown relevant DC to RF dispersion and preliminary RF output power measurements lead to expect good RF performances.


2004 - Light sensitivity of gate lag and current DLTS as a tool to investigate the origin of dc-to-RF dispersion effects in GaAs heterostructure FETs [Abstract in Atti di Convegno]
Basile, Alberto Francesco; Verzellesi, Giovanni; Canali, Claudio; A., Cavallini; A., Castaldini; C., Lanzieri
abstract

The light sensitivity of gate-lag transients and current-DLTS signals is experimentally analyzed in AlGaAs-GaAs HFETs and reproduced by 2D device simulations attributing the observed behaviors to the hole-trap performance of surface deep levels.


2004 - Surface-related drain current dispersion effects in AlGaN-GaN HEMTs [Articolo su rivista]
Meneghesso, G.; Verzellesi, Giovanni; Pierobon, R.; Rampazzo, F.; Chini, Alessandro; Mishra, U. K.; Canali, Claudio; Zanoni, E.
abstract

Drain current dispersion effects are investigated in AlGaN-GaN HEMTs by means of pulsed, transient, and small-signal measurements. Gate- and drain-lag effects characterized by time constants in the order of 10-100 us cause dispersion between dc and pulsed output characteristics when the gate or the drain voltage are pulsed. An activation energy of 0.3 eV is extracted from temperature-dependent gate-lag measurements. We show that two-dimensional numerical device simulations accounting only for polarization charges and donor-like traps at the ungated AlGaN surface can quantitatively reproduce all dispersion effects observed experimentally in the different pulsing modes, provided that the measured activation energy is adopted as the energetic distance of surface traps from the valence-band edge. Within this hypothesis, simulations show that surface traps behave as hole traps during transients, interacting with holes attracted at the AlGaN surface by the negative polarization charge.


2004 - The impact of light on current DLTS and gate-lag transients of AlGaAs-GaAs HFETs [Articolo su rivista]
Verzellesi, Giovanni; A., Cavallini; Basile, Alberto Francesco; A., Castaldini; Canali, Claudio
abstract

Gate-lag transients and hole-like deep level transient spectroscopy signals from AlGaAs-GaAs heterostructure field-effect transistors are shown to be suppressed by illumination with photons with energy larger than the AlGaAs bandgap. The observed pulse-response dependence on light intensity is reproduced and explained by two-dimensional numerical device simulations based on hole-trap behavior of surface deep levels.


2004 - Trap-related effects, passivation and hot-carrier aging in GaN-based MESFETs and HEMTs [Relazione in Atti di Convegno]
E., Zanoni; G., Meneghesso; R., Pierobon; F., Rampazzo; Chini, Alessandro; Verzellesi, Giovanni
abstract


2003 - Current collapse in AlGaN/GaN HEMT’s analysed by means of 2d device simulation [Abstract in Atti di Convegno]
Meneghesso, G.; Verzellesi, Giovanni; Pierobon, R.; Rampazzo, F.; Chini, Alessandro; Canali, Claudio; Zanoni, E.
abstract

In this work, we analyze for the first time, by means of 2D numerical device simulations, the influence of surface states on the DC and pulsed characteristics of AlGaN/GaN HEMT’s, and we show that the concomitant presence, at the ungated surface, of polarization induced negative charge and surface hole traps can explain, without invoking any other hypothesis, all dispersive effects in AlGaN/GaN HEMT’s and, in particular, both gate- and drain-lag experiments. In the presence of polarization charge densities of the order of 1013 cm-2, bands are upward bent at the ungated surface and consequently the dynamics of surface states is governed by hole exchange with the valence band.


2003 - Energetic and spatial localisation of deep-level traps responsible for DC-to-RF dispersion effects in AlGaAs-GaAs HFETs [Articolo su rivista]
Verzellesi, Giovanni; Basile, Alberto Francesco; Mazzanti, Andrea; A., Cavallini; Canali, Claudio
abstract

Results are presented from gate-lag, transconductance (g(m)) frequency dispersion and current deep level transient spectroscopy (I-DLTS) experiments, allowing consistent indications about energy, location, and physical behaviour of deep-level traps in AlGaAs-GaAs hetero-structure field-effect transistors (HFETs) to be inferred. Traps responsible for DC-to-RF dispersion effects at operational temperatures are in particular localised and characterised.


2003 - Experimental and numerical assessment of gate-lag phenomena in AlGaAs-GaAs heterostructure field-effect transistors (FETs) [Articolo su rivista]
Verzellesi, Giovanni; Mazzanti, Andrea; Basile, Alberto Francesco; A., Boni; E., Zanoni; Canali, Claudio
abstract

Gate-lag effects are characterized in AIGaAs-GaAs heterostructure field-effect transistors (HFETs) by means of measurements and numerical device simulations. Gate lag increasingly affects device switching at increasing ungated recess extension, suggesting that responsible deep levels be located at the ungated, recess surface of the HFET. Gate lag diminishes by making the off-state gate-source voltage less negative and by increasing the drain bias. Increasing the temperature makes the turn-on transient faster at low drain bias, while slightly delaying it at high drain bias. Numerical device simulations accounting for acceptor-like traps at the ungated surface predict gate-lag phenomena in good agreement with experiments, reproducing correctly the observed bias and temperature dependences. Simulations show that surface states behave, during the turn-on transient, as hole traps capturing holes attracted at the ungated surface by the negative trapped charge.


2003 - Experimental/numerical investigation of the physical mechanisms behind dc-to-RF dispersion effects in GaAs-based HFET’s [Relazione in Atti di Convegno]
Verzellesi, Giovanni; Basile, Alberto Francesco; A., Cavallini; A., Castaldini; C., Lanzieri; Canali, Claudio
abstract

A consistent set of experimental and numerical results are presented, addressing to dc-to-RF dispersion effects in AlGaAs-GaAs heterostructure FET's (HFET's). Results are presented from gate-lag, transconductance (gm) frequency dispersion and current deep level transient spectroscopy (I-DLTS) experiments, allowing consistent indications about energy and location of deep-level traps to be inferred. Experimental data are fully explained by numerical device simulations, pointing out that surface traps act differently from conventionally assumed, i.e. behave as hole traps interacting with holes attracted at the ungated surface by negatively-ionized levels and consequent band bending.


2003 - Impact of temperature on surface-trap-induced gate-lag effects in GaAs heterostructure FETs [Articolo su rivista]
Verzellesi, Giovanni; Basile, Alberto Francesco; Mazzanti, Andrea; Canali, Claudio; G., Meneghesso; E., Zanoni
abstract

Temperature increase is shown to impact the turn-on waveforms of AlGaAs/GaAs heterostructure field-effect transistors in a non-trivial way, resulting in reduced drain current fast change but shortened drain current transient. Two-dimensional device simulations accounting for hole traps at the ungated recess surface provide a consistent physical explanation for the observed behaviour.


2003 - Instabilities and degradation in GaN-based devices [Relazione in Atti di Convegno]
Meneghesso, G.; Verzellesi, Giovanni; Pierobon, R.; Rampazzo, F.; Chini, Alessandro; Zanoni, E.
abstract

Drain current instabilities and degradation in GaN-based devices are reviewed by discussing the experimental techniques adopted for their characterization as well as the physical mechanisms leading to the observed phenomena.


2003 - Origin of hole-like peaks in current deep level transient spectroscopy of n-channel AlGaAs/GaAs heterostructure field-effect transistors [Articolo su rivista]
A., Cavallini; Verzellesi, Giovanni; Basile, Alberto Francesco; Canali, Claudio; A., Castaldini; E., Zanoni
abstract

The features of current deep level transient spectroscopy I-DLTS spectra are investigated in AlGaAs/GaAs heterostructure field-effect transistors both through experiments and two-dimensional numerical device simulations. Differently from electron traps located in the n-type semiconductor bulk, which can only be detected in emission-mode by I-DLTS, deep levels locatedat the ungated device surface are shown to be revealed both in emission and capture transients by I-DLTS. Experimental and simulation results indicate that this behavior originates from inherent physical properties of surface deep levels interacting with holes attracted at the ungated surface by the negative charge associated with ionized traps.


2003 - Radiation tolerance of epitaxial silicon carbide detectors for electrons, protons and gamma-rays [Articolo su rivista]
Nava, Filippo; E., Vittone; P., Vanni; Verzellesi, Giovanni; Pg, Fuochi; C., Lanzieri; M., Glaser
abstract

Particle detectors were made using semiconductor epitaxial 4H-SiC as the detection medium. The investigated detectors are formed by Schottky contact (Au) on the epitaxial layer and an ohmic contact on the back side of 4H-SiC substrates with different micropipe densities from CREE. For radiation hardness studies, the detectors have been irradiated with protons (24 GeV/c) at a fluence of about 10e14 cm^(-2) and with electrons (8.2 MeV) and gamma-rays (Co-60 source) at doses ranging from 0 to 40 Mrad. We present experimental data on the charge collection properties by using 5.48, 4.14 and 2.00 MeV alpha-particles impinging on the Schottky contact. Hundred percent charge collection efficiency (CCE) is demonstrated for reverse voltages higher than the one needed to have a depletion region equal to the alpha-particle projected range, even after the irradiation at the highest dose. By comparing measured CCE values with the outcomes of drift-diffusion simulations, values are inferred for the hole lifetime, within the neutral region of the charge carrier generation layer. The hole lifetime was found to decrease with increasing radiation levels, ranging from 300 ns in non-irradiated detectors to 3 ns in the most irradiated ones. The diffusion contribution of the minority charge carriers to CCE is pointed out.


2003 - Reliability aspects of GaN microwave devices [Relazione in Atti di Convegno]
E., Zanoni; G., Meneghesso; Verzellesi, Giovanni; R., Pierobon; F., Rampazzo; Chini, Alessandro
abstract

We address the current collapse effects and hot-carrier degradation phenomena observed in GaN based MESFETs and HEMTs.


2003 - Study on the origin of dc-to-RF dispersion effects in GaAs- and GaN-based heterostructure FETs [Relazione in Atti di Convegno]
Verzellesi, Giovanni; Mazzanti, Andrea; Canali, Claudio; Meneghesso, G.; Chini, Alessandro; Zanoni, E.
abstract

In the present work a consistent set of experimental and numerical results are presented, addressing dc-to-RF dispersion effects in FETs of two different technologies, namely AlGaAs/GaAs heterostructure FETs (HFETs) and AlGaN/GaN HEMTs. Numerical device simulations suggest that, differently from what commonly assumed, surface traps can behave, during the switching transients of both device types, as hole traps interacting with holes attracted at the ungated surface by surface band bending.


2002 - A novel silicon microstrip termination structure with all p-type multiguard and scribe-line implants [Articolo su rivista]
G. F., Dalla Betta; M., Boscardin; L., Bosisio; S., Dittongo; P., Gregori; I., Rachevskaia; Verzellesi, Giovanni; N., Zorzi
abstract

A novel termination structure for silicon microstrip detectors is proposed, featuring all p-type multiguard and scribe-line implants, as well as inward metal field-plates providing almost complete coverage of the passivation-oxide external surface. The structure is intended for detector long-term stability improvement and fabrication-process simplification. Proper design of the multiguard layout enables a very stable behavior at relatively high bias voltages to be achieved both prior and after 1e12 /cm2 neutron irradiation.


2002 - An improved all-p-type multiguard termination structure for silicon radiation detectors [Relazione in Atti di Convegno]
M., Boscardin; L., Bosisio; A., Candelori; G. F., DALLA BETTA; S., Dittongo; P., Gregori; A., Litovchenko; C., Piemonte; I., Rachevskaia; S, Ronchin; Verzellesi, Giovanni; N., Zorzi
abstract

A junction termination structure for silicon radiation detectors is investigated, featuring all-p-type multiguard and scribe-line implants, with metal field-plates providing complete coverage of the oxide upper surface above non-implanted regions. The sensitive interface between oxide and n-type substrate is thus electrostatically screened from the external environment, holding the promise for improved long-term stability of the device and excellent insensitivity to ambient conditions. Careful design of the multiguard layout enables high-voltage operation to be achieved. With respect to a previously proposed structure, the adoption of alternate outward and inward field plates between adjacent rings allows a large improvement in the voltage handling capability.


2002 - Deep-level characterization in 6H-SiC JFETs by means of two-dimensional device simulations [Relazione in Atti di Convegno]
Verzellesi, Giovanni; G., Meneghesso; Mazzanti, Andrea; Canali, Claudio; E., Zanoni
abstract

Two-dimensional device simulations are adopted as a tool to characterize deep levels in 6H-SiC, buried gate, n-channel JFETs. Deep levels can be detected by means of Deep Level Transient Spectroscopy (DLTS) or transconductance frequency dispersion measurements. Subsequent simulation of the drain-current transients following the application of a gate-source voltage step allows the energetic and spatial position of the different deep levels to be inferred.


2002 - Experimental and numerical analysis of gate- and drain-lag phenomena in AlGaAs/InGaAs PHEMTs [Relazione in Atti di Convegno]
Basile, Alberto Francesco; Mazzanti, Andrea; E., Manzini; Verzellesi, Giovanni; Canali, Claudio; R., Pierobon; C., Lanzieri
abstract

Gate- and drain-lag phenomena are investigated in AlGaAs-InGaAs pseudomorphic HEMTs by comparing experimental transient and pulsed characteristics with simulated ones. A consistent interpretation for experimental data is provided, relying on the assumption that acceptor-like surface traps are present at the ungated surface between gate and source/drain contacts.


2002 - Experimental/numerical investigation on current collapse in AlGaN/GaN HEMT’s [Relazione in Atti di Convegno]
Verzellesi, Giovanni; Pierobon, R.; Rampazzo, F.; Meneghesso, G.; Chini, Alessandro; Mishra, U. K.; Canali, Claudio; Zanoni, E.
abstract

RF current collapse is investigated in AlGaN/GaN HEMT's by means of pulsed, transient, and small-signal measurements. Numerical device simulations are presented, showing that the concomitant presence, at the ungated device surface, of polarization-induced charges and hole traps can explain, without invoking any other hypothesis, all dispersion effects observed experimentally.


2002 - Extraction of bulk generation lifetime and surface generation velocity in high-resistivity silicon by means of gated diodes [Articolo su rivista]
Verzellesi, Giovanni; DALLA BETTA, G. F.; Boscardin, M.; Pignatel, G. U.; Bosisio, L.
abstract

We show that the accuracy of the gated diode method for measuring bulk generation lifetime and surface generationvelocity in high resistivity silicon depends critically on the gate length of the test device, as a result of nonidealities affecting the gated diode operation. Minimization of the surface generation velocity measurement error requires the gate length to be suitably decreased, while long gate length structures are needed for accurate bulk generation lifetime extraction.


2002 - Impact of programming charge distribution on threshold voltage and subthreshold slope of NROM memory cells [Articolo su rivista]
Larcher, Luca; Verzellesi, Giovanni; Pavan, Paolo; Lusky, E.; Bloom, I.; Eitan, B.
abstract

The aim of this paper is to achieve a correct description of programming charge distribution in NROM memory devices. This is essential to prove device functionality and to extrapolate scaling limits of devices. To this purpose we use an inverse modeling based methodology using measurements easily performed, such as subthreshold characteristics and threshold voltage measurements. We will show a simple model of programming charge distribution that can be easily implemented in 2D TCAD simulations. Results show good agreement between measured and simulated currents under different bias conditions and for different programming levels.


2002 - Investigation on the charge collection properties of a 4H-SiC Schottky diode detector [Articolo su rivista]
Verzellesi, Giovanni; Vanni, Paolo; Nava, Filippo; Canali, Claudio
abstract

We present experimental and theoretical data on the charge collection properties of a 4H-SiC epitaxial Schottky diode exposed to 5.48- and 2.00-MeV alpha particles. Hundred percent Charge Collection Efficiency (CCE) is, in particular, demonstrated for the 2.00-MeV alpha particles at reverse voltages higher than 40 V. By comparing measured CCE values with the outcomes of drift-diffusion simulations, a value of 500 ns is inferred for the hole lifetime within the lowly doped, active layer of virgin samples. The contributions of diffusion and funneling-assisted drift to CCE at low reverse voltages are pointed out.


2002 - Measurements and simulations of hot-carrier degradation effects in AlGaAs/GaAs HFETs [Relazione in Atti di Convegno]
Mazzanti, Andrea; Verzellesi, Giovanni; Basile, Alberto Francesco; Canali, Claudio; G., Sozzi; R., Menozzi
abstract

Hot-carrier degradation effects are investigated in AlGaAs/GaAs HFETs by coupling measurements and two-dimensional device simulations. It is shown that only a simultaneous, localised increase of defects at the gate-drain recess surface and channel-buffer interface can thoroughly account for the observed post-stress device behaviour in terms of drain saturation current decrease, reverse gate current increase, gate-lag enhancement.


2002 - Numerical analysis of hot electron degradation modes in power HFETs [Relazione in Atti di Convegno]
Mazzanti, Andrea; Verzellesi, Giovanni; Canali, Claudio; G., Sozzi; R., Menozzi
abstract

We present device simulation results showing that only a simultaneous, localised increase of the interface-state density at the gate-drain recess surface and of negative charge at the channel-buffer interface can thoroughly account for the hot-electron degradation modes observed experimentally in AlGaAs-GaAs HFETs, including drain saturation current degradation, reverse gate-current increase, kink and gate-lag enhancement.


2002 - Physical investigation of trap-related effects in power HFETs and their reliability implications [Articolo su rivista]
Mazzanti, Andrea; Verzellesi, Giovanni; G., Sozzi; R., Menozzi; C., Lanzieri; Canali, Claudio
abstract

This work shows a detailed physical investigation of trapping effects in GaAs power HFETs. Two-dimensional numerical simulations, performed using a hydrodynamic model thatincludes impact ionization, are compared with experimental results of fresh as well as hot carrier-stressed HFETs in order to gain insight of intertwined phenomena like the kink in theDC output curves, the hot-carrier degradation of the drain current and the impact-ionizationdominated reverse gate current. Thoroughly consistent results show that: (i) the kink effect isdominated by the traps at the source-gate recess surface; (ii) as far as the hot-carrier degradation is concerned, only a simultaneous increase of the trap density at the drain-gaterecess surface and at the channel-buffer interface (again at the drain side of the channel) is able to account for the simultaneous decrease of the drain current and the increase of theimpact-ionization-dominated reverse gate current.


2002 - Physics-Based Explanation of Kink Dynamics in AlGaAs/GaAs HFETs [Articolo su rivista]
Mazzanti, Andrea; Verzellesi, Giovanni; Canali, Claudio; G., Meneghesso; E., Zanoni
abstract

The physical origin of the kink and its dynamics are investigated in AlGaAs/GaAs doped-channel heterostructure field-effect transistors (HFETs) both through measurements and two-dimensional (2-D) device simulations. The kink is shown to arise from the interaction of surface deep acceptors with impact-ionization-generated holes, the latter partially discharging the deep levels and therefore leading to conductive-channel widening and to drain-current increase. Under pulsed operation, kink dynamics is governed by hole emission, and capture phenomena, prevailing at low and high drain-source voltages, respectively.


2001 - An all-p-type termination structure for silicon microstrip detectors [Relazione in Atti di Convegno]
G. F., DALLA BETTA; M., Boscardin; L., Bosisio; S., Dittongo; P., Gregori; I., Rachevskaia; Verzellesi, Giovanni; N., Zorzi
abstract

A novel termination structure for silicon microstrip detectors is proposed, featuring all-p-type multiguards and scribe-line implant, as well as inward metal field-plates providing almost complete coverage of the passivation-oxide external surface. The structure is intended for detector long-term stability improvement and fabrication-process simplification. Proper design of the multiguard layout enables a very stable behavior at relatively high bias voltages to be achieved.


2001 - Analytical model for the ohmic-side interstrip resistance of double-sided silicon microstrip detectors [Articolo su rivista]
Verzellesi, Giovanni; GF Dalla, Betta; Gu, Pignatel
abstract

A compact, analytical model is derived for the n-side interstrip resistance of double-sided silicon microstrip detectors, allowing for fast and accurate prediction of the minimum p-stop (or p-spray) implant dose ensuring adequate interstrip isolation. The basic idea on which the proposed model relies is that the portion of the detector between two adjacent n-strips can effectively be reduced to an equivalent n-channel MOSFET. The interstrip resistance can be evaluated as the output resistance of this equivalent MOSFET using standard SPICE-like models. The influence of radiation-induced oxide charge and p-stop (or p-spray) voltage can be accounted for by simply including, in the threshold voltage expression, the induced flat-band voltage shift and body-effect term, respectively.


2001 - Charge particle detection properties of epitaxial 4H-SiC Schottky diodes [Relazione in Atti di Convegno]
Nava, Filippo; P., Vanni; Verzellesi, Giovanni; A., Castaldini; A., Cavallini; L., Polenta; R., Nipoti; C., Donolato
abstract

This work presents measurements of the charge-collection properties of 4H-SiC Schottky diodes under alpha radiation and investigates the influence of native and alpha induced defects on the detector performance. The contribution of the diffusion of minority carriers to the charge collection efficiency is pointed out. Vaues of 500 ns and 95 us are inferred for the hole and electron lifetime respectively.


2001 - Comprehensive experimental and numerical assessment of hot electron reliability of power HFETs [Abstract in Atti di Convegno]
R., Menozzi; G., Sozzi; Verzellesi, Giovanni; Borgarino, Mattia; Canali, Claudio; C., Lanzieri
abstract

The technology of III-V FETs is nowadays mature, and traditional wear-out mechanisms are no longer a reliability bottleneck. On the other hand, field related degradation and failures have gained increasing relevance. However, the physical understanding of these degradation mechanisms and their relationship with FET design is still underdeveloped. The aim of this paper is to contribute to the comprehension of high-field reliability issues in GaAs power HFETs by coupling experiments with numerical simulations.


2001 - Dependence of impact ionization and kink on surface-deep-level dynamics in AlGaAs/GaAs HFETs [Relazione in Atti di Convegno]
Mazzanti, Andrea; Verzellesi, Giovanni; Vicini, L.; Canali, Claudio; Chini, Alessandro; Meneghesso, G.; Zanoni, E.; Lanzieri, C.
abstract

The physical origin of the kink and its dynamics are investigated in AlGaAs/GaAs HFETs both through measurements and two-dimensional device simulations. The kink arises from the interaction of recess surface defects with impact-ionization-generated holes, screening the negative trapped charge and partially discharging surface deep levels. Under pulsed operation, kink dynamics is governed by hole emission and capture phenomena, prevailing at low and high drain-source voltages, respectively. At high drain-source voltages, in particular, the drain-current time constant depends on impact ionization, the latter controlling surface hole density and, through it, hole capture rate.


2001 - Experimental/numerical investigation of the physical mechanisms behind high-field degradation of power HFETs and their implications on device design [Relazione in Atti di Convegno]
R., Menozzi; G., Sozzi; Verzellesi, Giovanni; Borgarino, Mattia; C., Lanzieri; Canali, Claudio
abstract

In a previous paper we showed how simple drift-diffusion simulations backed up the hypothesis of electron trapping at the device surface between gate and drain as a mechanism able to consistently explain all of the experimentally observed degradation modes following a high-field (hot carrier) stress. This paper expands on such previous findings by showing: (i) simulation results of HFETs with different recess geometries, and their implications on breakdown voltage and reliability; (ii) a detailed experimental and numerical investigation of surface trapping effects such as gate lag, transconductance frequency dispersion, and drain current kink, and their relationship with device degradation.


2001 - Gate-lag effects in AlGaAs/GaAs power HFET's [Articolo su rivista]
Borgarino, Mattia; G., Sozzi; Mazzanti, Andrea; Verzellesi, Giovanni
abstract

Gate-lag effects have been characterized in as-fabricated and hot-carrier-stressed power AlGaAs/GaAs HFET's and then compared with transconductance frequency dispersion measurements and studied by means of numerical simulations accounting for the occupation dynamics of surface deep-acceptor traps. We have found a clear direct correlation between the amount of gate-lag and of transconductance dispersion. The gate-lag tam-off transients of increasingly degraded devices have been accurately simulated by suitably increasing the surface trap density. (C) 2001 Elsevier Science Ltd. All rights reserved.


2001 - Improvement in breakdown characteristics with multiguard structures in microstrip silicon detectors for CMS [Articolo su rivista]
Bacchetta, N.; Bisello, D.; Candelori, A.; DA ROLD, M.; Descovich, M.; Kaminsky, A.; Messineo, A.; Rizzo, F.; Verzellesi, Giovanni
abstract

To obtain full charge collection the CMS silicon detectors should be able to operate at high bias voltage. We observed that multiguard structures enhance the breakdown performance of the devices on several tens of baby detectors designed for CMS. The beneficial effects of the multiguard structures still remains after the strong neutron irradiation performed to simulate the operation at the LHC.


2001 - Influence of surface-trap dynamics on impact-ionization and kink phenomena in AlGaAs/GaAs HFETs [Abstract in Atti di Convegno]
Mazzanti, Andrea; Verzellesi, Giovanni; Canali, Claudio; Chini, Alessandro; G., Meneghesso; E., Zanoni; C., Lanzieri
abstract

The kink effect is a detrimental phenomenon for the performance of III-V compound semiconductor FETs, resulting in output-conductance increase, transconductance compression, and dispersion between DC and RF characteristics. Although several papers have been dedicated to it, the physical origin of this effect is still a debated issue [1-4]. The aim of this work is to provide insight about the physical origin and the dynamic behavior of the kink in AlGaAs/GaAs HFETs.


2001 - Monolithic integration of Si-PIN diodes and n-channel double-gate JFET's for room temperature X-ray spectroscopy [Articolo su rivista]
DALLA BETTA, G. F.; Pignatel, G. U.; Verzellesi, Giovanni; Boscardin, M.; Fazzi, A.; Bosisio, L.
abstract

We report on Junction Field Effect Transistors and PIN diodes monolithically integrated on high-resistivity silicon by adopting a non-standard technology recently developed at IRST. In particular, a test structure, consisting of a small PIN diode DC-coupled to an integrated n-channel JFET in the double-gate configuration was fully characterised and spectroscopic measurements were carried out by adopting a novel double-feedback charge amplifier circuit. An ENC of about 60 electrons r.m.s. has been obtained at room temperature and at 10 ls shaping time; such a resolution is shown to be determined by the relatively high total capacitance present in this preliminary set-up, associated with the 1/f series noise of the transistor.


2001 - Surface effects on turn-off characteristics of AlGaAs/GaAs HFETs [Articolo su rivista]
E., Tediosi; Borgarino, Mattia; Verzellesi, Giovanni; R., Menozzi; G., Sozzi
abstract

The gate-lag turn-off transient of as-fabricated and hut-carrier stressed power AlGaAs/GaAs HFETs is addressed by quantitatively comparing experimental data with device simulations accounting for the occupation dynamics of surface deep-acceptor trays. Gate-lag waveforms of increasingly degraded devices can be accurately simulated by suitably increasing the surface trap density.


2001 - Surface-related kink effect in AlGaAs/GaAs power HFETs [Abstract in Atti di Convegno]
Tediosi, Erika; Verzellesi, Giovanni; Canali, Claudio; G., Sozzi; R., Menozzi; C., Lanzieri
abstract

We show that, differently from what generally accepted for GaAs- and InP-based HEMTs, where the kink is attributed to accumulation of impact-ionization-induced holes in the source access region [1,2], the kink arises in AlGaAs/GaAs HFETs from the combined effect of impact ionization and traps located at the gate-drain recess surface. Kink enhancement after hot-electron stress is a consequence of trap-density increase at this surface.


2001 - Trap characterization in buried-gate n-channel 6H-SiC JFETs [Articolo su rivista]
Meneghesso, G.; Chini, Alessandro; Verzellesi, Giovanni; Cavallini, A.; Canali, Claudio; Zanoni, E.
abstract

We present a detailed characterization of deep traps present in buried gate, n-channel 6H-SiC JFETs, based on transconductance measurements as a function of frequency. Four different deep levels have been identified, which are characterized by activation energies of 0.16, 0.18, 0.28 and 0.54 eV. Furthermore, based on the transconductance frequency dispersion features (upward or downward dispersion), we have been able to infer that three deep levels (0.16, 0.18 and 0.54 eV) are hole traps localized in thep-gate layer and one (0.28 eV) is an electron trap localizedin the n-channel.


2001 - Trap energetic and spatial localization in buried-gate 6H-SiC JFETs by means of numerical device simulation [Articolo su rivista]
Verzellesi, Giovanni; G., Meneghesso; A., Cavallini; E., Zanoni
abstract

Deep levels with activation energies up to 0.59 eV have been revealed in buried gate, n-channel 6H-silicon carbide JFETs, by means of capacitance- and current-mode deep level transient spectroscopy. Numerical device simulations of the drain-current transients following a gate-to-source voltage step have enabled us to localize the different deep levels both energetically and spatially.


2001 - Trap-related effects in 6H-SiC buried-gate JFETs [Abstract in Atti di Convegno]
G., Meneghesso; Chini, Alessandro; E., Zanoni; Verzellesi, Giovanni; Tediosi, Erika; Canali, Claudio; A., Cavallini; A., Castaldini
abstract

In this paper, deep levels are characterized in 6H-SiC, buried gate, n-channel JFETs by means of capacitance-mode (C-) and current-mode (I-) Deep Level Transient Spectroscopy (DLTS) and transconductance frequency dispersion measurements. Moreover, the drain-current transients following a gate-to-source voltage step are analyzed both experimentally and through two-dimensional device simulations allowing the dierent deep levels to be localized both energetically and spatially.


2001 - Two-dimensional numerical simulation of deep-level effects in 6H-SiC buried-gate JFETs [Abstract in Atti di Convegno]
Verzellesi, Giovanni; G., Meneghesso; A., Cavallini; E., Zanoni; Canali, Claudio
abstract

In this paper, deep-level effects are investigated in 6H-SiC, buried gate, n-channel JFETs, by means of measurements and simulations of the drain-current transients following a gate-source step, allowing the energetic and spatial localization of the traps to be inferred.


2000 - Charge particle detection properties of epitaxial 4H-SiC Schottky diodes [Abstract in Atti di Convegno]
Verzellesi, Giovanni; Vanni, Paolo; Nava, Filippo; E., Vittone; C., Manfredotti; A., LO GIUDICE; A., Castaldini; A., Cavallini; L., Polenta; R., Nipoti; C., Donolato
abstract


2000 - Charge preamplifier for hole collecting PIN diode and integrated tetrode N-JFET [Articolo su rivista]
A., Fazzi; G. U., Pignatel; G. F., DALLA BETTA; M., Boscardin; V., Varoli; Verzellesi, Giovanni
abstract


2000 - Compact modeling of n-side interstrip resistance in p-stop and p-spray isolated double-sided silicon microstrip detectors [Relazione in Atti di Convegno]
Verzellesi, Giovanni; G. F., DALLA BETTA; G. U., Pignatel
abstract

A compact, analytical model is derived for the n-side interstrip resistance of double-sided silicon microstrip detectors, allowing for fast and accurate prediction of the minimum p-stop (or p-spray) implant dose ensuring adequate interstrip isolation. The basic idea on which the proposed model relies is that the portion of the detector between two adjacent n-strips can effectively be assimilated to an equivalent n-channel MOSFET. The interstrip resistance can be evaluated as the output resistance of such an equivalent MOSFET using standard SPICE-like models. The influence of radiation-induced oxide charge and p-stop (or p-spray) voltage can be incorporated into the model by simply including in the threshold voltage expression the induced flat-band voltage shift and body-effect term, respectively.


2000 - Gate-length dependence of bulk generation lifetime and surface generation velocity measurement in high-resistivity silicon using gated diodes [Relazione in Atti di Convegno]
G. F., DALLA BETTA; Verzellesi, Giovanni; M., Boscardin; G. U., Pignatel; L., Bosisio; G., Soncini
abstract

The accuracy of the gated-diode method for extracting bulk generation lifetime and surface generation velocity in high resistivity silicon is shown to depend critically on the gate length of the adopted test device, as a result of nonidealities which are not accounted for by the measurement technique. Minimization of the surface generation velocity measurement error requires the gate length to be suitably reduced, while long gate devices are needed for accurate bulk generation lifetime extraction. Both parameters can be measured from a single test structure obtained by compenetrating a short gate device with a long gate one.


1999 - Charge preamplifier for hole collecting PIN diode and integrated tetrode N-JFET [Relazione in Atti di Convegno]
A., Fazzi; G. U., Pignatel; G. F., DALLA BETTA; M., Boscardin; V., Varoli; Verzellesi, Giovanni
abstract

“On-chip” electronics fabricated on 6 kOhmxcm high resistivity wafer is fully characterized and spectroscopic measurements carried out. A new charge sensitive circuit is introduced to amplify the hole signals with on-chip n-channel JFETs and without any resetting devices. The JFET gate-source junction is forward biased and the drain current is stabilized by a low frequency feedback on the JFET p+ well contact (used as a buried gate for the JFET). Preliminary setups with PIN diodes and tetrode n-JFETs are successfully tested. With about 5 pF total input capacitance, resolution of 86 rms electrons at 223 K with 10 us shaping time is obtained. With about 2.7 pF, 60 rms electrons at 298 K with 10 us are obtained.


1999 - Development of silicon microheaters for chemoresistive gas sensors [Relazione in Atti di Convegno]
S., Brida; L., Ferrario; F., Giacomozzi; D., Giusti; V., Guarnieri; B., Margesin; G. U., Pignatel; G., Soncini; A., Vasiliev; Verzellesi, Giovanni; M., Zen
abstract

We report on the design, fabrication, and characterization of a microheater module for chemoresistive, metal-oxide semiconductor gas sensors, consisting of a dielectric stacked membrane, micromachined from bulk silicon and with an embedded polysilicon resistor heater. Fabricated structures exhibit excellent heating efficiency, requiring only 30 mW to achieve a temperature of 500 C. Measured electrothermal characteristics are in good agreement with the outcomes of 3D numerical simulations.


1999 - Gate oxide reliability improvement related to dry local oxidation of silicon [Articolo su rivista]
Bellutti, P.; Zorzi, N.; Verzellesi, Giovanni
abstract


1999 - On the accuracy of generation lifetime measurement in high-resistivity silicon using PN gated diodes [Articolo su rivista]
Verzellesi, Giovanni; G. F., DALLA BETTA; L., Bosisio; M., Boscardin; G. U., Pignatel; G., Soncini
abstract

We show that in high-resistivity silicon bulk generation lifetime and surface generation velocity can not be measured with acceptable accuracy using a single gated diode, unless the gate length is suitably tailored. The accuracy with which bulk generation lifetime can be evaluated is, in particular, limited by nonidealities, contributing extra components to the gated-diode current, which are not accounted for in the standard extraction procedure.


1999 - Optimization of TMAH etching for MEMS [Relazione in Atti di Convegno]
S., Brida; L., Ferrario; V., Guarnieri; F., Giacomozzi; B., Margesin; M., Paranjape; Verzellesi, Giovanni; M., Zen
abstract

Tetra-methyl ammonium hydroxide (TMAH) is an anisotropic silicon etchant that is gaining considerable use in silicon sensor micromachining due to its excellent compatibility with CMOS processing, selectivity, anisotropy and relatively low toxicity, as compared to the more used KOH and EDP etchants. In this paper, the influence of temperature and concentration of the TMAH solution together with oxidizer additions is studied in order to optimize the anisotropic silicon etching for MEMS fabrication. In particular this optimized etchant formulation has been employed at ITC-Irst in the development of a basic fabrication process for piezoresistive pressure sensors based on a silicon membrane and four resistors connected in a Weatherstone bridge configuration. The active element of the sensor, i.e. the thin silicon membrane, is formed by etching anisotropically from the backside of the wafer. Both process and etching have to be tuned and matched in order to obtain an optimum fabrication sequence. Some improvements such as higher etch rate and better surface finish have been obtained by the addition of ammonium peroxidsulfate as oxidizing agent under different conditions. This simplifies both the post processing and the tech set-up. The process parameters and the thermo-electro-mechanical characteristics of the pressure sensors were tested and are compared with the analytical and numerical simulations.


1999 - Self-limitation of edge-generated currents in single-sided microstrip detectors after type inversion [Relazione in Atti di Convegno]
Verzellesi, Giovanni; G. F., DALLA BETTA; M., DA ROLD; G. U., Pignatel; A., Paccagnella; L., Bosisio
abstract

Heavily irradiated p+ on n single-sided microstrip detectors show no dramatic increase in the leakage current due to contributions originating from the cut region, despite, after type inversion, the space-charge region is touching the heavily-damaged, cutting edge, already at zero bias. In this paper, we present both theoretical and experimental results aimed at providing interpretation for such phenomenon. In particular, we show that, for high defect densities at the detector cutting edge, the hole density approaches locally its equilibrium value. Correspondingly, the net generation rate saturates, this ultimately limiting the amount of current which can originate from the detector edge. Measurements from devices irradiated at different fluences are in good agreement with simulation results.


1999 - Study of breakdown effects in silicon multiguard structures [Articolo su rivista]
M., DA ROLD; N., Bacchetta; D., Bisello; A., Paccagnella; G. F., DALLA BETTA; Verzellesi, Giovanni; O., Militaru; R., Wheadon; P. G., Fuochi; C., Bozzi; R., Dell'Orso; A., Messineo; G., Tonelli; P. G., Verdini
abstract

The purpose of this work is to study layout solutionsaimed at increasing the breakdown voltage in silicon micro-stripdetectors. Several structures with multiple floating guards in different configurations have been designed and produced on highresistivity silicon wafers. The main electrical characteristics ofthese devices have been measured before and after irradiation.Both radiation-induced surface and bulk damage effects wereconsidered as well. The highest breakdown voltage was foundon devices featuring p+ guards without field plates. A simulationstudy has been carried out on simplified structures to evaluatethe distribution of the breakdown field as a function of the guardlayout. The aim was the design optimization.


1999 - Thermo-mechanical analysis of microstructures for chemoresistive gas sensors [Relazione in Atti di Convegno]
D., Giusti; Verzellesi, Giovanni; G. U., Pignatel
abstract

The thermo-mechanical behaviour of different bulk-micromachined microheater structures for chemoresistive gas sensors is investigated by means of 3D finite element simulation. Si3N4-SiO2-Si3N4 and SiO2-Si3N4-SiO2 stacked membranes are compared in terms of heat confinement and mechanical properties. The mechanical behaviour of the membrane and of two different suspended-bridge structures under applied external load is analysed. The present study served as a basis for the development of a microheater which hase shown excellent heating efficiency characteristics.


1999 - Two-dimensional numerical simulation of edge-generated currents in type-inverted, single-sided silicon microstrip detectors [Articolo su rivista]
Verzellesi, Giovanni; DALLA BETTA, G. F.; Pignatel, G. U.; Soncini, G.
abstract

A theoretical study is presented showing that the reverse leakage current thermally generated at the cutting edge of type-invertedp+/n single-sided silicon microstrip detectors is limited. Such behavior is shown to be related to a self-limiting mechanism acting on the edge surface generation, which prevents the net generation rate of electron-hole pairs at the detector edge from exceeding a saturation value, as the local hole density approaches its equilibrium value.


1998 - Breakdown and low-temperature anomalous effects in 6H SiC JFETs [Relazione in Atti di Convegno]
G., Meneghesso; A., Bartolini; Verzellesi, Giovanni; A., Cavallini; A., Castaldini; Canali, Claudio; E., Zanoni
abstract

The aim of this work is to describe experimental results concerning on-state weak ionization effects, off-state gate-drain breakdown phenomena and low-temperature electrical anomalies in buried-gate 6H SiC JFETs. We demonstrate that surface traps and deep impurity levels can give rise to anomalous phenomena such as Id -Vds kinks in the drain current, dispersion of transconductance and negative thermal coefficient of breakdown voltage.


1998 - Design and optimisation of an npn bipolar phototransistor for optical position encoders [Articolo su rivista]
DALLA BETTA, G. F.; Pignatel, G. U.; Verzellesi, Giovanni; Bellutti, P.; Boscardin, M.; Ferrario, L.; Zorzi, N.; Maglione, A.
abstract


1998 - Development of a detector-compatible JFET technology on high-resistivity silicon [Articolo su rivista]
Dalla Betta, G. F.; Boscardin, M.; Pignatel, G. U.; Verzellesi, Giovanni; Bosisio, L.; Ferrario, L.; Zen, M.; Soncini, G.
abstract


1998 - High voltage operation of silicon devices for LHC experiments [Articolo su rivista]
N., Bacchetta; D., Bisello; A., Candelori; M., Cavone; G. F., Dalla Betta; M., Da Rold; G., De Liso; R., Dell'Orso; P. G., Fuochi; A., Messineo; O., Militaru; A., Paccagnella; G., Tonelli; P. G., Verdini; Verzellesi, Giovanni; R., Wheadon
abstract

High-voltage operation can be a solution to obtain full charge collection in strongly irradiated silicon detectors. Themaximum bias voltage which can be applied is limited by the breakdown point of the junction. We show how multiguardstructures can enhance the breakdown voltage in p-n silicon devices designed for applications in the LHC environment.


1998 - Silicon PIN radiation detectors with on-chip front-end junction field effect transistors [Articolo su rivista]
G. F., Dalla Betta; Verzellesi, Giovanni; M., Boscardin; L., Bosisio; G. U., Pignatel; L., Ferrario; M., Zen; G., Soncini
abstract

We report on the latest results obtained from the development of a fabrication technology for PIN radiation detectors with on-chip front-end junction field effect transistors (JFETs) integrated on high-resistivity, FZ silicon. P-doped polysilicon back-side gettering prevented carrier lifetime degradation in spite of the relatively high thermal budget characterizing the fabrication process, allowing very low leakage currents to be obtained. Results from JFETs electrical characterization are presented, showing high transconductance and output resistance values as well as low gate currents and input capacitance. JFETs performance is not affected by the high reverse-bias voltage required for detector operation, making these devices suitable for the fabrication of monolithical preamplifiers integrated on the detector chip.


1997 - Modelling of Light-Addressable Potentiometric Sensors [Articolo su rivista]
L., Colalongo; Verzellesi, Giovanni; D., Passeri; A., Lui; P., Ciampolini; M., Rudan
abstract

In this paper, the extension of numerical simulationtechniques to the analysis of light-addressable potentiometricsensors (LAPS) is discussed in detail. To this purpose, properphysical models of both the ion-sensitive and the photo-sensitivetransduction mechanisms have been incorporated into the framework of a general-purpose device simulator. A self-consistent, accurate picture of charge transport within the device under the combined action of electrolyte ion layers and of luminous stimulus is recovered, which in turn, allows for detailed analysis of the device behavior and for fine-tuning of fabrication process. Extensive comparison with actual LAPS measurement has been performed, validating the tool and illustrating its flexibility and application range.


1997 - Numerical analysis of ISFET and LAPS devices [Articolo su rivista]
Verzellesi, Giovanni; Colalongo, L.; Passeri, D.; Margesin, B.; Rudan, M.; Soncini, G.; Ciampolini, P.
abstract

In this paper, a numerical simulation technique suitable for device-level analysis of ion-sensitive devices (ion-sensitive field-effect-transistor (ISFET) and light-addressable potentiometric sensor (LAPS)) is presented. Models of the charge layers which develop at the electrolyte–insulator interface of an electrolyte insulator-semiconductor (EIS) system are incorporated into the device equations, thus providing a self-consistent picture of charge and field distribution within the semiconductor domain. To accomplish the simulation of LAPS devices, an AC-modulated optical generation rate has been introduced as well. A TCAD tool, based on the proposed approach, has been developed, which allows for the electrical characterization and for the extraction of circuit-simulation parameters of ion-sensitive devices. Validation of the device-analysis technique comes from the comparison between predicted electrical responses and actual device measurements.


1997 - Radiation effects on breakdown characteristics of multiguarded devices [Articolo su rivista]
Da Rold, M.; Paccagnella, A.; Da Re, A.; Verzellesi, Giovanni; Bacchetta, N.; Wheadon, R.; Dalla Betta, G. F.; Candelori, A.; Soncini, G.; Bisello, D.
abstract

Multiguard structures are used in order to enhance the breakdown voltage of microstrip detectors. In this work we studied the electrical properties of devices designed in four different layouts on n-Si substrates, based on a central diode surrounded by various p+ and/or n+ floating rings. In particular we measured the main DC characteristics and we compared the experimental results with those simulated by a two-dimensional drift-diffision computer model. Device noise was also measured for the central diode as a function of the applied voltage. We repeated all measurements after neutron and gamma irradiation, in view of the application of these devices to silicon microstrip detectors for future high energy physics experiments. For example at the LHC the level of radiation damage expected during the detector lifetime implies very high bias voltages for the detector operation. Multiguards can offer a solution, provided the optimisation of the design takes into account the radiation effects.


1997 - Si-PIN X-Ray detector technology [Articolo su rivista]
Dalla Betta, G. F.; Pignatel, G. U.; Verzellesi, Giovanni; Boscardin, M.
abstract

PIN diodes and other test structures have been fabricated on both n- and p-type, high-resistivity, Floating-Zone (FZ) silicon substrates. Different alternative extrinsic-gettering techniques have been adopted to the purpose of meeting the required specification of a detector leakage current density lower than 1 nA/cm2. Phosphorus-doped polysilicon gettering provided the best results on n-type Si with a leakage current density lower than 0.2 nA/cm2 at 100 um depletion width. On the contrary, devices made on p-type substrates exhibited a leakage current density two orders of magnitude higher. A proper control of the oxide charge at the silicon-silicon dioxide interface was found to be crucial in obtaining a predictable behavior of PIN diode detectors. Some degradation of the reverse leakage current has been observed after device dicing and bonding.


1996 - A test chip for the development of PIN-type silicon radiation detectors [Relazione in Atti di Convegno]
G. F., Dalla Betta; M., Boscardin; Verzellesi, Giovanni; G. U., Pignatel; A., Fazzi; G., Soncini
abstract

PIN radiation detectors and other test-structures have been fabricated on a FZ, high resistivity (2 kΩ·cm), n-type silicon substrate by a process that features three different, alternative extrinsic-gettering techniques. Extremely-low leakage-current values have been measured regardless of the gettering technique adopted, this confirming the effectiveness of gettering procedures in limiting the detector leakage current. In particular, devices exploiting a phosphorus-doped polysilicon backside layer as gettering site have shown the best results in terms of leakage-current and generation-lifetime values. Results from the electrical and optical characterization of such devices are reported and discussed.


1996 - Forward and reverse characteristics of irradiated MOSFET's [Articolo su rivista]
Paccagnella, A.; Ceschia, M.; Verzellesi, Giovanni; Dalla Betta, G. F.; Bellutti, P.; Fuochi, P. G.; Soncini, G.
abstract

pMOSFETs biased with Vgs<Vgd during Co60 gamma irradiation have shown substantial differences between the forward and reverse subthreshold characteristics, induced by a non-uniform charge distribution in the gate oxide. Correspondingly, modest differences have been observed in the over-threshold I-V characteristics. After irradiation, the forward subthreshold curves can shift at higher or lower gate voltages than the reverse ones. The former behaviour has been observed in long-channel devices, in agreement with the classical MOS theory and numerical simulations. The latter result has been obtained in short-channel devices, and it has been correlated to a parasitic punch-through conduction mechanism.


1996 - Light-Addressable Potentiometric Sensors - Model and Experiments [Relazione in Atti di Convegno]
L., Colalongo; Verzellesi, Giovanni; D., Passeri; A., Lui; M., Rudan; P., Ciampolini
abstract

A numerical methodology for device-level analysis of Light-Addressable Potentiometric Sensors (LAPS) is presented. The formulation of charge transport equations adopted in the present model accounts for the charge layers at the electrolyte-insulator interface and for AC modulated optical generation rate. Comparisons with actual LAPS responses provide validation of the TCAD tool.


1996 - Numerical analysis of ISFET and LAPS devices [Relazione in Atti di Convegno]
Verzellesi, Giovanni; L., Colalongo; D., Passeri; B., Margesin; M., Rudan; G., Soncini; P., Ciampolini
abstract

A numerical simulation technique suitable for device-level analysis of ion-sensitive devices is presented. The charge layers which develop at the electrolyte-insulator interface of an EIS system are taken into account in the formulation of charge transport equations, thus providing a self-consistent picture of charge and field distribution within the device. AC-modulated optical generation rate has also been taken into account, to make the simulation of LAPS device feasible. Comparisons with actual device responses provide validation of the TCAD tool.


1996 - SPICE modelling of impact ionisation effects in silicon bipolar transistors [Articolo su rivista]
Verzellesi, Giovanni; A., Dal Fabbro; Pavan, Paolo; L., Vendrame; E., Zabotto; A., Zanini; A., Chantre; E., Zanoni
abstract

A nonlocal, energy based impact ionisation model for bipolar transistors is implemented into a general purpose circuit simulator. With respect to conventional, either empirical or electric field based, models, the proposed approach enables a more physical and accurate description of impact ionisation effects in modern, high speed bipolar transistors, where non-negligible nonstationary transport effects take place as a consequence of the strong spatial variations in the electric field at the base-collector junction. The conventional base resistance model is also modified, to take into account the base resistance dependence on bias in the presence of an impact ionisation induced reverse base current. Neglecting the influence of the reverse base current on the base resistance can result in an underestimation of the degradation of both DC and switching performance of bipolar transistors due to impact ionisation. The implemented models are validated by comparison with experimental results obtained from devices of two different technologies.


1995 - Design of an n-channel JFET on high-resistivity silicon for radiation-detector on-chip read-out electronics [Articolo su rivista]
Dalla Betta, G. F.; Verzellesi, Giovanni; Pignatel, G. U.; Amon, S.; Boscardin, M.; Soncini, G.
abstract

We report on the design of an n-channel Junction Field Effect Transistor (JFET) on fully-depleted, high-resistivity, n-type silicon substrate, which is intended to be utilized as an active device in the on-chip preamplifier of the silicon radiation detectors we are developing. Two-dimensional process and device simulations are employed to optimize the device doping profile, as well as to point out some important advantages of the proposed structure over possible alternative device designs. In particular, the proposed JFET, in which an externally-contacted, p-type well isolates the active device from the high-resistivity substrate, presents higher output-resistance values than a device directly fabricated on substrate. Moreover, it is not affected by a parasitic phenomenon resulting in gate-current increase and noise-performance degradation, which, in contrast, characterizes a device with a floating well.


1995 - Influence of impact-ionization-induced base current reversal on bipolar transistor parameters [Articolo su rivista]
L., Vendrame; E., Zabotto; A., Dal Fabbro; A., Zanini; Verzellesi, Giovanni; E., Zanoni; A., Chantre; Pavan, Paolo
abstract

In this paper we describe a set of measurements representing a complete characterization of impact-ionization effects in bipolar transistors. We demonstrate that impact-ionization significantly influences the dependence of base resistance on current and voltages applied to the device. A dc method for the simultaneous extraction of all parasitic resistances in bipolar transistors is presented. The method can separate the influence of current-crowding on the base resistance from that of base width and conductivity modulation; the collector parasitic resistance is measured in the active region. Starting from the parameters extracted by means of these techniques, a complete and accurate circuit-model of impact-ionization effects can be defined.


1995 - Junction heterostructures for high performance electronics [Articolo su rivista]
J. B., Shealy; W. N., Jiang; P. A., Parikh; Verzellesi, Giovanni; U. K., Mishra
abstract

The exploding market in mm-wave wireless communications market requires a simple transistor technology which: (i) exhibits high performance across a wide bias range to perform both transmit and receive operations; (ii) has high threshold uniformity to enable high density, high speed signal processing circuits; and (iii) has basic technological requirements which is relatively transparent to both commercially important materials, InP and GaAs. The heterojunction transistor technology presented here satisfies these requirements.


1994 - A physics-based, accurate SPICE model of impact-ionization effects in bipolar transistors [Relazione in Atti di Convegno]
E., Zanoni; A., Dal Fabbro; L., Vendrame; Verzellesi, Giovanni; G., Meneghesso; Pavan, Paolo; A., Chantre
abstract

A new SPICE model of the bipolar transistor including avalanche multiplication and current crowding effects is described. Impact-ionization phenomena are modelled referring to a physical description of impact-ionization coefficients, rather than to semi-empirical laws, as in previous models. We show that an accurate analysis of multiplication effects can be obtained only if the influence of impact ionization on current crowding and parasitic base resistance is included in the model and described exactly. The model also allows one to easily include high injections effects, which are important for the evaluation of breakdown voltage at high emitter current.


1994 - FOXFET BIASED MICROSTRIP DETECTORS - AN INVESTIGATION OF RADIATION SENSITIVITY [Articolo su rivista]
Bacchetta, N; Bisello, D; Canali, Claudio; DA ROS, R; Giraldo, A; Gotra, Y; Paccagnella, A; Piacentino, Gm; Verzellesi, Giovanni
abstract

Radiation effects have been studied on single-sided FOXFET biased detectors and related test patterns. Radiation induced modifications of the electrical parameters and their thermal stability at room temperature and upon annealings have been studied for proton and gamma irradiations. The detector electrical characteristics have been correlated to Si bulk and surface damage, and to changes of the FOXFET properties. Interstrip resistance and capacitance have been investigated for gamma, p+ and n irradiations.


1994 - Punch-through characteristics of FOXFET biased detectors [Articolo su rivista]
Bacchetta, N.; Bisello, D.; Da Ros, R.; Giraldo, A.; Gotra, Y.; Paccagnella, A.; Verzellesi, Giovanni
abstract

The main punch-through characteristics have been studied on Field Oxide FETs (FOXFETs) used for microstrip biasing in Si detectors. The voltage current DC curves have been studied on devices with different channel widwength ratios, fabricated on Si substrates with Merent doping levels. The punch-through threshold voltage depends on the positive charge in the gate oxide, device layout and temperature. The relation between punch-through current and dynamic resistance is insensitive to charge accumulation in the gate oxide induced by irradiation and to different Si donor doping levels. Dynarmc resistance however varies as the doping changes from n- to p-type, and it also depends on the Si bulk damage induced by neutron irradation. The AC impedance will reproduce the DC dynamic resistance, but show also large effects due to parasitic capacitance, which dominates the FOXFET response at high frequency and can affect the detector performance.


1993 - A compact method for measuring parasitic resistances in bipolar transistors [Relazione in Atti di Convegno]
Verzellesi, Giovanni; A., Chantre; R., Turetta; M., Cappellin; Pavan, Paolo; E., Zanoni
abstract

We present a compact experimental technique for the extraction of all parasitic series resistances of bipolar transistors, which require only few DC measurements and no special device structure. The method is based upon the fact that, due to impact ionization within the base-collector space-charge region, at a certain collector-base voltage the base current and therefore the voltage drop on the base resistance are reduced to zero.


1993 - DEGRADATION OF SILICON AC-COUPLED MICROSTRIP DETECTORS INDUCED BY RADIATION [Articolo su rivista]
Bacchetta, N; Bisello, D; Canali, Claudio; Fuochi, Pg; Gotra, Y; Paccagnella, A; Verzellesi, Giovanni
abstract

Results are presented showing the radiation response of ac-coupled FOXFET biased microstrip detectors and related test patterns to be used in the microvertex detector of the CDF experiment at Fermi National Laboratory. Radiation tolerance of detectors to gamma and proton irradiation has been tested and the radiation induced variations of the dc electrical parameters have been analyzed. Long term post-irradiation behaviour of detector characteristics have been studied, and the relevant room temperature annealing phenomena have been discussed.


1993 - Extension of impact-ionization multiplication coefficient measurements to high electric fields in advanced Si BJTs [Articolo su rivista]
E., Zanoni; Ef, Crabbe; Jmc, Stork; Pavan, Paolo; Verzellesi, Giovanni; L., Vendrame; Canali, Claudio
abstract

Measurements of the impact-ionization multiplication coefficient M - 1 in advanced Si BJT's up to values in excess of 10 (corresponding to a peak electric field at the base-collector junction of about 9 . 10(5) V/cm) are presented. The intrinsic limitations affecting M - 1 measurements at high electric fields are discussed. In particular, the fundamental role played by the negative base current and the parasitic base resistance in determining instabilities during M - 1 measurements is pointed out An accurate theoretical prediction of the M - 1 coefficient at collector-base voltages close to BV(CBO) requires that the contribution of holes to impact ionization be properly accounted for.


1993 - Extraction of DC base parasitic resistance of bipolar transistors based on impact-ionization-induced base current reversal [Articolo su rivista]
Verzellesi, Giovanni; R., Turetta; Pavan, Paolo; A., Collini; A., Chantre; A., Marty; Canali, Claudio; E., Zanoni
abstract

A new method for the evaluation of the dc base parasitic resistance of bipolar transistors is described. The method is based on impact-ionization-induced base current reversal and enables the base resistance to be evaluated independently from the emitter parasitic resistance in a wide range of emitter current and collector-base voltage, without requiring any special device structure. The method can also extract the base resistance in impact-ionization regime, where current crowding due to negative base current induces an increase in base resistance at increasing emitter current.


1993 - Impact-ionization effects in advanced Si bipolar transistors [Capitolo/Saggio]
Verzellesi, Giovanni; Pavan, Paolo; E., Zanoni; Canali, Claudio
abstract

Non disponibile


1993 - New method for extracting collector series resistance of bipolar transistors [Articolo su rivista]
Verzellesi, Giovanni; Turetta, R.; Cappellin, M.; Pavan, Paolo; Chantre, A.; Zanoni, E.
abstract

A new technique for extracting the collector series resistance of bipolar transistors is presented. The method is based on impact-ionisation-induced base current reversal and provides the value which the collector resistance assumes in the forward active region of operation.


1993 - Prediction of impact-ionization-induced snap-back in advanced Si n-p-n BJTs by means of a non-local analytical model for the avalanche multiplication factor [Articolo su rivista]
Verzellesi, Giovanni; Baccarani, G.; Canali, Claudio; Pavan, Paolo; Vendrame, L.; Zanoni, E.
abstract

When a triangular shape for the electric field in the base-collector space-charge region of an n-p-n Si BJT (bipolar junction transistor) is assumed, the electron mean energy can be calculated analytically from a simplified energy-balance equation. On this basis a nonlocal-impact-ionization model, suitable for computer-aided circuit simulation, has been obtained and used to calculate the output characteristics at constant emitter-base voltage (grounded base) of advanced devices. Provided the experimental bias-dependent value of the base parasitic resistance is accounted for in the device model, the base-collector voltage at which impact-ionization-induced snap-back occurs can be accurately predicted.


1993 - RADIATION TOLERANCE OF THE FOXFET BIASING SCHEME FOR AC-COUPLED SI MICROSTRIP DETECTORS [Articolo su rivista]
Bacchetta, N; Bisello, D; Canali, Claudio; DA ROS, R; Fuochi, Pg; Fusaro, G; Giraldo, A; Gotra, Y; Paccagnella, A; Verzellesi, Giovanni
abstract

The radiation response of FOXFETs has been studied for proton, gamma and neutron exposures. The punch-through behaviour, which represents the normal FET operating conditions in Si microstrip detectors, has been found to be much less sensitive to radiation damage than threshold voltage. The device performance has been elucidated by means of two-dimensional simulations. The main radiation effects have been also taken into account in the numerical analysis and separately examined.


1992 - A new experimental technique for extracting base resistance and characterizing current crowding phenomena in bipolar transistors [Relazione in Atti di Convegno]
Verzellesi, Giovanni; L., Vendrame; R., Turetta; Pavan, Paolo; A., Chantre; A., Marty; M., Cavone; R., Rivoir; E., Zanoni
abstract

A new dc technique for extracting parasitic base resistance, RB, of advanced bipolar transistors is described. The technique is based on impact-ionization-induced base current reversal and enables RB to be measured as a function of collector-base voltage and of emitter current. To obtain accurate results, the influence of the Early effect on the emitter-base voltage at constant emitter current must be accounted for. Measured values of R, are correlated with current crowding phenomena, which can be directly observed by means of emission microscopy.


1992 - Measurements and simulation of avalanche breakdown in advanced Si bipolar transistors [Relazione in Atti di Convegno]
E., Zanoni; E. F., Crabbe; J. M. C., Stork; Pavan, Paolo; Verzellesi, Giovanni; L., Vendrame; Canali, Claudio
abstract

A complete analytical model for impact ionization effects in bipolar transistors, which is able to predict the behaviour of advanced devices up to breakdown, is presented. A simple expression of the carrier mean energy suitable for circuit simulation is used to calculate the device multiplication coefficient and enables the influence of non-equilibrium transport on impact ionization to be accounted for. The role played by the reverse base current in determining the snapback of the common base output characteristics is investigated both experimentally and theoretically.


1991 - Optical generation in semiconductor-device analysis, a general purpose implementation [Relazione in Atti di Convegno]
Verzellesi, Giovanni; M. C., Vecchi; M., Zen; M., Rudan
abstract

The description of the optical-generation phenomena has been incorporated in the semiconductor-device analysis program HFIELDS. This has been achieved by introducing a number of optical windows and interleaved material layers through which a radiation with arbitrary spectrum, incidence angle, and polarization state enters the crystal, and by evaluating the corresponding generation rate at each node of the discretization grid. The code equipped with this new capability makes the description of realistic semiconductor optical sensors feasible.