Pierpaolo PALESTRI - personale UniMoRe

Nuova ricerca

Pierpaolo PALESTRI

Professore Ordinario
Dipartimento di Ingegneria "Enzo Ferrari"

Pubblicazioni

2024 - Characterization and Advanced Modeling of Dielectric Defects in Low-Thermal Budget RMG MOSFETs Using 1/f Noise Analysis [Articolo su rivista]
Asanovski, R.; Arimura, H.; de Marneffe, J. -F.; Palestri, P.; Horiguchi, N.; Kaczer, B.; Selmi, L.; Franco, J.
abstract

2024 - Characterization of DC performance and low-frequency noise of an array of nMOS Forksheets from 300 K to 4 K [Articolo su rivista]
Asanovski, R.; Grill, A.; Franco, J.; Palestri, P.; Mertens, H.; Ritzenthaler, R.; Horiguchi, N.; Kaczer, B.; Selmi, L.
abstract

2024 - Comprehensive Analysis of Graphene Geometric Diodes: Role of Geometrical Asymmetry and Electrostatic Effects [Articolo su rivista]
Truccolo, D.; Palestri, P.; Esseni, D.; Boscolo, S.; Midrio, M.
abstract

2024 - Finite-element modeling of neuromodulation via controlled delivery of potassium ions using conductive polymer-coated microelectrodes [Articolo su rivista]
Verardo, Claudio; Mele, Leandro Julian; Selmi, Luca; Palestri, Pierpaolo
abstract

: Objective. The controlled delivery of potassium is an interesting neuromodulation modality, being potassium ions involved in shaping neuron excitability, synaptic transmission, network synchronization, and playing a key role in pathological conditions like epilepsy and spreading depression. Despite many successful examples of pre-clinical devices able to influence the extracellular potassium concentration, computational frameworks capturing the corresponding impact on neuronal activity are still missing.Approach. We present a finite-element model describing a PEDOT:PSS-coated microelectrode (herein, simplyionic actuator) able to release potassium and thus modulate the activity of a cortical neuron in anin-vitro-like setting. The dynamics of ions in the ionic actuator, the neural membrane, and the cellular fluids are solved self-consistently.Main results. We showcase the capability of the model to describe on a physical basis the modulation of the intrinsic excitability of the cell and of the synaptic transmission following the electro-ionic stimulation produced by the actuator. We consider three case studies for the ionic actuator with different levels of selectivity to potassium: ideal selectivity, no selectivity, and selectivity achieved by embedding ionophores in the polymer.Significance. This work is the first step toward a comprehensive computational framework aimed to investigate novel neuromodulation devices targeting specific ionic species, as well as to optimize their design and performance, in terms of the induced modulation of neural activity.

2023 - Critical overview and comparison between models for adsorption-desorption noise in bio-chemical sensors [Articolo su rivista]
Bettetti, F.; Mele, L. J.; Palestri, P.
abstract

We critically review existing models for the adsorption-desorption noise in bio-chemical sensors, in particular the model based on simplified forward Kolmogorov equation and the models based on Langevin sources. For the latter models, we propose a generalized version to handle cases beyond the branched surface reactions (a binding site that can be alternatively occupied by different ions/molecules) and the chained reaction (a binding site that sequentially binds with ions/molecules). The models are benchmarked against kinetic Monte Carlo (kMC) simulations considering relevant case studies such as pH-sensitive ions, selective molecules binding on a functionalized surface and multi-layer adsorption on bare surfaces. It is found that although the mathematical formulation of the modeling approaches appears different, when dealing with independent binding sites, they are fully equivalent and perfectly match the kMC results. The case of competitive binding considering the correlation between the occupation of the binding sites has also been analyzed.

2023 - Editorial: Selected papers from the 8th Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS 2022) [Articolo su rivista]
Driussi, F.; Esseni, D.; Lizzit, D.; Palestri, P.
abstract

2023 - Experimental Characterization of Separate Absorption–Multiplication GaAs Staircase Avalanche Photodiodes under Continuous Laser Light Reveals Periodic Oscillations at High Gains [Articolo su rivista]
Colja, Matija; Cautero, Marco; Arfelli, Fulvia; Bertolo, Michele; Biasiol, Giorgio; Dal Zilio, Simone; Driussi, Francesco; Menk, Ralf Hendrik; Modesti, Silvio; Palestri, Pierpaolo; Pilotto, Alessandro; Cautero, Giuseppe
abstract

2023 - From Finite Element Simulations to Equivalent Circuit Models of Extracellular Neuronal Recording Systems based on Planar and Mushroom Electrodes [Articolo su rivista]
Leva, Federico; Verardo, Claudio; Palestri, Pierpaolo; Selmi, Luca
abstract

2023 - Identification of Axon Bendings in Neurons by Multiphysics FEM Simulations of High-Density MEA Extracellular Recordings [Relazione in Atti di Convegno]
Leva, Federico; Corna, Andrea; Werginz, Paul; Palestri, Pierpaolo; Zeck, Guenter; Selmi, Luca
abstract

2023 - Investigating the correlation between interface and dielectric trap densities in aged p-MOSFETs using current-voltage, charge pumping, and 1/f noise characterization techniques [Articolo su rivista]
Asanovski, Ruben; Franco, Jacopo; Palestri, Pierpaolo; Kaczer, Ben; Selmi, Luca
abstract

2023 - Mitigation of Electrical/Ionic Interference in Iontronic Neurostimulation/Neurosensing Platforms: A Simulation Study [Relazione in Atti di Convegno]
Nicolini, Jacopo; Leva, Federico; Palestri, Pierpaolo; Selmi, Luca
abstract

2023 - Probing Band Tail States in MOSFETs at Cryogenic Temperatures through Noise Spectroscopy [Relazione in Atti di Convegno]
Asanovski, R.; Grill, A.; Franco, J.; Palestri, P.; Li, R.; Kubicek, S.; De Greve, K.; Kaczer, B.; Selmi, L.
abstract

2023 - Understanding the Excess 1/f Noise in MOSFETs at Cryogenic Temperatures [Articolo su rivista]
Asanovski, R; Grill, A; Franco, J; Palestri, P; Beckers, A; Kaczer, B; Selmi, L
abstract

Characterization, modeling, and development of cryo-temperature CMOS technologies (cryo-CMOS) have significantly progressed to help overcome the interconnection bottleneck between qubits and the readout interface in quantum computers. Nevertheless, available compact models still fail to predict the deviation of 1/f noise from the expected linear scaling with temperature ( $ extit{T}$ ), referred to as "excess 1/f noise ", observed at cryogenic temperatures. In addition, 1/f noise represents one of the main limiting factors for the decoherence time of qubits. In this article, we extensively characterize low-frequency noise on commercial 28-nm CMOS and on research-grade Ge-channel MOSFETs at temperatures ranging from 370 K down to 4 K. Our investigations exclude electron heating and bulk dielectric defects as possible causes of the excess 1/f noise at low temperatures. We show further evidence for a strong correlation between the excess 1/f noise and the saturation of the subthreshold swing (SS) observed at low temperatures. The most plausible cause of the excess noise is found in band tail states in the channel acting as additional capture/emission centers at cryogenic temperatures.

2022 - A Time-Domain Simulation Framework for the Modeling of Jitter in High-Speed Serial Interfaces [Articolo su rivista]
Cortiula, A.; Menin, D.; Bandiziol, A.; Grollitsch, W.; Nonis, R.; Palestri, P.
abstract

We report on the development of a time-domain numerical modeling framework to estimate timing jitter in High-Speed Serial Interfaces (HSSI) including a wide range of effects such as Inter-Symbol Interference (ISI) due to channel dispersion, phase noise of transmitter (TX) and receiver (RX) frequency synthesizers and use of bang-bang phase detector in the Clock and Data Recovery (CDR) loop. Based on the step response of the channel, the numerical model computes the response of the system to a random sequence of bits and provides information in terms of eye diagram, bathtub plot and jitter histogram. Different definitions of jitter are investigated, and for each of them we consider the physical effects that are included, eventually identifying that the most complete definition is based on the time distance between the edges instants defined by the CDR and the crossing points of the sampled signal. We also found that this definition is consistent with the features of the bathtub plot. A channel compliant with the PCIe 4.0 standard is used as test vehicle, including the main equalization strategies. The numerical model is then compared to a simple analytical model for the CDR jitter that can be augmented by including Data-Dependent Jitter (DDJ). An approach to system-level analysis based on proper combination of the above elements is eventually proposed to provide quick although accurate aid to the design of CDRs in HSSIs.

2022 - A simulation study of FET-based nanoelectrodes for active intracellular neural recordings [Relazione in Atti di Convegno]
Leva, Federico; Palestri, Pierpaolo; Selmi, Luca
abstract

2022 - Accurate Nonlocal Impact Ionization Models for Conventional and Staircase Avalanche Photodiodes derived by Full Band Monte Carlo Transport Simulations [Articolo su rivista]
Pilotto, A.; Esseni, D.; Selmi, L.; Palestri, P.
abstract

2022 - Bidirectional modulation of neuronal excitability via ionic actuation of potassium [Altro]
Verardo, Claudio; Jolivet, Renaud; Mele, Leandro Julian; Giugliano, Michele; Palestri, Pierpaolo
abstract

Potassium K+ is a fundamental actor in the shaping of action potentials, and its concentration in the extracellular microenvironment represents a crucial modulator of neural excitability. Yet, its employment as a neuromodulation modality is still in its infancy. Recent advances in the technology of ionic actuators are enabling the control of ionic concentrations at the spatiotemporal scales of micrometers and milliseconds, thereby holding the promise of making the control of K+ concentration a key enabling technology for the next generation of neural interfaces. In this regard, a theoretical framework to understand the possibilities and limits offered by such technology is pivotal. To this aim, we exploit the Hodgkin-Huxley modeling framework, augmented to account for the perturbation of extracellular K+ concentration. We leverage methods of bifurcation analysis to investigate which regimes of electrical activity arise in the space of the input variables, namely the extent of ionic actuation and the synaptic current. We show that, depending on the type of target neuron, switchings of the class of excitability may occur in such space. These effects could rule out the possibility of eliciting tonic spiking when the extracellular K+ concentration is assumed as a sole control input. Building upon these findings, we show in simulations how to address the problem of neuromodulation via ionic actuation in a principled fashion. In this respect, we account for a bidirectional scenario, namely from the perspective of both inhibiting and stimulating electrical activity. We then provide a first-order motivation for the switchings of neural excitability in terms of the conductances of the K+-selective channels. Finally, we introduce a Pinsky-Rinzel-like model to investigate the effects of performing the ionic actuation locally at the neural membrane.

2022 - Editorial: Letters from the 8th Joint International EUROSOI workshop and International Conference on Ultimate Integration on Silicon [Articolo su rivista]
Driussi, F.; Esseni, D.; Lizzit, D.; Palestri, P.
abstract

2022 - Importance of Charge Trapping/Detrapping Involving the Gate Electrode on the Noise Currents of Scaled MOSFETs [Articolo su rivista]
Asanovski, R.; Palestri, P.; Selmi, L.
abstract

Carrier trapping/detrapping from/to the gate into dielectric traps is often neglected when modeling noise in MOSFETs and, to the best of our knowledge, no systematic study of its impacts on scaled devices is available. In this article, we show that this trapping mechanism cannot be neglected in nowadays aggressively scaled gate dielectric thicknesses without causing errors up to several orders of magnitude in the estimation of the drain current noise. The noise generation mechanism is modeled analytically and then analyzed through the use of 2-D and 3-D TCAD simulations of scaled MOSFETs with different architectures and channel/gate-stack materials. The results provide new insights for technology and device designers, highlight the relevance of the choice of the gate metal work function (WF) and the role of valence band electron trapping at high gate voltages.

2022 - Modeling Approaches for Gain, Noise and Time Response of Avalanche Photodiodes for X-Rays Detection [Articolo su rivista]
Pilotto, A.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Cautero, G.; Cautero, M.; Colja, M.; Driussi, F.; Esseni, D.; Menk, R. H.; Nichetti, C.; Rosset, F.; Selmi, L.; Steinhartova, T.; Palestri, P.
abstract

We report on a suite of modeling approaches for the optimization of Avalanche Photodiodes for X-rays detection. Gain and excess noise are computed efficiently using a non-local/history dependent model that has been validated against full-band Monte Carlo simulations. The (stochastic) response of the detector to photon pulses is computed using an improved Random-Path-Length algorithm. As case studies, we consider diodes consisting of AlGaAs/GaAs multi-layers with separated absorption and multiplication regions. A superlattice creating a staircase conduction band structure is employed in the multiplication region to keep the multiplication noise low. Gain and excess noise have been measured in devices fabricated with such structure and successfully compared with the developed models.

2022 - Modeling Non-Equilibrium Ion-Transport in Ion-Selective-Membrane/Electrolyte Interfaces for Electrochemical Potentiometric Sensors [Articolo su rivista]
Mele, L. J.; Palestri, P.; Selmi, L.; Alam, M. A.
abstract

We present an approach to simulate ion's drift and diffusion in chemical sensors based on ion-selective-membranes (ISMs) in either ion-selective electrode structures or coupled to field-effect transistors. The model is used to analyze the sensitivity, selectivity, and transient response of ISMs in non-equilibrium conditions upon real-time concentration changes. Our simple implementation combines advanced features from semiconductor theory and analytical electrochemistry, such as the Schafetter-Gummel discretization scheme and Chang-Jaffé boundary conditions for ions at the interfaces, thus allowing to perform simulations beyond sensing. The results are in agreement with experimental transient responses reported in the literature. As relevant case studies, we examine the ISM preconditioning in miniaturized sensors and the electrostatic interaction between the FET channel and ISMs. In the first case, simulations reveal that calibration curves performed on incomplete ISM conditioning can lead to hysteretical responses when the ion affinity in the electrolyte and ISM is similar (e.g., with organic ions). In the second case, we find that the gate oxide field in contact with the ISM affects the device characteristics such that the ion concentrations not only change the FET threshold voltage but also the slope of its IV curve. This effect can be minimized by working in the subthreshold regime or using extended gates.

2022 - Modeling and optimization of graphene ballistic rectifiers [Articolo su rivista]
Truccolo, D.; Boscolo, S.; Esseni, D.; Midrio, M.; Palestri, P.
abstract

We present a simulation framework based on the combination of Monte Carlo transport and Landauer-Buttiker formalism to model and optimize ballistic rectifiers exploiting the long mean-free-path of graphene. The influence on the responsivity (i.e. the induced voltage normalized by the impinging power) of the main geometrical parameters, of bias and of different scattering mechanisms is critically analyzed.

2022 - Multiphysics Finite-Element Modeling of the Neuron/Electrode Electrodiffusive Interaction [Relazione in Atti di Convegno]
Leva, Federico; Verardo, Claudio; Mele, Leandro Julian; Palestri, Pierpaolo; Selmi, Luca
abstract

2022 - Multiscale simulation analysis of passive and active micro/nano-electrodes for CMOS-based in-vitro neural sensing devices [Articolo su rivista]
Leva, Federico; Selmi, Luca; Palestri, Pierpaolo
abstract

Neuron and neural network studies are remarkably fostered by novel stimulation and recording systems, which often make use of biochips fabricated with advanced electronic technologies and, notably, micro and nanoscale CMOS. Models of the transduction mechanisms involved in the sensor and recording of the neuron activity are useful to optimize the sensing device architecture and its coupling to the readout circuits, as well as to interpret the measured data. Starting with an overview of recently published integrated active and passive micro/nano-electrode sensing devices for in-vitro studies fabricated with modern (CMOS based) micro-nano technology, this paper presents a mixed-mode device-circuit numerical analytical multiscale and multiphysics simulation methodology to describe the neuron-sensor coupling, suitable to derive useful design guidelines. A few representative structures and coupling conditions are analyzed in more detail in terms of the most relevant electrical figures of merit including signal-to-noise ratio.

2022 - New insights on the excess 1/f noise at cryogenic temperatures in 28 nm CMOS and Ge MOSFETs for quantum computing applications [Relazione in Atti di Convegno]
Asanovski, R.; Grill, A.; Franco, J.; Palestri, P.; Beckers, A.; Kaczer, B.; Selmi, L.
abstract

2022 - On the accuracy of the formula used to extract trap density in MOSFETs from 1/f noise [Relazione in Atti di Convegno]
Asanovski, R.; Palestri, P.; Selmi, L.
abstract

Noise spectroscopy is a powerful non-destructive technique to characterize the quality of gate dielectrics in MOSFETs. Trap densities are routinely extracted by fitting the 1/f part of the drain current noise spectrum with a widely known analytical expression containing several approximations within. This paper compares this 1/f noise analytical expression with microscopic simulations, evaluates its accuracy under different scenarios, and highlights when the main assumptions fall short. It is found that the expression agrees well with non-radiative multi-phonon (NMP) models at room temperature for devices featuring a thick dielectric. However, the formula fails to correctly predict the noise of nowadays aggressively scaled devices, because it neglects trapping/de-trapping with the gate electrode and the electrostatic charge scaling of the traps due to their distance from the channel.

2022 - Reproducing capacitive cyclic voltammetric curves by simulation: When are simplified geometries appropriate? [Articolo su rivista]
Mele, Lj; Verardo, C; Palestri, P
abstract

The usage of multi-physics simulation tools is steadily increasing in the field of electrochemistry. While this is a great opportunity for closing the gap between analytical electrochemists used to simple 1D models and exper-imentalists, there are possible pitfalls that must be avoided. In this work, we raise awareness on numerical ar-tifacts that can mislead the interpretation of cyclic voltammetry experiments through simulations of geometries with different number of spatial dimensions. In particular, we show that one-dimensional simulations can suffer from substantial errors when models go beyond charge neutrality assumption. We exemplify such situations using simple electrolyte/electrode structures with 1D, 2D and 3D geometries. We then show the occurrence of artifacts related to the geometry of the simulation domain on the simulation of cyclic voltammetric curves as those typically performed to characterize conjugated polymer/electrolyte blends. All the models are imple-mented using COMSOL Multiphysics and are accompanied by a detailed description of their implementation. However, geometrical artifacts identified in this work also apply to other simulation approaches.

2022 - Selectivity, Sensitivity and Detection Range in Ion-Selective Membrane-based Electrochemical Potentiometric Sensors analyzed with Poisson-Boltzmann equilibrium model [Articolo su rivista]
Mele, L. J.; Palestri, P.; Alam, M. A.; Selmi, L.
abstract

We present and validate an equilibrium model based on the Poisson-Boltzmann equations that includes the main ingredients to simulate ion-sensitive membranes in the context of electrochemical potentiometric sensors with and without ionophores. With respect to phase boundary models, our model includes spatial resolution of the electrostatic potential and concentrations. The model enables the study of Nernstian and non-Nernstian equilibrium responses, helps improving the detection range and investigating selectivity and cross-sensitivity issues related to interferent ions in the sample solution. Therefore, the model is a useful support for the design of potentiometric microelectronic sensors and helps optimizing relevant membrane features such as ionic sites and ionophore concentration for best sensitivity and selectivity.

2022 - Semi-classical transport in MoS2 and MoS2 transistors by a Monte Carlo approach [Articolo su rivista]
Pilotto, A.; Khakbaz, P.; Palestri, P.; Esseni, D.
abstract

2022 - Study of gain, noise, and collection efficiency of GaAs SAM-APDs single pixel [Articolo su rivista]
Colja, M.; Cautero, M.; Menk, R. H.; Palestri, P.; Gianoncelli, A.; Antonelli, M.; Biasiol, G.; Zilio, S. D.; Steinhartova, T.; Nichetti, C.; Arfelli, F.; De Angelis, D.; Driussi, F.; Bonanni, V.; Pilotto, A.; Gariani, G.; Carrato, S.; Cautero, G.
abstract

2022 - Synchrotron Radiation Study of Gain, Noise, and Collection Efficiency of GaAs SAM-APDs with Staircase Structure [Articolo su rivista]
Colja, Matija; Cautero, Marco; Menk, Ralf Hendrik; Palestri, Pierpaolo; Gianoncelli, Alessandra; Antonelli, Matias; Biasiol, Giorgio; Dal Zilio, Simone; Steinhartova, Tereza; Nichetti, Camilla; Arfelli, Fulvia; De Angelis, Dario; Driussi, Francesco; Bonanni, Valentina; Pilotto, Alessandro; Gariani, Gianluca; Carrato, Sergio; Cautero, Giuseppe
abstract

2021 - A Comprehensive Gate and Drain Trapping/Detrapping Noise Model and Its Implications for Thin-Dielectric MOSFETs [Articolo su rivista]
Asanovski, R.; Palestri, P.; Caruso, E.; Selmi, L.
abstract

We derive a complete set of expressions for the MOSFET gate and drain power spectral densities due to elastic and inelastic trapping/detrapping of channel carriers into the gate dielectric. Our calculations explain trapping/detrapping noise (TDN) in various FET operating regions and highlight trap's position-dependent terms, often neglected in the literature, which are instead important for devices with thin gate dielectrics. Furthermore, we show that TDN has a contribution to the gate current noise, correlated with the drain current fluctuations and we highlight the role of the transfer function between channel charge fluctuations and drain current on the noise characteristics. The model expressions are carefully validated by comparison with 2-D and 3-D TCAD simulations of scaled MOSFETs with different architectures (bulk, fully depleted-silicon-on-insulator (FD-SOI), FinFET), channel, and gate materials. Besides shedding new light on TDN, the results could enable trap density extraction from experimental samples with improved accuracy and pave the way to complete and accurate compact models for TDN in MOSFETs.

2021 - A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS [Articolo su rivista]
Okuhara, H.; Elnaqib, A.; Dazzi, M.; Palestri, P.; Benatti, S.; Benini, L.; Rossi, D.
abstract

The increasing complexity of Internet-of-Things (IoT) applications and near-sensor processing algorithms is pushing the computational power of low-power, battery-operated end-node systems. This trend also reveals growing demands for high-speed and energy-efficient inter-chip communications to manage the increasing amount of data coming from off-chip sensors and memories. While traditional microcontroller interfaces such as SPIs cannot cope with tight energy and large bandwidth requirements, low-voltage swing transceivers can tackle this challenge, thanks to their capability to achieve several Gbps of the communication speed at milliwatt power levels. However, recent research on high-speed serial links focused on high-performance systems, with a power consumption significantly larger than the one of low-power IoT end-nodes, or on stand-alone designs not integrated at a system level. This article presents a low-swing transceiver for the energy-efficient and low-power chip-to-chip communication fully integrated within an IoT end-node system-on-chip, fabricated in CMOS 65-nm technology. The transceiver can be easily controlled via a software interface; thus, we can consider realistic scenarios for the data communication, which cannot be assessed in stand-alone prototypes. Chip measurements show that the transceiver achieves $8.46 imes $ higher energy efficiency at $15.9 imes $ higher performance than a traditional microcontroller interface such as a single-SPI.

2021 - Analytical Modeling of Jitter in Bang-Bang CDR Circuits Featuring Phase Interpolation [Articolo su rivista]
Palestri, P.; Elnaqib, A.; Menin, D.; Shyti, K.; Brandonisio, F.; Bandiziol, A.; Rossi, D.; Nonis, R.
abstract

This article proposes compact expressions for the jitter in clock and data recovery (CDR) circuits based on bang-bang phase detector including the phase noise of the transmitter and receiver oscillators as well as the quantization noise associated with the finite number of phases of the phase interpolator (PI) that align the receiver clock to the incoming data. Different approaches to perform the Early/Late detection on deserialized data and edge samples are compared: the use of majority voting degrades the CDR bandwidth, increasing the impact of the clock jitter on the CDR jitter; on the other hand, counting the single Early/Late occurrences does not degrade the bandwidth but increases the noise related to the finite phases of the PI. The proposed analytical formulas are validated against event-driven behavioral simulations of the CDR system including free-running oscillators as well as phase-locked loop (PLL) for clock generation.

2021 - Device simulations of ion-sensitive FETs with arbitrary surface chemical reactions [Relazione in Atti di Convegno]
Mele, L. J.; Palestri, P.; Selmi, L.
abstract

In this work, we exploit the general-purpose solver COMSOL, equipped with electrolyte and semiconductor physics modules, to implement a versatile model of potentiometric chemical sensors including arbitrarily complex surface reactions at the oxide/electrolyte interface with examples on 2D devicelevel simulations of an ISFET. Firstly, Multiphysics simulations of VTH sensitivity to pH sensing are compared with analyses based on semiconductor TCAD. Then, more complex Na+ sensing experiments are examined and numerical simulations are compared against 1D electrochemical models.

2021 - Modeling Low and High Field Uniform Transport in Monolayer MoS2 [Relazione in Atti di Convegno]
Pilotto, Alessandro; Khakbaz, Pedram; Palestri, Pierpaolo; Esseni, David
abstract

We have developed a multi-valley Monte Carlo simulator to study uniform transport in MoS 2 monolayers. At low electric field, our solver is in excellent mutual agreement with a numerical solution of the linearized Boltzmann Transport Equation. We have then explored high field transport and analyzed the influence of different scattering mechanisms on the electron saturation velocity. Although scattering with neutral defects and Coulomb centers strongly affects the mobility, the effect on the saturation velocity is only modest. On the other hand, scattering with surface optical phonons has a significant influence on the saturation velocity, which we physically interpreted by inspecting the energy and momentum distributions of carriers.

2021 - Modeling Nanoscale III–V Channel MOSFETs with the Self-Consistent Multi-Valley/Multi-Subband Monte Carlo Approach [Articolo su rivista]
Caruso, Enrico; Esseni, David; Gnani, Elena; Lizzit, Daniel; Palestri, Pierpaolo; Pin, Alessandro; Puglisi, Francesco Maria; Selmi, Luca; Zagni, Nicolò
abstract

We describe the multi-valley/multi-subband Monte Carlo (MV–MSMC) approach to model nanoscale MOSFETs featuring III–V semiconductors as channel material. This approach describes carrier quantization normal to the channel direction, solving the Schrödinger equation while off-equilibrium transport is captured by the multi-valley/multi-subband Boltzmann transport equation. In this paper, we outline a methodology to include quantum effects along the transport direction (namely, source-to-drain tunneling) and provide model verification by comparison with Non-Equilibrium Green’s Function results for nanoscale MOSFETs with InAs and InGaAs channels. It is then shown how to use the MV–MSMC to calibrate a Technology Computer Aided Design (TCAD) simulation deck based on the drift–diffusion model that allows much faster simulations and opens the doors to variability studies in III–V channel MOSFETs.

2021 - On the interpretation of MOS impedance data in both series and parallel circuit topologies [Articolo su rivista]
Caruso, E.; Lin, J.; Monaghan, S.; Cherkaoui, K.; Floyd, L.; Gity, F.; Palestri, P.; Esseni, D.; Selmi, L.; Hurley, P. K.
abstract

We investigate the interplay between the series (S) and parallel (P) equivalent circuit representations of the MOS system conductance (G) and capacitance (C) in inversion. Experimental and simulated data for Si and InGaAs MOSCAPs are firstly analyzed mathematically. It is found that by interpreting the measured data in both the series and parallel mode, five independent values are obtained for the magnitude and frequency of the maxima and minima points of the −ωdCS,P/dω and GS,P/ω functions versus angular frequency (ω). The significance and application of the approach is presented and discussed.

2021 - Sensitivity, Selectivity and Chemical Noise Models for ion-sensitive FETs [Abstract in Atti di Convegno]
Mele, L. J.; Palestri, P.; Selmi, L.
abstract

2021 - Sensitivity, noise and resolution in a beol-modified foundry-made isfet with miniaturized reference electrode for wearable point-of-care applications [Articolo su rivista]
Bellando, F.; Mele, L. J.; Palestri, P.; Zhang, J.; Ionescu, A. M.; Selmi, L.
abstract

Ion-sensitive field-effect transistors (ISFETs) form a high sensitivity and scalable class of sensors, compatible with advanced complementary metal-oxide semiconductor (CMOS) processes. Despite many previous demonstrations about their merits as low-power integrated sensors, very little is known about their noise characterization when being operated in a liquid gate configuration. The noise characteristics in various regimes of their operation are important to select the most suitable conditions for signal-to-noise ratio (SNR) and power consumption. This work reports systematic DC, transient, and noise characterizations and models of a back-end of line (BEOL)-modified foundry-made ISFET used as pH sensor. The aim is to determine the sensor sensitivity and resolution to pH changes and to calibrate numerical and lumped element models, capable of supporting the interpretation of the experimental findings. The experimental sensitivity is approximately 40 mV/pH with a normalized resolution of 5 mpH per µm2, in agreement with the literature state of the art. Differences in the drain current noise spectra between the ISFET and MOSFET configurations of the same device at low currents (weak inversion) suggest that the chemical noise produced by the random binding/unbinding of the H+ ions on the sensor surface is likely the dominant noise contribution in this regime. In contrast, at high currents (strong inversion), the two configurations provide similar drain noise levels suggesting that the noise originates in the underlying FET rather than in the sensing region.

2020 - 1/f noise model based on trap-assisted tunneling for ultra-thin oxides MOSFETs [Abstract in Atti di Convegno]
Caruso, Enrico; Palestri, Pierpaolo; Selmi, Luca; Asanovski, Ruben
abstract

We derive an analytical model for 1/f noise in MOSFETs, highlighting a term that is often neglected in literature but becomes important for ultra-thin oxides. Furthermore, we identify an interesting relationship between the thermal noise of the gate impedance and the gate noise due to trapping/detrapping between the free carriers in the channel and the oxide traps, as well as the 1/f noise cross-correlation between drain and gate, showing that a single voltage noise generator is not enough to describe completely the 1/f noise. TCAD simulations are used to verify the model predictive capabilities.

2020 - A Simple Modelling Tool for Fast Combined Simulation of Interconnections, Inter-Symbol Interference and Equalization in High-Speed Serial Interfaces for Chip-to-Chip Communications [Articolo su rivista]
Menin, Davide; Bernardi, Thomas; Cortiula, Alessio; Dazzi, Martino; Prà, Alessio De; Marcon, Mattia; Scapol, Marco; Bandiziol, Andrea; Brandonisio, Francesco; Cristofoli, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
abstract

We describe an effcient system-level simulator that, starting from the architecture of a well-specified transmissive medium (a channel modelled as single-ended or coupled differential microstrips plus cables) and including the system-level characteristics of transmitter and receiver (voltage swing, impedance, etc.), computes the eye diagram and the bit-error rate that is obtained in high-speed serial interfaces. Various equalization techniques are included, such as feed-forward equalization at the transmitter, continuous-time linear equalization and decision-feedback equalization at the receiver. The impact of clock and data jitter on the overall system performance can easily be taken into account and fully-adaptive equalization can be simulated without increasing the computational burden or the model’s complexity.

2020 - A model for the jitter of avalanche photodiodes with separate absorption and multiplication regions [Articolo su rivista]
Rosset, F.; Pilotto, A.; Selmi, L.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Cautero, G.; De Angelis, D.; Driussi, F.; Menk, R. H.; Nichetti, C.; Steinhartova, T.; Palestri, P.
abstract

An improved version of the Random Path Length algorithm is used to simulate the time response of Separate Absorption and Multiplication Avalanche PhotoDiodes (SAM-APDs) in the linear regime. The model takes into account both the diffusion and the drift of carriers in the absorption region as well as impact ionization scattering events in the multiplication region. An extended formulation of Ramo's theorem is used to determine the current waveforms. The new algorithm has been used to extract the jitter of the time response of avalanche photodiodes to photons, which is a relevant figure of merit for time of flight applications of SAM-APDs. It is found that an electric field in the absorption region small enough to avoid unwanted carrier multiplication or band-to-band tunneling, is beneficial to reduce the jitter. Furthermore, we have found that, in APDs working in the linear regime, the stochastic duration of the current pulse makes difficult the use of circuit techniques, such as crossover timing, with constant delay lines aimed at detecting the individual pulses. The problem is partly mitigated when SAM-APDs are used for the detection of high energy photons, such as X-rays.

2020 - An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes [Relazione in Atti di Convegno]
Okuhara, Hayate; Elnaqib, Ahmed; Rossi, Davide; Di Mauro, Alfio; Mayer, Philipp; Palestri, Pierpaolo; Benini, Luca
abstract

2020 - Dependability Assessment of Transfer Length Method to Extract the Metal–Graphene Contact Resistance [Articolo su rivista]
Driussi, Francesco; Venica, Stefano; Gahoi, Amit; Kataria, Satender; Lemme, Max C.; Palestri, Pierpaolo
abstract

The measurement of the contact resistance (RC) in semiconductor devices relies on the well–established Transfer Length Method (TLM). However, an in–depth investigation on its applicability to characterize the metal–graphene contacts is still missing. In this work, a dependability analysis on the RC values extracted from several metal–graphene stacks is performed, also devising strategies to limit the large observed statistical errors and to obtain dependable results. In particular, artifacts due to an incorrect application of TLM, e.g., negative resistance values, can be eliminated. Finally, a simulation study is proposed to quantify the contribution to RC of the so–called junction resistance at the edge of the contact, that some authors in the literature invoke to explain the observed artifacts.

2020 - Design and Simulation of a 12 Gb/s Transceiver With 8-Tap FFE, Offset-Compensated Samplers and Fully Adaptive 1-Tap Speculative/3-Tap DFE and Sampling Phase for MIPI A-PHY Applications [Articolo su rivista]
Menin, Davide; Bandiziol, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
abstract

2020 - Effects of p doping on GaAs/AlGaAs SAM-APDs for X-rays detection [Articolo su rivista]
Nichetti, C.; Steinhartova, T.; Antonelli, M.; Biasiol, G.; Cautero, G.; De Angelis, D.; Pilotto, A.; Driussi, F.; Palestri, P.; Selmi, L.; Arfelli, F.; Danailov, M.; Menk, R. H.
abstract

This work focuses on avalanche photodiodes based on GaAs/AlGaAs with separated absorption and multiplication regions (SAM-APDs). The two regions are separated by a thin p-doped layer which, under the application of a reverse bias, is able to confine the potential drop only in the multiplication region. We realized such layer under the form of either a δ sheet of C atoms or a 50-nm-thick GaAs:C layer. Devices with these two structures will be discussed and compared in terms of capacitance and response to light.

2020 - Experimental and simulation analysis of carrier lifetimes in GaAs/AlGaAs Avalanche Photo-Diodes [Relazione in Atti di Convegno]
Driussi, F.; Pilotto, A.; De Belli, D.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Cautero, G.; Menk, R. H.; Nichetti, C.; Selmi, L.; Steinhartova, T.; Palestri, P.
abstract

Extensive experimental characterization and TCAD simulation analysis have been used to study the dark current in Avalanche Photo-Diodes (APDs). The comparison between the temperature dependence of measurements and simulations points out that SRH generation/recombination is responsible for the observed dark current. After the extraction of the carrier lifetimes in the GaAs layers, they have been used to predict the APD collection efficiency of the photo-generated currents under realistic operation conditions and as a function of the photogeneration position inside the absorption layer.

2020 - Full-band monte carlo simulations of GaAs p-i-n avalanche PhotoDiodes: What are the limits of nonlocal impact ionization models? [Relazione in Atti di Convegno]
Pilotto, A.; Driussi, F.; Esseni, D.; Selmi, L.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Carrato, S.; Cautero, G.; De Angelis, D.; Menk, R. H.; Nichetti, C.; Steinhartova, T.; Palestri, P.
abstract

We present a Full-Band Monte Carlo (FBMC) investigation of impact ionization in GaAs p-i-n Avalanche Photodiodes (APDs). FBMC simulations have been used to compute the gain and the excess noise factor and a new equation has been derived for the extraction of history-dependent impact ionization coefficients from FBMC simulations. Results from FBMC are then compared with the ones of nonlocal historydependent impact ionization models. We found that at high reverse bias voltages it is important to take into account the fact that secondary carriers are generated with nonzero kinetic energy. Finally, we propose an improved history-dependent model using an energy-dependent mean free path.

2020 - General Approach to Model the Surface Charge Induced by Multiple Surface Chemical Reactions in Potentiometric FET Sensors [Articolo su rivista]
Mele, L. J.; Palestri, P.; Selmi, L.
abstract

We propose a general methodology to calculate the individual sensitivity and the cross-sensitivities of potentiometric sensor devices (e.g., ion sensitive FETs (ISFETs), CHEMFETs) with an arbitrary number of non-interacting receptors binding to ionic species or analytes in the electrolyte. The surface charge generated at the (bare or functionalized) interface with the electrolyte is described by the Poisson equation coupled to a linear system of equations for each type of receptor, where the unknowns are the fractions of sites binding with a given ion/analyte. Our general model encompasses in a unique framework a few simple special cases so far separately reported in the literature and provides for them closed-form expressions of the average site occupation probability. Detailed procedural description of the usage and benefits of the model is shown for specific cases with concurring surface chemical reactions.

2020 - General model and equivalent circuit for the chemical noise spectrum associated to surface charge fluctuation in potentiometric sensors [Articolo su rivista]
Mele, L. J.; Palestri, P.; Selmi, L.
abstract

This paper firstly reports a general and powerful approach to evaluate the power spectral density (PSD) of the surface charge fluctuations, so-called “chemical noise”, from a generic set of reactions at the sensing surface of potentiometric sensors such as, for instance, Ion-Sensitive Field Effect Transistors (ISFETs). Starting from the master equation, the spectral noise signature of a reaction set is derived as a function of the reaction kinetic parameters and of the interface concentration of the ionic species. Secondly, we derive an equivalent surface admittance, whose thermal noise PSD produces a noise PSD equal to that of the surface charge fluctuations. We also show how to expand this surface admittance into stair-case RC networks, with a number of elementary cells equal to the number of surface reactions involved. This admittance can be included in circuit simulations coupled with a SPICE compact model of the underlying FET, to enable the physically based modelling of frequency dispersion and noise of the sensing layer when simulating the sensor and the read-out. Validation with existing models and literature results as well as new application examples are provided. The proposed methodology to compute the PSD from rate equations is amenable to use in different contexts where fluctuations are generated by random transitions between discrete states with given exchange rates.

2020 - Modeling Selectivity and Cross-sensitivity in membrane-based potentiometric sensors [Relazione in Atti di Convegno]
Mele, L. J.; Palestri, P.; Selmi, L.
abstract

We propose a steady state model for ion selective membranes (ISM) as selectivity element in potentiometric sensors. The model solves the Poisson-Boltzmann equation, coupled to distributed chemical reactions between ionophores and two types of competing ions. We show that a Donnan potential arises when ionic sites are present, while selectivity is achieved only if using ionophore-doped ISMs. The model allows to evaluate cross-sensitivities and can explain steady state non-Nernstian responses. We also provide an application example of sensor parameter design supported by the proposed model.

2020 - Modelling of vertical nano-needles as sensing devices for neuronal signal recordings [Relazione in Atti di Convegno]
Selmi, Luca; Palestri, Pierpaolo; Leva, Federico
abstract

This paper reports a design-oriented numerical study of vertical Si-nanowires to be used as sensing elements for the detection of the intracellular electrical activity of neurons. An equivalent lumped-element circuit model is derived and validated by comparison with physics-based numerical simulations. Most of the component values can be identified individually by geometrical and physical considerations. The transfer function and the SNR of the sensor in presence of thermal noise are derived, and the impact of the device geometry is shown.

2020 - Optimization of GaAs/AlGaAs staircase avalanche photodiodes accounting for both electron and hole impact ionization [Articolo su rivista]
Pilotto, A.; Nichetti, C.; Palestri, P.; Selmi, L.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Cautero, G.; Driussi, F.; Esseni, D.; Menk, R. H.; Steinhartova, T.
abstract

A recently developed nonlocal history dependent model for electron and hole impact ionization is used to compute the gain and the excess noise factor in avalanche photodiodes featuring heterojunctions of III-V compound semiconductors while accounting for both carriers. The model has been calibrated with measurements by our group, as well as on noise versus gain data from the literature. We explore the avalanche photodiode design trade-offs related to the number of GaAs/AlGaAs conduction band steps for X-ray spectroscopy applications.

2020 - Systematic Modeling of Electrostatics, Transport, and Statistical Variability Effects of Interface Traps in End-Of-The-Roadmap III-V MOSFETs [Articolo su rivista]
Zagni, Nicolò; Caruso, Enrico; Puglisi, Francesco Maria; Pavan, Paolo; Palestri, Pierpaolo; Verzellesi, Giovanni
abstract

Thanks to their superior transport properties, Indium Gallium Arsenide (InGaAs) Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) constitute an alternative to conventional Silicon MOSFETs for digital applications at ultra-scaled nodes. The successful integration of this technology is challenged mainly by the high defect density in the gate oxide and at the interface with the semiconductor channel, which degrades the electrostatics and could limit the potential benefits over Si. In this work, we i) establish a systematic modeling approach to evaluate the performance degradation due to interface traps in terms of electrostatics and transport of InGaAs Dual-Gate Ultra-Thin Body (DG-UTB) FETs, and ii) investigate the effects of random interface-trap concentration as another roadblock to the scaling of the technology, due to statistical variability of the threshold voltage. Variability is assessed with a Technology CAD (TCAD) simulator calibrated against Multi-Subband Monte Carlo (MSMC) simulations. The modeling approach overcomes the TCAD limitations when dealing with ultra-thin channels (i.e., below 5 nm) without altering crucial geometrical parameters that would compromise the dependability of the variability analysis. Our results indicate that interface-trap fluctuation becomes comparable with the other variability sources dominating the total variability when shrinking the device dimensions, thus contrasting the trend of reduced variability with scaling. This in turn implies that interface and border traps may strongly limit the benefits of InGaAs over Silicon if not effectively reduced by gate process optimization.

2020 - The Role of Oxide Traps Aligned With the Semiconductor Energy Gap in MOS Systems [Articolo su rivista]
Caruso, Enrico; Lin, Jun; Monaghan, Scott; Cherkaoui, Karim; Gity, Farzan; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Hurley, Paul K.
abstract

2020 - Ultra-High Frequency (500 MHz) Capacitance Spectroscopy for Nanobiosensing [Abstract in Atti di Convegno]
Cossettini, Andrea; Brandalise, Denis; Palestri, Pierpaolo; Bertacchini, Alessandro; Ramponi, Michele; Widdershoven, Frans; Benini, Luca; Selmi, Luca
abstract

Abstract—We report unprecedented ultra high frequency capacitance spectroscopy measurements up to 500 MHz on a nanoelectrode array for biosensing applications, which extends considerably the previous 70 MHz limit. To achieve this goal, a high-frequency adapter board and measurement system are designed to drive the sensing nanoelectrodes of an existing biochip with appropriate clocks generated by an advanced highspeed pulser. Experimental results in dry and in electrolyte conditions are reported. The extended frequency range enables to overcome the Debye screening cut-off frequency of electrolytes at physiological salt concentrations, thus disclosing new perspectives for single molecule detection.

2019 - A Simple Simulation Approach for the Estimation of Convergence and Performance of Fully Adaptive Equalization in High-Speed Serial Interfaces [Articolo su rivista]
Menin, Davide; De Pra, Alessio; Bandiziol, Andrea; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
abstract

2019 - A model of the interface charge and chemical noise due to surface reactions in Ion Sensitive FETs [Relazione in Atti di Convegno]
Mele, Leandro Julian; Palestri, Pierpaolo; Selmi, Luca
abstract

We present a model of arbitrary chemical reactions at the interface between a solid and an electrolyte, aimed at computing the interface charge build-up and surface potential shift of ion-sensitive FETs in the presence of interfering ions. An expression for the rms value of the surface charge fluctuation and the resulting uncertainty in the ion concentration is derived as well. Application to nanoelectronic ISFET-based sensors for ions and proteins is demonstrated.

2019 - A new expression for the gain-noise relation of single-carrier avalanche photodiodes with arbitrary staircase multiplication regions [Articolo su rivista]
Pilotto, A.; Palestri, P.; Selmi, L.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Cautero, G.; Driussi, F.; Menk, R. H.; Nichetti, C.; Steinhartova, T.
abstract

We propose a simple expression to relate the total excess noise factor of a single-carrier multiplication staircase avalanche photodiode (APD) to the excess noise factor and gain given by the individual conduction band discontinuities. The formula is valid when electron impact ionization dominates hole impact ionization; hence, it is especially suited for staircase APDs with In-rich multiplication regions, as opposed, for example, to GaAs/AlGaAs systems where hole ionization plays an important role. The formula has been verified by accurate means of numerical simulations based on a newly developed nonlocal history dependent impact ionization model.

2019 - A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces [Relazione in Atti di Convegno]
Cortiula, A.; Dazzi, M.; Marcon, M.; Menin, D.; Scapol, M.; Bandiziol, A.; Cristofoli, A.; Grollitsch, W.; Nonis, R.; Palestri, P.
abstract

2019 - Automotive-Range Characterization of a 11 Gb/s Transceiver for Automotive Microcontroller Applications with 8-Tap FFE, 1-Tap Unrolled/3-Tap DFE and Offset-Compensated Samplers [Relazione in Atti di Convegno]
D'Ampolo, Dylan; Bandiziol, Andrea; Menin, Davide; Grollitsch, Werner; Nonis, Roberto; Palestri, Pierpaolo
abstract

This paper presents the experimental characterization of a High-Speed Serial Interface (HSSI) for automotive microcontroller applications designed in 28 nm planar CMOS technology, verified over automotive corners and operating up to 11 Gb/s. The impedance of the full-rate voltage-mode transmitter can be tuned by activating several driver replicas. It also features an 8-tap Feed-Forward Equalizer (FFE) with taps programmable in steps of 1/16. The analog front-end of the receiver cascades a Variable-Gain Amplifier (VGA) and a Continuous-Time Linear Equalizer (CTLE), which can be individually tuned. The receiver is based on a half-rate architecture and features a 3-tap Decision-Feedback Equalizer (DFE), one tap being speculative to relax timing constraints; another VGA is embedded in the DFE summing node. The subsequent data and edge samplers are offset-compensated. The circuit is experimentally characterized over automotive corners at 6.25 Gb/s and 11 Gb/s on highly-reflecting PCB channels with up to 14.5 dB loss, demonstrating operations at bit-error ratio (BER) below 10 −12 up to 11 Gb/s. The HSSI occupies an area of 0.08 mm 2 and consumes 8.4 mW/Gb/s at 11 Gb/s and 6.2mW/Gb/s at 6.25 Gb/s.

2019 - Gain and noise in GaAs/AlGaAs avalanche photodiodes with thin multiplication regions [Articolo su rivista]
Nichetti, C.; Steinhartova, T.; Antonelli, M.; Cautero, G.; Menk, R. H.; Pilotto, A.; Driussi, F.; Palestri, P.; Selmi, L.; Arfelli, F.; Biasiol, G.
abstract

valanche photodiodes based on GaAs/AlGaAs with separated absorption and multiplication regions (SAM-APDs) will be discussed in terms of capacitance, response to light (gain and noise) and time response. The structures have been fabricated by molecular beam epitaxy introducing a δ p layer doped with carbon to separate the multiplication and the absorption regions. The thickness of the latter layer defines the detection efficiency and the time resolution of the structure, which in turn allows tailoring the device for specific scientific applications. Within the multiplication region a periodic modulation of the bandgap is obtained by growing alternating nanometric layers of AlGaAs and GaAs with increasing Al content; this staircase structure enables the tuning of the bandgap and subsequently provides a well-defined charge multiplication. The use of such staircase hetero-junctions enhances electron multiplication and conversely reduces—at least in principle—the impact of the noise associated to hole multiplication, which should result in a decreased overall noise, when compared to p-i-n diodes composed by a single material. The first part of this paper focuses on the electrical characteristics of the grown structure and on the comparison with the simulated behaviour of such devices. In addition, gain and noise measurements, which have been carried out on these devices by utilizing photons from visible light to hard X-rays, will be discussed and will be compared to the results of a nonlocal history-dependent model specifically developed for staircase APDs.

2019 - Improved understanding of metal–graphene contacts [Articolo su rivista]
Driussi, F.; Venica, S.; Gahoi, A.; Gambi, A.; Giannozzi, P.; Kataria, S.; Lemme, M. C.; Palestri, P.; Esseni, D.
abstract

Metal–graphene (M–G) contact resistance (RC) is studied through extensive experimental characterization,Monte–Carlo transport simulations and Density Functional Theory (DFT) analysis. We show that the back–gate voltage dependence of RC cannot be explained only in terms of the resistance of the junction at the edge between contact and channel region. Experiments and DFT calculations indicate a consistent picture where both Ni andAu contacts have a M–G distance larger than the minimum energy distance, and where the M–G distance is crucial in determining the RC value.

2019 - Investigation of the behaviour of GaAs/AlGaAs SAM-APDs for synchrotron radiation [Relazione in Atti di Convegno]
Nichetti, Camilla; Steinhartova, Tereza; Antonelli, Matias; Cautero, Giuseppe; Menk, Ralf Hendrik; Pilotto, Alessandro; Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca; Arfelli, Fulvia; Biasiol, Giorgio
abstract

This work reports on the fabrication and characterization of a novel high-speed, low-noise X-ray Avalanche Photodiode based on III-V compound semiconductors operating over an extended photon energy range. These materials were suggested as their higher atomic numbers allow for the absorption of higher photon energies; hence, shorter response times can be achieved by growing APDs with thinner active regions. In addition, the use of staircase hetero-junctions enhances electron multiplication and results in lower noise if compared with conventional p-i-n diodes. In this work, molecular beam epitaxy was used to produce GaAs/AlGaAs APDs with separated absorption and multiplication regions. The multiplication region, separated from the absorption region by a δ p-doped layer of carbon, contains a staircase structure composed of nanometric layers of AlGaAs and GaAs, which alternate periodically. The periodic modulation of the band gap enables a well-defined charge multiplication and results in low multiplication noise. Several devices were characterized in terms of dark current, photocurrents generated utilizing visible and hard X-ray sources as well as noise generated under laser light.

2019 - Modeling 1/f and Lorenzian noise in III-V MOSFETs [Relazione in Atti di Convegno]
Caruso, E.; Bettetti, F.; DEL LINZ, Leonida; Pin, D.; Segatto, M.; Palestri, P.
abstract

2019 - Optimizing the Number of Steps and the Noise in Staircase APDs with Ternary III - V Semiconductor Alloys [Relazione in Atti di Convegno]
Pilotto, A.; Nichetti, C.; Palestri, P.; Selmi, L.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Cautero, G.; Driussi, F.; Esseni, D.; Menk, R. H.; Steinhartova, T.
abstract

2019 - Package Design Methodology for Crosstalk Mitigation between DC/DC Converter and ADC Analog Inputs in Complex SoC [Relazione in Atti di Convegno]
Settino, Francesco; Brandtner, Thomas; Niederl, Josef; Praemassing, Frank; Koffler, Harald; Palestri, Pierpaolo; Crupi, Felice
abstract

2019 - Relationship between capacitance and conductance in MOS capacitors [Relazione in Atti di Convegno]
Caruso, E.; Lin, J.; Monaghan, S.; Cherkaoui, K.; Floyd, L.; Gity, F.; Palestri, P.; Esseni, D.; Selmi, L.; Hurley, P. K.
abstract

In this work, we describe how the frequency dependence of conductance (G) and capacitance (C) of a generic MOS capacitor results in peaks of the functions G/ω and - ωdC/dω. By means of TCAD simulations, we show that G/ω and -ωdC/dω peak at the same value and at the same frequency for every bias point from accumulation to inversion. We illustrate how the properties of the peaks change with the semiconductor doping (ND), oxide capacitance (COX), minority carrier lifetime (τg), interface defect parameters (NIT, σ) and majority carrier dielectric relaxation time (τr). Finally, we demonstrate how these insights on G/ω and -ωdC/dω can be used to extract COX, ND and τg from InGaAs MOSCAP measurements

2019 - Semi-classical modeling of nanoscale nMOSFETs with III-V channel [Relazione in Atti di Convegno]
Palestri, P.; Caruso, E.; Badami, O.; Driussi, F.; Esseni, D.; Selmi, L.
abstract

We review recent results on the modeling of nanoscale nMOSFETs with III-V compounds channel material. The focus will be on semi-classical transport modeling in short channel devices; we will show that back-scattering in the channel still influences the device performance, and thus affects the choice of the channel material. The model ingredients necessary to describe III-V MOSFETs will be discussed, and major differences compared to silicon FETs will be highlighted.

2018 - A Novel Reconfigurable sub-0.25V Digital Logic Family Using the Electron-Hole Bilayer TFET [Articolo su rivista]
Alper, Cem; Padilla, Jose Luis; Palestri, Pierpaolo; Ionescu, Adrian M.
abstract

2018 - An Improved Nonlocal History-Dependent Model for Gain and Noise in Avalanche Photodiodes Based on Energy Balance Equation [Articolo su rivista]
Nichetti, C.; Pilotto, A.; Palestri, P.; Selmi, L.; Antonelli, M.; Arfelli, F.; Biasiol, G.; Cautero, G.; Driussi, F.; Klein, N. Y.; Menk, R. H.; Steinhartova, T.
abstract

We present a non-local history-dependent model for impact ionization gain and noise in avalanche photodiodes (APDs) especially suited for staircase APDs. The model uses a simple energy balance equation to define effective electric fields valid also in the presence of band discontinuities which are then used to express the ionization coefficients. The model parameters have been calibrated against literature data for gain and noise in GaAs and AlxGa1-xAs (x = 0.2, 0.6, 0.8) p-i-n diodes. Application to experimental data for gain and noise in heterojunction and staircase SAM-APDs is reported to demonstrate the ability of the model in describing complex APD structures. It is found that, in spite of conduction band discontinuities being much larger than valence band ones, hole impact ionization contributes a significant degradation of the noise metrics in GaAs/AlGaAs staircase APDs. These non-trivial insights demonstrate the usefulness of the model to steer device design and optimization.

2018 - An Improved Random Path Length Algorithm for p-i-n and Staircase Avalanche Photodiodes [Relazione in Atti di Convegno]
Pilotto, Alessandro; Palestri, Pierpaolo; Selmi, Luca; Antonelli, Matias; Arfelli, Fulvia; Biasiol, Giorgio; Cautero, Giuseppe; Driussi, Francesco; Menk, Ralf H.; Nichetti, Camilla; Steinhartova, Tereza
abstract

We present an improved Random Path Length algorithm to accurately and efficiently estimate the design space of heterostructure avalanche photodiodes (APDs) in terms of gain, noise and bandwidth without any need of full Monte Carlo transport simulations. The underlying nonlocal model for impact ionization goes beyond the Dead Space concept and it is suited to handle staircase structures composed by a superlattice of III-V compounds as well as thick and thin p-i-n APDs. The model parameters have been calibrated on GaAs and AlxGa1−xAs p-i-n APDs in a previous work. In this work GaAs p-i-n APDs are compared to staircase structures in terms of noise and bandwidth.

2018 - Benchmarking of 3-D MOSFET Architectures: Focus on the Impact of Surface Roughness and Self-Heating [Articolo su rivista]
Badami, O.; Lizzit, D.; Driussi, F.; Palestri, P.; Esseni, D.
abstract

Tremendous improvements in the fabrication technology have allowed to scale the physical dimensions of the transistors and also to develop different promising 3-D architectures that may allow continuing Moore’s law. In this paper, we perform a comparative delay analysis of different 3-D device architectures and study the impact of surface roughness and self-heating on the on-current using a comprehensive in-house simulation framework comprising Schrödinger, Poisson, and Boltzmann transport equation solvers and comprising relevant scattering mechanisms and self-heating. Our results highlight that parasitic capacitance can alter the relative ranking of the architectures from delay point of view. We demonstrate that surface roughness can cause architectureand material-dependentcurrent degradation, and hence, it is necessary to account for it in simulation-based benchmarking different architectures.

2018 - Chip/Package/Board Co-Simulation Methodology for Crosstalk between DC/DC Converter and ADC Input Channels [Relazione in Atti di Convegno]
Settino, Francesco; Brandtner, Thomas; Subotskaya, Volha; Levanto, Antonio; Faricelli, Marco; Praemassing, Frank; Ricca, Luca Della; Koffler, Harald; Palestri, Pierpaolo; Crupi, Felice
abstract

2018 - Design and characterization of a 9.2Gbps transceiver for automotive microcontroller applications with 8-taps FFE and 1-tap unrolled/4-taps DFE [Articolo su rivista]
Bandiziol, A.; Grollitsch, W.; Steffan, G.; Nonis, R.; Palestri, P.
abstract

2018 - Design of a half-rate receiver for a 10Gbps automotive serial interface with 1-tap-unrolled 4-taps DFE and custom CDR algorithm [Relazione in Atti di Convegno]
Bandiziol, Andrea; Grollitsch, Werner; Brandonisio, Francesco; Bassi, Matteo; Nonis, Roberto; Palestri, Pierpaolo
abstract

2018 - Digital and analog TFET circuits: Design and benchmark [Articolo su rivista]
Strangio, S.; Settino, F.; Palestri, P.; Lanuzza, M.; Crupi, F.; Essenia, D.; Selmi, L.
abstract

In this work, we investigate by means of simulations the performance of basic digital, analog, and mixed-signal circuits employing tunnel-FETs (TFETs). The analysis reviews and complements our previous papers on these topics. By considering the same devices for all the analysis, we are able to draw consistent conclusions for a wide variety of circuits. A virtual complementary TFET technology consisting of III-V heterojunction nanowires is considered. Technology Computer Aided Design (TCAD) models are calibrated against the results of advanced full-quantum simulation tools and then used to generate look-up-tables suited for circuit simulations. The virtual complementary TFET technology is benchmarked against predictive technology models (PTM) of complementary silicon FinFETs for the 10 nm node over a wide range of supply voltages (VDD) in the sub-threshold voltage domain considering the same footprint between the vertical TFETs and the lateral FinFETs and the same static power. In spite of the asymmetry between p- and n-type transistors, the results show clear advantages of TFET technology over FinFET for VDDlower than 0.4 V. Moreover, we highlight how differences in the I-V characteristics of FinFETs and TFETs suggest to adapt the circuit topologies used to implement basic digital and analog blocks with respect to the most common CMOS solutions.

2018 - General model for multiple surface reactions in ion-sensitive FETs [Abstract in Atti di Convegno]
Mele, LEANDRO JULIAN; Palestri, Pierpaolo; Cossettini, Andrea; Pittino, Federico; Selmi, Luca
abstract

The use of Field Effect Transistors as electrochemical sensor combined with integrated readouts in CMOS technology offers many potential advantages in terms of sensitivity, accuracy, repeatability, miniaturization, costs, parallelism, digitalization and communication. Modelling of the transduction mechanisms is necessary to enable quantitative understanding and prediction of the sensor signals, the selectivity and cross-sensitivities for optimized design. We propose a generalized model for the ISFET response to an arbitrary number of receptor types binding with different ionic species in the electrolyte suitable to assess cross-sensitivities in ISFET sensors. The model is implemented in the ENBIOS-1D platform [1], which solves the equilibrium Poisson- Boltzmann equation in the electrolyte coupled to the electrostatics in the FET channel. The interface charge generated at bare or functionalized surfaces by an arbitrary number of chemical reactions among surface binding sites and electrolyte ions is described by a linear system of equations for each type of receptor, whose unknowns are the fractions of sites binding with a given ion. Our approach generalizes the well-known Site Binding model of reactions between amphoteric sites at metal-oxide surfaces and H+ ions, which is commonly used to explain pH sensitivity in ISFETs [2]. It also includes the modified site binding model reported in [3], which considers specific absorption of ions (see Fig. 1). Competing reactions of multiple sites (bare surface plus ligand functionalization) can be described as well. In fact, the model matches the results in [4], where sensing of the FimH protein is demonstrated (Fig. 2).

2018 - New device concepts, transistor architectures and materials for high performance and energy efficient CMOS circuits in the forthcoming era of 3D integrated circuits [Relazione in Atti di Convegno]
Esseni, D.; Badami, O.; Driussi, F.; Lizzit, D.; Pala, M.; Palestri, P.; Rollo, T.; Selmi, L.; Venica, S.
abstract

This paper addresses selected topics about recent developments in CMOS technologies evolving towards 3D integrated circuits and incorporating innovative device concepts and ever new materials.

2018 - On the Adequacy of the Transmission Line Model to Describe the Graphene-Metal Contact Resistance [Articolo su rivista]
Venica, Stefano; Driussi, Francesco; Gahoi, Amit; Palestri, Pierpaolo; Lemme, Max C.; Selmi, Luca
abstract

The contact-end-resistance (CER) method is applied to transfer length method structures to characterize in-depth the graphene-metal contact and its dependence on the back-gate bias. Parameters describing the graphene-metal stack resistance are extracted through the widely used transmission line model. The results show inconsistencies which highlight application limits of the model underlying the extraction method. These limits are attributed to the additional resistance associated with the p-p+ junction located at the contact edge, that is not part of the conventional transmission line model. Useful guidelines for a correct application of the extraction technique are provided, identifying the bias range in which this additional resistance is negligible. Finally, the CER method and the transmission line model are exploited to characterize the graphene-metal contacts featuring different metals. © 2012 IEEE.

2018 - Physics-based TCAD analysis of Border and Interface traps in Al2O3/InGaAs stacks using Multifrequency CV-curves [Relazione in Atti di Convegno]
Caruso, E.; Lin, J.; Burke, K. F.; Cherkaoui, K.; Esseni, D.; Gity, F.; Monaghan, S.; Palestri, P.; Hurley, P.; Selmi, L.
abstract

In this paper, we analyze the multi-frequency C-V curves of In0.53Ga0.47As MOSCAPs by employing physics-based TCAD simulations including both border and interface traps. The calculations reproduce the experimental inversion and accumulation capacitance, and the general trend of the depletion capacitance. A study of the influence of the quantization model on the extraction of the trap distribution is also carried out.

2018 - Profiling border-traps by TCAD analysis of multifrequency CV-curves in Al2O3/InGaAs stacks [Relazione in Atti di Convegno]
Caruso, E.; Lin, J.; Burke, K. F.; Cherkaoui, K.; Esseni, D.; Gity, F.; Monaghan, S.; Palestri, P.; Hurley, P.; Selmi, L.
abstract

2018 - Reliability analysis of the metal-graphene contact resistance extracted by the transfer length method [Relazione in Atti di Convegno]
Venica, Stefano; Driussi, Francesco; Gahoi, Amit; Kataria, Satender; Palestri, Pierpaolo; Lenirne, Max C.; Selmi, Luca
abstract

The transfer Length Method is a well-estab experimental technique to characterize the contact resista semiconductor devices. However, its dependability is ques for metal-graphene contacts. We investigate in-depth the si cal error of the extracted contact resistance values and we strategies to limit such error and to obtain reliable result method has been successfully applied to samples with dil contact metals.

2018 - Semi-conducting Nanomaterials for Health, Environment and Security Applications [Poster]
Mele, LEANDRO JULIAN; Palestri, Pierpaolo; Cossettini, Andrea; Pittino, Federico; Selmi, Luca
abstract

2018 - Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations [Articolo su rivista]
Luong, G. V.; Strangio, S.; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, P.; Mantl, S.; Zhao, Q. T.
abstract

2018 - Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes [Relazione in Atti di Convegno]
Dazzi, Martino; Palestri, Pierpaolo; Rossi, Davide; Bandiziol, Andrea; Loi, Igor; Bellasi, David; Benini, Luca
abstract

2017 - A review of selected topics in physics based modeling for tunnel field-effect transistors [Articolo su rivista]
Esseni, David; Pala, Marco; Palestri, Pierpaolo; Alper, Cem; Rollo, Tommaso
abstract

The research field on tunnel-FETs (TFETs) has been rapidly developing in the last ten years, driven by the quest for a new electronic switch operating at a supply voltage well below 1 V and thus delivering substantial improvements in the energy efficiency of integrated circuits. This paper reviews several aspects related to physics based modeling in TFETs, and shows how the description of these transistors implies a remarkable innovation and poses new challenges compared to conventional MOSFETs. A hierarchy of numerical models exist for TFETs covering a wide range of predictive capabilities and computational complexities. We start by reviewing seminal contributions on direct and indirect band-to-band tunneling (BTBT) modeling in semiconductors, from which most TCAD models have been actually derived. Then we move to the features and limitations of TCAD models themselves and to the discussion of what we define non-self-consistent quantum models, where BTBT is computed with rigorous quantum-mechanical models starting from frozen potential profiles and closed-boundary Schrödinger equation problems. We will then address models that solve the open-boundary Schrödinger equation problem, based either on the non-equilibrium Green's function NEGF or on the quantum-transmitting-boundary formalism, and show how the computational burden of these models may vary in a wide range depending on the Hamiltonian employed in the calculations. A specific section is devoted to TFETs based on 2D crystals and van der Waals hetero-structures. The main goal of this paper is to provide the reader with an introduction to the most important physics based models for TFETs, and with a possible guidance to the wide and rapidly developing literature in this exciting research field.

2017 - A scaled replacement metal gate InGaAs-on-Insulator n-FinFET on Si with record performance [Relazione in Atti di Convegno]
Hahn, H.; Deshpande, V.; Caruso, E.; Sant, S.; O'Connor, E.; Baumgartner, Y.; Sousa, M.; Caimi, D.; Olziersky, A.; Palestri, P.; Selmi, L.; Schenk, A.; Czornomaz, L.
abstract

2017 - A virtual III-V Tunnel FET technology platform for ultra-low voltage comparators and level shifters [Relazione in Atti di Convegno]
Settino, F.; Lanuzza, M.; Strangio, S.; Crupi, F.; Palestri, Pierpaolo; Esseni, David
abstract

In this paper, a III-V nanowire TFET technology platform is compared against the predictive technology models of FinFETs at 10 nm node by evaluating the performance of two different comparator topologies. Furthermore, the potential of a hybrid FinFET/TFET approach in multi supply voltage design is addressed by considering level shifter circuits. Both analyses confirm that III-V TFET represents a promising technology option for future integrated circuits with sub-0.4 V operation.

2017 - Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits [Articolo su rivista]
Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, M.; Esseni, David; Crupi, F.; Selmi, Luca
abstract

In this work, a benchmark for low-power digital applications of a III-V TFET technology platform against a conventional CMOS FinFET technology node is proposed. The analysis focuses on full-adder circuits, which are commonly identified as representative of the digital logic environment. 28T and 24T topologies, implemented in complementary-logic and transmission-gate logic, respectively, are investigated. Transient simulations are performed with a purpose-built test-bench on each single-bit full adder solution. The extracted delays and energy characteristics are post-processed and translated into figures-of-merit for multi-bit ripple-carry-adders. Trends related to the different full-adder implementations (for the same device technology platform) and to the different technology platforms (for the same full-adder topology) are presented and discussed.

2017 - Detailed characterization and critical discussion of series resistance in graphene-metal contacts [Relazione in Atti di Convegno]
Venica, Stefano; Driussi, Francesco; Gahoi, Amit; Passi, Vikram; Palestri, Pierpaolo; Lemme, Max C.; Selmi, Luca
abstract

We apply the contact–end resistance method to TLM structures in order to characterize the graphene–metal contact resistance. A critical analysis of the experimental results shows that the commonly used transmission line model fails to accurately describe the graphene–metal contact under specific biasing conditions. The experiments suggest the presence of an additional resistance contribution associated to the p–p+ junction induced in the graphene in the proximity of the contact. This voltage dependent resistance limits the range of applicability of the extraction technique. However, for carefully chosen bias conditions that reduce this additional resistance to small values, the technique provides reliable results, useful to investigate the graphene–metal contact properties and their technology dependence.

2017 - Experimental characterization of the Static Noise Margins of strained Silicon complementary Tunnel-FET SRAM [Relazione in Atti di Convegno]
Luong, G. V.; Strangio, Sebastiano; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, Pierpaolo; Mantl, S.; Zhao, Q. T.
abstract

Half SRAM cells with strained Si nanowire complementary Tunnel-FETs (CTFET) have been fabricated to explore the capability of TFETs for 6T-SRAM. Static measurements on cells with outward faced n-TFET access transistors have been performed to determine the SRAM butterfly curves, allowing the assessment of cell functionality and stability. The forward p-i-n leakage at certain bias configuration of the access transistor may lead to malfunctioning storage operation, even without the contribution of the ambipolar behavior. Lowering the bit-line bias is found to mitigate such effect resulting in functional hold, read and write operation.

2017 - Graphene base transistors with bilayer tunnel barriers: Performance evaluation and design guidelines [Articolo su rivista]
Venica, Stefano; Driussi, Francesco; Vaziri, Sam; Palestri, Pierpaolo; Selmi, Luca
abstract

Graphene-based capacitors and Graphene base transistors (GBTs) featuring innovative engineered tunnel barriers are characterized in DC and the data are thoroughly analyzed by means of an electrical model and a Monte Carlo transport simulator. Following model calibration on experiments, we then propose strategies to improve the DC common-base current gain and the cutoff frequency of GBTs. The DC and RF performance of optimized GBT structures based on realistic technology data are analyzed in detail to highlight advantages and potential limits of this device concept.

2017 - Influence of δ p-doping on the behaviour of GaAs/AlGaAs SAM-APDs for synchrotron radiation [Articolo su rivista]
Steinhartova, T.; Nichetti, C.; Antonelli, M.; Cautero, G.; Menk, R. H.; Pilotto, A.; Driussi, F.; Palestri, P.; Selmi, L.; Koshmak, K.; Nannarone, S.; Arfelli, F.; Zilio, S. Dal; Biasiol, G.
abstract

Thiswork focuses on the development and the characterization of avalanche photodiodes with separated absorption and multiplication regions grown by molecular beam epitaxy. The i-GaAs absorption region is separated from the multiplication region by a δ p-doped layer of carbon atoms, which ensures that after applying a reverse bias, the vast majority of the potential drops in the multiplication region. Therein, thin layers of AlGaAs and GaAs alternate periodically in a socalled staircase structure to create a periodic modulation of the band gap, which under bias enables a well-defined charge multiplication and results in a low multiplication noise. The influence of the concentration of carbon atoms in the δ p-doped layer on the device characteristics was investigated and experimental data are presented together with simulation results.

2017 - Modeling charge collection in x-ray imagers [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Pinaroli, Giovanni; Pilotto, Alessandro; Selmi, Luca
abstract

2017 - Modelling nanoscale n-MOSFETs with III-V compound semiconductor channels: From advanced models for band structures, electrostatics and transport to TCAD [Relazione in Atti di Convegno]
Caruso, E.; Carapezzi, S.; Visciarelli, M.; Gnani, E.; Zagni, N.; Pavan, P.; Palestri, P.; Esseni, D.; Gnudi, A.; Reggiani, S.; Puglisi, F. M.; Verzellesi, G.; Selmi, L
abstract

We review a few state of the art solutions and recent developments to model short channel III-V compound semiconductor n-MOSFETs based on full quantum transport, semiclassical multi-valley / multi-subband transport and TCAD models. The pros and cons of each, and the insights they can deliver, are illustrated with examples from recent technology developments and literature. Areas where improvements and implementations at TCAD level are most necessary are highlighted as well.

2017 - On the electron velocity-field relation in ultra-thin films of III–V compound semiconductors for advanced CMOS technology nodes [Relazione in Atti di Convegno]
Caruso, Enrico; Pin, Alessandro; Palestri, Pierpaolo; Selmi, Luca
abstract

We report Multi-Valley-Multi-Subband Monte Carlo simulations of the velocity-field curves in bulk and thin film InAs, GaAs and In0.53Ga0.47As. Our model suggests that surface roughness scattering reduces the saturation velocity of nanometer- scale films significantly below the corresponding Silicon value. The injection velocity, instead, remains larger than for Silicon down to small film thickness. The results provide a useful reference for the calibration of TCAD compact models for thin films of InxGa(1-x) As compound semiconductors of interest for future CMOS technology nodes.

2017 - Performance Projection of III-V Ultra-Thin-Body, FinFET, and Nanowire MOSFETs for two Next-Generation Technology Nodes [Relazione in Atti di Convegno]
Rau, M.; Caruso, Enrico; Lizzit, D.; Palestri, Pierpaolo; Esseni, David; Schenk, A.; Selmi, Luca; Luisier, M.
abstract

Using state-of-the-art simulation tools ranging from semi-classical Monte-Carlo to full-quantum atomistic approaches, the competitiveness of III-V compounds for next-generation high-performance logic switches is confirmed. A planar double-gate ultra-thinbody (DG-UTB), a triple-gate FinFET, and a gate-allaround nanowire (NW) transistor have been designed according to the ITRS specifications for two technology nodes with physical gate lengths of LG=15 nm and 10.4nm. A thorough performance comparison of digital and analog figures of merit at these nodes reveals that for LG=15 nm, the performance of planar and 3-D architectures is comparable. At LG=10.4 nm, the III-V NW promises the highest performance, especially when lowering the supply voltage from 0.59 V to 0.50 V. It also significantly outperforms its strained silicon counterpart. Finally, the effects of series resistance combined with interface traps, surface roughness, alloy scattering, and electron-phonon interactions have been found to deteriorate the III-V ballistic ON-current by 50-60%.

2017 - Performance comparison for FinFETs, nanowire and stacked nanowires FETs: Focus on the influence of surface roughness and thermal effects [Relazione in Atti di Convegno]
Badami, O.; Driussi, F.; Palestri, P.; Selmi, L.; Esseni, D.
abstract

We perform a comprehensive comparison of FinFETs, stacked nanowires (stacked NWs), circular and square gate-all-around (GAA) -FETs with same footprint, by using an in-house deterministic BTE solver accounting for quantum confinement, a wide set of scattering mechanisms and self-heating. We show that an increase in surface roughness (SR) can frustrate the improvement in on current, I, that for high-quality interfaces we observe in stacked NWs compared to FinFETs. Simulations suggest that SR also influences whether or not In0.53Ga0.47As can provide better I than strained silicon (sSi).

2017 - Simulation Study of the Graphene Base Transistor [Relazione in Atti di Convegno]
Venica, Stefano; Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca
abstract

The Graphene Base Transistor (GBT) has been recently proposed to possibly overcome the THz limit for RF circuits. We developed a modelling framework to explore the GBT design space, the device optimization and the prediction of its RF performance. Via a proper scaling of the EBI and BCI thicknesses, the THz operation is achievable both in terms of fT and fmax. In this latter case, a very low RCONT value is required, thus it is necessary to improve the metal-graphene interface beyond state of the art graphene technology.

2017 - Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs [Relazione in Atti di Convegno]
Settino, F.; Strangio, S.; Lanuzza, M.; Crupi, F.; Palestri, P.; Esseni, D.
abstract

NTRODUCTION ― In the past decade the Tunnel Field Effect Transistor (TFET) relying on band-to-band tunneling (BTBT) has emerged as one of the most promising small slope FETs able to achieve a subthreshold swing (SS) below the room temperature 60 mV/dec limit of conventional MOSFET [1]. Many simulation studies attributed to TFETs the potential to outperform conventional MOSFETs in the ultra-low voltage domain (VDD < 0.4 V) in both analog [2-3] and digital [4-7] applications. However, only basic digital and analog circuits have been fabricated up to date, such as current mirrors [8] and inverter gates [9]. As for semiconductor materials, III-V hetero-structure TFETs may be able to achieve a sub-thermal SS in a wide current range and, at the same time, very competitive on currents [1], as demonstrated by a recently fabricated vertical InAs/GaAsSb/GaSb nanowire n-type TFETs [10]. The aim of this work is to benchmark a complementary III-V TFET technology platform against the mainstream FinFET reference, by considering basic building blocks of digital and analog applications. To this purpose, we selected a complementary III-V TFET technology platform designed and optimized using full quantum simulations in [11], where n- and p-type TFET pairs are realized in the same InAs/AlGaSb material system. The use of such devices allowed us to remove the excessively optimistic assumption of perfectly symmetric n- and p-type TFETs, very frequently embraced in previous simulation studies (e.g. in [2, 7]). We present circuit-level simulations performed on current mirrors and inverter-based logic blocks, which are identified as basic topologies representative of the analog and digital design realms, respectively. Similar benchmarking results for the same technology platforms have been obtained by focusing the comparison on more complicated circuit blocks [3], [5] and [6].

2017 - System and transistor level analysis of an 8-taps FFE 10Gbps serial link transmitter with realistic channels and supply parasitics [Relazione in Atti di Convegno]
Bandiziol, Andrea; W., Grollitsch; F., Brandonisio; R., Nonis; Palestri, Pierpaolo
abstract

Circuit/system level simulations are employed to assess the performance of a 10 Gbps transmitter for a high speed serial interface to be used in automotive Electronic Control Units. The transmitter has been designed in a standard 28 nm technology and features feed-forward equalization (FFE) with 8 taps (1 pre- and 6 post-cursors), whose strength is programmable with 16 discretization steps. It is shown that the parasitic inductance on the supply terminals degrades the performance in terms of jitter and SNR and tends to hamper the benefits of FFE. When the value of these inductances is minimized, system-level models of the transmitter reproduce quite well time-consuming transistor-level simulations.

2017 - TCAD Mobility Model of III-V Short-Channel Double-Gate FETs Including Ballistic Corrections [Articolo su rivista]
Carapezzi, Stefania; Caruso, Enrico; Gnudi, Antonio; Palestri, Pierpaolo; Reggiani, Susanna; Gnani, Elena
abstract

2017 - Understanding the Potential and Limitations of Tunnel FETs for Low-Voltage Analog/Mixed-Signal Circuits [Articolo su rivista]
Settino, Francesco; Lanuzza, Marco; Strangio, Sebastiano; Crupi, Felice; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

In this paper, the analog/mixed-signal performance is evaluated at device and circuit levels for a III-V nanowire tunnel field effect transistor (TFET) technology platform and compared against the predictive model for FinFETs at the 10-nm technology node. The advantages and limits of TFETs over their FinFET counterparts are discussed in detail, considering the main analog figures of merits, as well as the implementation of low-voltage track and-hold (T/H) and comparator circuits. It is found that the higher output resistance offered by TFET-based designs allows achieving significantly higher intrinsic voltage gain and higher maximum-oscillation frequency at low current levels. TFET-based T/H circuits have better accuracy and better hold performance by using the dummy switch solution for the mitigation of the charge injection. Among the comparator circuits, the TFET-based conventional dynamic architecture exhibits the best performance while keeping lower area occupation with respect to the more complex double-tail circuits. Moreover, it outperforms all the FinFET counterparts over a wide range of supply voltage when considering low values of the common-mode voltage.

2016 - An Improved Surface Roughness Scattering Model for Bulk, Thin-Body, and Quantum-Well MOSFETs [Articolo su rivista]
Badami, Oves Mohamed Hussein; Caruso, Enrico; Lizzit, Daniel; Osgnach, Patrik; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper reports about the implementation in a multisubband Monte Carlo device simulator of a comprehensive surface roughness scattering model, based on a nonlinear relation between the scattering matrix elements and the fluctuations Δ r) of the interface position. The model is first extended by including carrier screening effects and accounting for scattering at multiple interfaces, and it is then used for the analysis of relevant experimental data sets. We show that the new model can reproduce fairly well the silicon universal mobility curves as well as mobility data for ultrathin-body InGaAs MOSFETs using Δrms values consistent with atomic force microscopy (AFM) and TEM measurements. Our simulation results and some experimental data also indicate that mobility in InGaAs MOSFETs is reduced with decreasing well thickness, T W, with a weaker dependence compared with the TW 6 behavior observed in Si devices. © 1963-2012 IEEE.

2016 - Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits [Articolo su rivista]
Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, Marco; Crupi, Felice; Esseni, David; Selmi, Luca
abstract

In this work, a complementary InAs/Al0.05Ga0.95Sb tunnel field-effect-transistor (TFET) virtual technology platform is benchmarked against the projection to the CMOS FinFET 10-nm node, by means of device and basic circuit simulations. The comparison is performed in the ultralow voltage regime (below 500 mV), where the proposed III–V TFETs feature ON-current levels comparable to scaled FinFETs, for the same low-operating-power OFF-current. Due to the asymmetrical n- and p-type I–Vs, trends of noise margins and performances are investigated for different Wp/Wn ratios. Implications of the device threshold voltage variability, which turned out to be dramatic for steep slope TFETs, are also addressed.

2016 - Benchmarks of a III-V TFET technology platform against the 10-nm CMOS technology node considering 28T Full-Adders [Relazione in Atti di Convegno]
Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, M.; Esseni, David; Crupi, F.; Selmi, Luca
abstract

This paper presents a benchmark of a virtual III-V TFET nanowire technology platform against the predictive models of CMOS FinFETs for the 10-nm technology node. The standard 28T full adder and the 32-bits ripple carry adder are used as vehicle circuit/architecture for the comparison, respectively. Figures-ofmerit including delays, energy and energy-delay plots are discussed

2016 - Comprehensive comparison and experimental validation of band-structure calculation methods in III–V semiconductor quantum wells [Articolo su rivista]
Zerveas, George; Caruso, Enrico; Baccarani, Giorgio; Czornomaz, Lukas; Daix, Nicolas; Esseni, David; Gnani, Elena; Gnudi, Antonio; Grassi, Roberto; Luisier, Mathieu; Markussen, Troels; Osgnach, Patrik; Palestri, Pierpaolo; Schenk, Andreas; Selmi, Luca; Sousa, Marilyne; Stokbro, Kurt; Visciarelli, Michele
abstract

We present and thoroughly compare band-structures computed with density functional theory, tight-binding, k p and non-parabolic effective mass models. Parameter sets for the non-parabolic C, the L and X valleys and intervalley bandgaps are extracted for bulk InAs, GaAs and InGaAs. We then consider quantum-wells with thickness ranging from 3 nm to 10 nm and the bandgap dependence on film thickness is compared with experiments for In0:53Ga0:47As quantum-wells. The impact of the band-structure on the drain current of nanoscale MOSFETs is simulated with ballistic transport models, the results provide a rigorous assessment of III–V semiconductor band structure calculation methods and calibrated band parameters for device simulations.

2016 - Design of a transmitter for high-speed serial interfaces in automotive micro-controller [Relazione in Atti di Convegno]
Bandiziol, A.; Grollitsch, W.; Brandonisio, F.; Nonis, R.; Palestri, Pierpaolo
abstract

This work reports about the system level design of a transmitter for the next generation of High-Speed Serial Interfaces (HSSI) to be implemented in a micro-controller for automotive Electronic Control Unit (ECU) applications, pushing the transmission speed up to 10 Gbps over a 10cm long cable. A voltage mode architecture is selected for low power considerations. We focus our analysis here on the system-level implementation of Feed-Forward Equalization as an FIR filter consisting of different transmitter slices driven by different bits in the data sequence. We consider different data rates and number of taps and analyze how the performance of the equalizer is affected by thequantization of the values of the taps in the practical implementation of the FIR filter.

2016 - Early assessment of tunnel-FET for energy-efficient logic circuits [Relazione in Atti di Convegno]
Crupi, Felice; Strangio, Sebastiano; Palestri, Pierpaolo; Lanuzza, Marco; Esseni, David
abstract

2016 - Impact of Device Geometry of the Fin Electron-Hole Bilayer Tunnel FET [Relazione in Atti di Convegno]
Alper, C.; Padilla, J. L.; Palestri, Pierpaolo; Ionescu, A. M.
abstract

We study the impact of quantum mechanical effects on the fin Electron-Hole Bilayer Tunnel FET (EHBTFET) considering different geometries. Through quantum simulations based on the effective mass approximation (EMA), it is found that the fin EHBTFET is affected by the corner effects at the substrate-fin interface, due to reduced electrostatic control that causes a dramatic reduction of the ON current. Three different solutions; corner smoothing, corner doping and trapezoidal fins; are proposed and their efficiency are assessed. The corner smoothing turns out to be ineffective whereas trapezoidal fins entail a device performance trade-off. Utilizing corner doping is the most viable choice to achieve a large ON current.

2016 - Modeling electrostatic doping and series resistance in graphene-FETs [Relazione in Atti di Convegno]
Venica, Stefano; Zanato, Massimiliano; Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca
abstract

We model the source/drain series resistance and the electrostatic doping effects associated to the source and drain metals in graphene FETs using a Monte Carlo transport simulator. We compare the new model to simulations assuming chemical doping in the source/drain regions. A procedure to include the series resistance as part of the self–consistent Monte Carlo loop is proposed and verified against the widely employed method based on look–up tables.

2016 - Multi-Wire Tri-Gate Silicon Nanowires Reaching Milli-pH Unit Resolution in One Micron Square Footprint [Articolo su rivista]
Accastelli, Enrico; Scarbolo, Paolo; Ernst, Thomas; Palestri, Pierpaolo; Selmi, Luca; Guiducci, Carlotta
abstract

The signal-to-noise ratio of planar ISFET pH sensors deteriorates when reducing the area occupied by the device, thus hampering the scalability of on-chip analytical systems which detect the DNA polymerase through pH measurements. Top-down nano-sized tri-gate transistors, such as silicon nanowires, are designed for high performance solid-state circuits thanks to their superior properties of voltage-to-current transduction, which can be advantageously exploited for pH sensing. A systematic study is carried out on rectangular-shaped nanowires developed in a complementary metal-oxide-semiconductor (CMOS)-compatible technology, showing that reducing the width of the devices below a few hundreds of nanometers leads to higher charge sensitivity. Moreover, devices composed of several wires in parallel further increase the exposed surface per unit footprint area, thus maximizing the signal-to-noise ratio. This technology allows a sub milli-pH unit resolution with a sensor footprint of about 1 µm2, exceeding the performance of previously reported studies on silicon nanowires by two orders of magnitude.

2016 - Performance Study of Strained III-V Materials for Ultra-Thin Body Transistor Applications [Relazione in Atti di Convegno]
Rau, Martin; Markussen, Troels; Caruso, Enrico; Esseni, David; Gnani, Elena; Gnudi, Antonio; Khomyakov, Petr A.; Luisier, Mathieu; Osgnach, Patrik; Palestri, Pierpaolo; Reggiani, Susanna; Schenk, Andreas; Selmi, Luca; Stokbro, Kurt
abstract

A comprehensive description of band gap and effective masses of III-V semiconductor bulk and ultra-thin body (UTB) structures under realistic biaxial and uniaxial strain is given using numerical simulations from four different electronic structure codes. The consistency between the different tools is discussed in depth. The nearest neighbor sp3d5s* empirical tightbinding model is found to reproduce most trends obtained by ab initio Density Functional Theory calculations at much lower computational cost. This model is then used to investigate the impact of strain on the ON-state performance of realistic In0.53Ga0.47As UTB MOSFETs coupled with an efficient method based on the well-known top-of-the-barrier model. While the relative variation of effective masses between unstrained and strained cases seems promising at first, the calculations predict no more than 2% performance improvement on drive currents from any of the studied strain configurations.

2016 - Quasi-Ballistic Gamma - and L-Valleys Transport in Ultrathin Body Strained (111) GaAs nMOSFETs [Articolo su rivista]
Caruso, Enrico; Palestri, Pierpaolo; Lizzit, Daniel; Osgnach, Patrik; Esseni, David; Selmi, Luca
abstract

We carefully scrutinize the potential of ultrathin body strained (111) GaAs MOSFETs to achieve better performance than other GaAs-based channel FETs at scaled channel length and with relaxed thickness requirements, thanks to L-valleys enhanced density-of-states (DoS) and carrier transport. Calibrated multi-subband Monte Carlo simulations including scattering provide the modeling framework necessary for accurate simulations. The results show that L-valley-enhanced transport most likely will not yield the ION and switching time improvements observed in simple ballistic simulations, even if considering the ideal material properties and purely phonon scattering limited transport. In fact, the increased DoS and inversion charge at the virtual source provided by the L-valleys in the strained material is counterbalanced by an increased phonon scattering rate and reduced carrier velocity.

2016 - Selected papers from the EUROSOI-ULIS conference [Articolo su rivista]
Gnani, Elena; Palestri, Pierpaolo
abstract

2016 - The Electron–Hole Bilayer TFET: Dimensionality Effects and Optimization [Articolo su rivista]
Alper, Cem; Palestri, Pierpaolo; Padilla, Jose Luis; Ionescu, Adrian M.
abstract

An extensive parameter analysis is performed on the electron-hole bilayer tunnel field-effect transistor (EHBTFET) using a 1-D effective mass Schrödinger-Poisson solver with corrections for band non-parabolicity considering thin InAs, In0.53Ga0.47As, Ge, Si0.5Ge0.5, and Si films. It is found that depending on the channel material and channel thickness, the EHBTFET can operate either as a 2-D-2-D or 3-D-3-D tunneling device. InAs offers the highest I ON, whereas for the Si and Si0.5Ge0.5 EHBTFETs, significant current levels cannot be achieved within a reasonable voltage range. The general trends are explained through an analytical model that shows close agreement with the numerical results.

2016 - Underlap counterdoping as an efficient means to suppress lateral leakage in the electron–hole bilayer tunnel FET [Articolo su rivista]
Alper, C.; Palestri, Pierpaolo; Padilla, J. L.; Ionescu, A. M.
abstract

The electron–hole bilayer tunnel (EHBTFET)has been proposed as a density of states (DOS) switch capable of achieving a subthreshold slope lower than 60mV/decade at room temperature; however, one of the main challenges is the control of the lateral band-to-band tunneling (BTBT) leakage in the OFF state. In this work, we show that by using oppositely doped underlap regions; the unwanted penetration of the wavefunction into the underlap region at low gate biases is prevented; thereby drastically reducing the lateral BTBT leakage without any penalty on the ON current. The method is verified using a full-quantum 2D Schrödinger–Poisson solver under the effective mass approximation. For a channel thickness of 10 nm, an In0.53Ga0.47As EHBTFET with counterdoping can exhibit an ON-current up to 20 mA mm and an average subthreshold swing (SS) of about 30 mV/dec. Compared to previous lateral leakage suppression solutions, the proposed method can be fabricated using template-assisted selective epitaxy.

2015 - A TCAD-Based Methodology to Model the Site-Binding Charge at ISFET/Electrolyte Interfaces [Articolo su rivista]
Bandiziol, Andrea; Palestri, Pierpaolo; Pittino, Federico; Esseni, David; Selmi, Luca
abstract

We propose a new approach to describe in commercial TCAD the chemical reactions that occur at dielectric/electrolyte interface and make the ion sensitive FET (ISFET) sensitive to pH. The accuracy of the proposed method is successfully verified against the available experimental data. We demonstrate the usefulness of the method by performing, for the first time in a commercial TCAD environment, a full 2-D analysis of ISFET operation, and a comparison between threshold voltage and drain current differential sensitivities in the linear and saturation regimes. The method paves the way to accurate and efficient ISFET modeling with standard TCAD tools.

2015 - Backscattering and common-base current gain of the Graphene Base Transistor (GBT) [Articolo su rivista]
Venica, Stefano; Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca
abstract

In this paper, we investigate electron transport and electron scattering in the insulators of the Graphene Base Transistor (GBT) by means of a Monte Carlo transport model. We focus on electron backscattering in the base-collector insulator as the possible root cause of the large experimental base current and small measured common-base current gain (αF) of GBTs. Different GBT structures have been simulated and the impact of the scattering parameters on the base current is analyzed. Simulated backscattering-limited αF values are found to be much higher than available experimental data, suggesting that state-of-the-art technology is still far from being optimized. However, those simulated αF values can be low enough to limit the maximum achievable GBT performance.

2015 - Backscattering and common-base current gain of the Graphene Base Transistor (GBT) [Abstract in Atti di Convegno]
Venica, Stefano; Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca
abstract

In this paper, we investigate electron transport and backscattering in the EBI and BCI as possible root causes of the base current and of the common-base current gain degradation in GBTs by means of a Monte Carlo (MC) transport model. Backscattering limited αF values are found to be much higher than experiments in [1, 2], suggesting that state-of-the art technology is still far from being optimized, but they are low enough to limit the maximum achievable performance.

2015 - Design and implementation of switched coil LC-VCOs in the GHz range using the self-inductance technique [Articolo su rivista]
Cernoia, Federico; Ponton, Davide; Palestri, Pierpaolo; Thurner, Peter; Dalt, Nicola Da; Cecco, Giulio; Selmi, Luca
abstract

This paper presents the design and implementation of dual-band LC-VCOs in the GHz-range featuring a switched coil LC-tank. The proposed design exploits the self-inductance technique. The design of the coil starts from simple considerations and back-of-the-envelope calculations, then electromagnetic simulations are used to optimize the coil layout. The sizing of the switch and its impact on the VCO performance are addressed as well. The VCOs have been implemented in 65 nm CMOS technology. Good correlation between simulated and measured tuning range and phase noise is obtained for all designs, thus confirming the validity and robustness of the design methodology and coil models.

2015 - Design, characterization and signal integrity analysis of a 2.5 Gb/s high-speed serial interface for automotive applications overarching the chip/PCB wall [Relazione in Atti di Convegno]
Cossettini, Andrea; Cristofoli, A.; Grollitsch, W.; Alves, L.; Nonis, R.; Ricca, L. Della; Palestri, Pierpaolo; Selmi, Luca
abstract

A 2.5 Gb/s high-speed serial transmitter for automotive applications has been designed and a circuit/package/board integrated simulation procedure has been set up, enabling the co-design of High-Speed-Serial Interfaces. This simulation methodology employs transistor level models of the transmitter combined with physical-based models of the transmission channel, thus no simplified behavioral models are needed. Model/hardware correlation is reported, including eye closure and jitter effects. Good mutual agreement is found between experiments and simulations.

2015 - Efficient Quantum Mechanical Simulation of Band-to-band Tunneling [Relazione in Atti di Convegno]
Cem, Alper; Palestri, Pierpaolo; Jose L., Padilla; Antonio, Gnudi; Roberto, Grassi; Elena, Gnani; Mathieu, Luisier; Adrian M., Ionescu
abstract

In this work, we extend an already existing simulator for tunnel FETs to fully take into account nonparabolicity (NP) of the conduction band in all aspects, namely the wavefunction (WF) and density of states (DOS) corrections for both charge and BTBT current calculation. Comparison against more advanced full-quantum simulators based on TB and k · p Hamiltonians is presented as well and indicates very good matching between models for simple tunnel diodes. An initial parameter study of the Electron Hole Bilayer TFET (EHBTFET) indicates the presence of an optimum channel thickness, determined by the interplay between the subband alignment voltage and ON current level.

2015 - Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells [Articolo su rivista]
Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Crupi, F.; Richter, S.; Zhao, Q.; Mantl, S.
abstract

We use mixed device-circuit simulations to predict the performance of 6T static RAM (SRAM) cells implemented with tunnel-FETs (TFETs). Idealized template devices are used to assess the impact of device unidirectionality, which is inherent to TFETs and identify the most promising configuration for the access transistors. The same template devices are used to investigate the VDD range, where TFETs may be advantageous compared to conventional CMOS. The impact of device ambipolarity on SRAM operation is also analyzed. Realistic device templates extracted from experimental data of fabricated state-of-the-art silicon pTFET are then used to estimate the performance gap between the simulation of idealized TFETs and the best experimental implementations.

2015 - Improved surface roughness modeling and mobility projections in thin film MOSFETs [Relazione in Atti di Convegno]
Badami, Oves Mohamed Hussein; Caruso, Enrico; Lizzit, Daniel; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

We report mobility simulations for long channel Si and InGaAs MOSFETs as a function of the semiconductor film thickness and inversion charge. Calculations account for numerous relevant scattering mechanisms and surface roughness is described by the recently developed non-linear model [1]. Reasonable agreement with available experiments is obtained employing the measured surface roughness r.m.s. value. The results reveal that the film thickness dependence of mobility in III-V MOSFETs is weaker than predicted by the T6w law typically observed in silicon devices.

2015 - Investigation of Hot Carrier Stress and Constant Voltage Stress in High-κ Si-Based TFETs [Articolo su rivista]
Ding, L.; Gnani, E.; Gerardin, S.; Bagatin, M.; Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca; Royer, C. Le; Paccagnella, A.
abstract

This paper reports the experimental investigation of hot carrier stress (HCS) and constant voltage stress (CVS) in high-κ Si-based tunnel FETs. For the devices in this paper, due to the large injection of cold carriers and to the presence of traps in the gate dielectric, the degradation of the transfer characteristics under CVS is much more severe than under HCS. The experimental results show that the sub-threshold swing remains stable under both HCS and CVS conditions, and it is not influenced by the stress-induced increase of the interface trap density.

2015 - Low-voltage high-performance III-V semiconductor MOSFETs for advanced CMOS nodes: impact of strain and interface traps [Relazione in Atti di Convegno]
Osgnach, Patrik; Caruso, Enrico; Lizzit, Daniel; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

2015 - Mixed Tunnel-FET/MOSFET Level Shifters: A New Proposal to Extend the Tunnel-FET Application Domain [Articolo su rivista]
Lanuzza, Marco; Strangio, Sebastiano; Crupi, Felice; Palestri, Pierpaolo; Esseni, David
abstract

In this paper, we identify the level shifter (LS) for voltage up-conversion from the ultralow-voltage regime as a key application domain of tunnel FETs (TFETs).We propose a mixed TFET–MOSFET LS design methodology, which exploits the complementary characteristics of TFET and MOSFET devices. Simulation results show that the hybrid LS exhibits superior dynamic performance at the same static power consumption compared with the conventional MOSFET and pure TFET solutions. The advantage of the mixed design with respect to the conventional MOSFET approach is emphasized when lower voltage signals have to be up-converted, reaching an improvement of the energy-delay product up to three decades. When compared with the full MOSFET design, the mixed TFET–MOSFET solution appears to be less sensitive toward threshold voltage variations in terms of dynamic figures of merit, at the expense of higher leakage variability. Similar results are obtained for four different LS topologies, thus indicating that the hybrid TFET–MOSFET approach offers intrinsic advantages in the design of LS for voltage up-conversion from the ultralow-voltage regime compared with the conventional MOSFET and pure TFET solutions.

2015 - Mixed device-circuit simulations of 6T/8T SRAM cells employing tunnel-FETs [Relazione in Atti di Convegno]
Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Crupi, F.
abstract

2015 - Modeling approaches for band-structure calculation in III-V FET quantum wells [Relazione in Atti di Convegno]
Caruso, Enrico; Zerveas, G.; Baccarani, G.; Czornomaz, L.; Daix, N.; Esseni, David; Gnani, E.; Gnudi, A.; Grassi, R.; Luisier, M.; Markussen, T.; Palestri, Pierpaolo; Schenk, A.; Selmi, Luca; Sousa, M.; Stokbro, K.; Visciarelli, M.
abstract

We compare band-structure calculations obtained with modeling approaches hierarchically spanning from density functional theory to tight-binding, k⋅p and non-parabolic effective mass descriptions. We consider III-V quantum-wells with thickness ranging from 3nm to 10nm. Comparison with experiments for unstrained and strained InGaAs quantum-wells is also reported.

2015 - Modeling the Imaginary Branch in III-V Tunneling Devices: Effective Mass vs k · p [Relazione in Atti di Convegno]
Alper, Cem; Visciarelli, Michele; Palestri, Pierpaolo; Padilla, Jose L.; Gnudi, Antonio; Gnani, Elena; Ionescu, Adrian M.
abstract

In this work we extend an effective mass model for computing the drain current of tunnel-FETs to account for the anti-crossing of the light- and heavy-hole branches of the valence band. The model is validated by comparison with NEGF simulations based on a k · p Hamiltonian. Application of the new model to the electron-hole bilayer TFET is provided showing that the inclusion of the asymmetry of the real and imaginary branches of the hole dispersion relation is critical in determining the device characteristics.

2015 - Semi-analytic Modeling for Hot Carriers in Electron Devices [Capitolo/Saggio]
Alban, Zaka; Palestri, Pierpaolo; Quentin, Rafhay; Raphael, Clerc; Denis, Rideau; Selmi, Luca
abstract

The paradigm shift from a field- to an energy-based framework in the modeling of hot-carrier-induced degradation has triggered a detailed microscopic view on the degradation mechanisms in MOSFET devices (see also chapter “The Spherical Harmonics Expansion Method for Assessing Hot Carrier Degradation”). The knowledge of the carrier energy distribution inside the device is the main ingredient enabling the energy-dependent approaches. However, efficient and reliable hot-carrier modeling in electron devices is a challenging task. This chapter presents a novel semi-analytical approach to model hot-carrier transport in MOSFET devices. The new approach is inherently non-local and: (a) considers full-band aspects of the silicon band structure, (b) includes major inelastic scattering mechanisms such as optical phonons, impact ionization and carrier-carrier scattering. The model is extensively compared against reference full-band Monte Carlo simulations in terms of distribution functions as well as bulk and gate currents over a wide range of gate lengths and bias conditions. The obtained good agreement confirms the accuracy of the adopted approach that offers an efficient alternative to Monte Carlo and Spherical Harmonics Expansion for hot-carrier modeling.

2015 - Simulation analysis of III-V n-MOSFETs: channel materials, Fermi level pinning and biaxial strain [Relazione in Atti di Convegno]
Caruso, Enrico; Lizzit, Daniel; Osgnach, Patrik; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

In this work we employ a state-of-the-art Multi-Subband Monte Carlo simulator to investigate the performance of III-V n-MOSFETs with LG = 11.7nm. We analyze GaSb versus InGaAs strained and unstrained channel materials and the implications of Fermi level pinning on electrostatic and transport. We found that InGaAs MOSFETs can outperform strained silicon for low VDD applications. Advantages related to strained InGaAs are limited and mainly due to reduced Fermi Level Pinning.

2015 - State-of-the-art semi-classical Monte Carlo method for carrier transport in nanoscale transistors [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Caruso, Enrico; Driussi, Francesco; Esseni, David; Lizzit, Daniel; Osgnach, Patrik; Venica, Stefano; Selmi, Luca
abstract

We review the Monte Carlo method to model semi-classical carrier transport in advanced semiconductor devices. We report examples of the use of the Multi- Subband Monte Carlo method to simulate MOSFETs with III-V compound semiconductor channel. Monte Carlo transport modeling of graphene-based transistors is also addressed.

2015 - The impact of interface states on the mobility and drive current of In 0.53Ga 0.47As semiconductor n-MOSFETs [Articolo su rivista]
Osgnach, Patrik; Caruso, Enrico; Lizzit, Daniel; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

Accurate Schrödinger-Poisson and Multi-Subband Monte Carlo simulations are used to investigate the effect of interface states at the channel-insulator interface of In0:53Ga0:47As MOSFETs. Acceptor states with energy inside the conduction band of the semiconductor can explain the dramatic Fermi level pinning observed in the experiments. Our results show that these states significantly impact the electrical mobility measurements but they appear to have a limited influence on the static current drive of short channel devices.

2015 - Two dimensional quantum mechanical simulation of low dimensional tunneling devices [Articolo su rivista]
Alper, C.; Palestri, Pierpaolo; Lattanzio, L.; Padilla, J. L.; Ionescu, A. M.
abstract

We present a 2-D quantum mechanical simulation framework based on self-consistent solutions of the Schrödinger and Poisson equations, using the Finite Element Method followed by tunneling current (direct and phonon assisted) calculation in post-processing. The quantum mechanical model is applied to Germanium electron–hole bilayer tunnel FETs (EHBTFET). It is found that 2D direct tunneling through the underlap regions may degrade the subthreshold characteristic of such devices and requires careful device optimization to make the tunneling in the overlap region dominate over the parasitic paths. It is found that OFF and ON state currents for the EHBTFET can be classified as point and line tunneling respectively. Oxide thickness was found to have little impact on the magnitude of the ON current, whereas it impacts the OFF current.

2014 - A new formulation for surface roughness limited mobility in bulk and ultra-thin-body metal–oxide–semiconductor transistors [Articolo su rivista]
Lizzit, Daniel; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper presents a new model for the surface roughness (SR) limited mobility in MOS transistors. The model is suitable for bulk and thin body devices and explicitly takes into account the non linear relation between the displacement of the interface position and the SR scattering matrix elements, which is found to significantly influence the r.m.s value of the interface roughness that is necessary to reproduce SR-limited mobility measurements. In particular, comparison with experimental mobility for bulk Si MOSFETs shows that with the new SR scattering model a good agreement with measured mobility can be obtained with r.m.s. values of about 0.2 nm, which is in good agreement with several AFM and TEM measurements. For thin body III–V MOSFETs, the proposed model predicts a weaker mobility degradation at small well thicknesses (Tw), compared to the Tw^6 behavior observed in Si extremely thin body devices

2014 - Analysis of TFET based 6T SRAM cells implemented with state of the art silicon nanowires [Relazione in Atti di Convegno]
S., Strangio; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; F., Crupi
abstract

Tunnel-FETs are studied in a mixed device/circuit simulation environment. Model parameters calibrated on experimental DC as well as pulsed characterizations are then used for 6T SRAM cells investigation. Issues concerning fabricated devices, as the ambipolarity and the uni-directionality, are addressed at both device and circuit levels. Our results suggest that ambipolarity needs to be solved through device engineering and/or fabrication process improvements, while issues related to uni-directionality may be mitigated with a proper circuit design.

2014 - Challenges and opportunities in the design of Tunnel FETs: materials, device architectures, and defects [Relazione in Atti di Convegno]
Esseni, David; M. G., Pala; Revelant, Alberto; Palestri, Pierpaolo; Selmi, Luca; M., Li; G., Snider; D., Jena; H. G., Xing
abstract

Tunnel FETs are perceived as promising emerging devices to improve the energy efficiency of CMOS integrated circuits. This paper presents results and discussions about some selected topics concerning the working principles and design options of Tunnel FETs, which we believe will play an important role in the development and optimization of these transistors in the near term future.

2014 - Efficient Statistical Simulation of Intersymbol Interference and Jitter in High-Speed Serial Interfaces [Articolo su rivista]
Cristofoli, Andrea; Palestri, Pierpaolo; Nicola Da, Dalt; Selmi, Luca
abstract

We present and validate against experiments a modeling approach for high-speed serial links that combines the computational advantages of statistical techniques for intersymbol interference (ISI) (improved by employing the realistic pulse shape as from SPICE simulations) and a simple empirical methodology to account for the jitter of the transmitter. The proposed approach is validated by comparison with other modeling approaches such as full SPICE simulations (for ISI) and Simulink (for jitter) as well as against the experimental data for a 2.5 Gb/s CMOS differential transmitter driving different channels.

2014 - Electron-Hole Bilayer Deep Subthermal Electronic Switch: Physics, Promise and Challenges [Relazione in Atti di Convegno]
Adrian M., Ionescu; Cem, Alper; Jose L., Padilla; Livio, Lattanzio; Palestri, Pierpaolo
abstract

This paper overviews the physics and promised performance of electron hole bilayer TFETs (EHBTFET) as deep subthermal electronic switch for ultra-low voltage operation. We provide a first complete roadmap for optimizing its design for combined high performance and low leakage. Based on advanced quantum mechanical (QM) simulation methods, it is shown that the major issue with the EHBTFET is the wavefunction (WF) penetration into the underlap region. Various solutions with different varying complexity are proposed and it is shown that steep slope (SS≪60mV/dec) over a few decades of drain current can be attained using these solutions.

2014 - Graphene Base Transistors with optimized emitter and dielectrics [Relazione in Atti di Convegno]
Venica, S.; Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca
abstract

The Graphene Base Transistor (GBT) is a very promising device concept for analog applications. The device operates similar to the hot electron transistor and exploits the high carrier mobility of graphene to reduce the base resistance that limits the unity power gain frequency (fmax) and the noise figure (NF) of RF devices. Although the DC functionality of the GBT has been experimentally demonstrated, at present RF performance can be investigated by simulations only. In this paper, we predict the DC current and the cutoff frequency of different GBT designs (including dimensions and various materials), with the aim to optimize the GBT structure and to achieve THz operation. In particular, optimized emitter/dielectrics combinations are proposed to maximize RF figures of merit.

2014 - Models for the use of commercial TCAD in the analysis of silicon-based integrated biosensors [Articolo su rivista]
Pittino, Federico; Palestri, Pierpaolo; Scarbolo, Paolo; Esseni, David; Selmi, Luca
abstract

We present a simple approach to describe electrolytes in TCAD simulators for the modeling of nano-biosensors. The method exploits the similarity between the transport equations for electrons and holes in semiconductors and the ones for charged ions in a solution. We describe a few workarounds to improve the model accuracy in spite of the limitations of commercial TCAD. Applications to the simulations of silicon nanowire and nanoelectrode biosensors are reported as relevant examples.

2014 - Performance Benchmarking and Effective Channel Length for Nanoscale InAs, In0.53Ga0.47As, and sSi n-MOSFETs [Articolo su rivista]
Lizzit, Daniel; Esseni, David; Palestri, Pierpaolo; Osgnach, Patrik; Selmi, Luca
abstract

Thanks to the high electron velocities, III–V semiconductors have the potential to meet the challenging ITRS requirements for high performance for sub-22-nm technology nodes and at a supply voltage approaching 0.5 V. This paper presents a comparative simulation study of ultrathin-body InAs, In0.53Ga0.47As, and strained Si MOSFETs, by using a comprehensive semiclassical multisubband Monte Carlo (MSMC) transport model. Our results show that: 1) due to the finite screening length in the source-drain regions, III–V and Si nanoscale MOSFETs with a given gate length (LG) may have a quite different effective channel length (Leff); 2) the difference in Leff provides a useful insight to interpret the performance comparison of III–V and Si MOSFETs; and 3) the engineering of the source-drain regions has a remarkable influence on the overall performance of nanoscale III–V MOSFETs.

2014 - Performance analysis of different SRAM cell topologies employing tunnel-FETs [Relazione in Atti di Convegno]
Strangio, Sebastiano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; F., Crupi
abstract

2014 - Sensitivity of Silicon Nanowire Biochemical Sensors [Capitolo/Saggio]
Palestri, Pierpaolo; M., Mouis; A., Afzalian; Selmi, Luca; Pittino, Federico; D., Flandre; G., Ghibaudo
abstract

2014 - Simulation of DC and RF Performance of the Graphene Base Transistor [Articolo su rivista]
Venica, Stefano; Driussi, Francesco; Palestri, Pierpaolo; Esseni, David; Sam, Vaziri; Selmi, Luca
abstract

We examined the DC and RF performance of the graphene base transistor (GBT) in the ideal limit of unity common base current gain. To this purpose, we developed a model to calculate the current–voltage characteristics of GBTs with semiconductor or metal emitter taking into account space charge effects in the emitter–base and base–collector dielectrics that distort the potential proﬁle and limit the upper value of fT. Model predictions are compared with available experiments. We show that, in spite of space charge high current effects, optimized GBT designs still hold the promise to achieve intrinsic cutoff frequency in the terahertz region, provided that an appropriate set of dielectric and emitter materials is chosen.

2014 - Simulation of the Performance of Graphene FETs With a Semiclassical Model, Including Band-to-Band Tunneling [Articolo su rivista]
Alan, Paussa; Gianluca, Fiori; Palestri, Pierpaolo; Matteo, Geromel; Esseni, David; Giuseppe, Iannaccone; Selmi, Luca
abstract

We assess the analog/RF intrinsic performance of graphene FETs (GFETs) through a semiclassical transport model, including local and remote phonon scattering as well as band-to-band tunneling generation and recombination, validated by comparison with full quantum results over a wide range of bias voltages. We found that scaling is expected to improve the fT , and that scattering plays a role in reducing both the fT and the transconductance also in sub-100-nm GFETs. Moreover, we observed a strong degradation of the device performance due to the series resistances and source/drain to channel underlaps.

2014 - The impact of interface states on the mobility and the drive current of III-V MOSFETs [Relazione in Atti di Convegno]
Osgnach, Patrik; Caruso, Enrico; Lizzit, Daniel; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

We investigate the effect of interface states at the channel/insulator interface of III-V MOSFETs by means of accurate Schr¨odinger-Poisson and Multi-subband Monte Carlo simulations. Traps in the conduction band are found to be the main responsible of the Fermi level pinning observed in the experiments and impact the mobility measurements, but have a limited influence on the current drive of short channel devices.

2014 - Total Ionizing Dose Effects in Si-Based Tunnel FETs [Articolo su rivista]
Lili, Ding; Elena, Gnani; Simone, Gerardin; Marta, Bagatin; Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca; Cyrille Le, Royer; Alessandro, Paccagnella
abstract

Total ionizing dose (TID) effects in Si-based tunnel fi- nite element transfers (FETs) were investigated for the first time. Under 10-keV X-ray irradiation environment, along with the in- crease in total dose, a shift of the transfer characteristics and an increase in the interface trap density could be observed. After ir- radiation at 1 Mrad (SiO2) (and higher dose), the threshold voltage and the band-to-band tunneling conduction were only modestly affected, despite the thick buried oxide (140 nm). In contrast, under the same bias and irradiation environment, a FDSOI nMOSFET fabricated with a similar process presented a more severe degradation, suggesting the robustness of TFETs against TID effects. The underlying mechanism was explored through device simulation and ascribed to be due to the peculiarity of the doping structures of TFETs.

2014 - Two Dimensional Quantum Mechanical Simulation of Low Dimensional Tunneling Devices [Relazione in Atti di Convegno]
C., Alper; Palestri, Pierpaolo; L., Lattanzio; J. L., Padilla; A. M., Ionescu
abstract

We present a 2-D quantum mechanical simulation framework based on self-consistent solutions of Schroedinger-Poisson system, using the Finite Element Method. The quantum mechanical model includes direct as well as phonon-assisted transitions and it is applied to Germanium electron-hole bilayer tunnel FETs (EHBTFET). It is found that 2D direct tunneling through the underlap regions may degrade the subthreshold characteristic of germanium EHBTFETs and requires careful device optimization to make the tunneling in the overlap region dominate over the parasitic paths.

2013 - An Improved Semi-Classical Model to Investigate Tunnel-FET performance [Relazione in Atti di Convegno]
Revelant, Alberto; Osgnach, Patrik; Palestri, Pierpaolo; Selmi, Luca
abstract

We present a model for Tunnel FETs (TFETs) capable to describe off equilibrium transport as well as Band to Band Tunneling (BtBT), that is implemented as an additional block into an existing Multi-Subband Monte Carlo (MSMC) transport simulator. To account for the quantum effect associated to the confinement of carriers in Ultra Thin Body SOI devices, a correction to the computation of the BtBT generation rate is proposed. The developed simulator is here applied to the study of III-V based TFETs.

2013 - Analysis of the Performance of n-Type FinFETs With Strained SiGe Channel [Articolo su rivista]
Lizzit, Daniel; Palestri, Pierpaolo; Esseni, David; Revelant, Alberto; Selmi, Luca
abstract

This paper reports a simulation study investigating the drive current of a prototypical SiGe n-type FinFET built on a relaxed SiGe substrate for different values of the Ge content x in the Si(1−x)Gex active layer. To this purpose, we performed strain simulations, band-structure calculations, and multisubband Monte Carlo transport simulations accounting for the effects of the Ge content on both the band-structure and the scattering rates in the transistor channel. Our results suggest that the largest on-current may be obtained with a simple Si active layer, because of the beneficial strain induced by the SiGe substrate. A SiGe channel instead is less performing because of strain relaxation and alloy scattering.

2013 - Calibrated multi-subband Monte Carlo modeling of tunnel-FETs in silicon and III–V channel materials [Articolo su rivista]
Revelant, Alberto; Palestri, Pierpaolo; Osgnach, Patrik; Selmi, Luca
abstract

We present a semiclassical model for Tunnel-FET (TFET) devices capable to describe band-to-band tunneling (BtBT) as well as far from equilibrium transport of the generated carriers. BtBT generation is implemented as an add-on into an existing multi-subband Monte Carlo (MSMC) transport simulator that accounts as well for the effects typical to alternative channel materials and high-j dielectrics. A simple but accurate correction for the calculation of the BtBT generation rate to account for carrier confinement in the subbands is proposed and verified by comparison with full 2D quantum calculation.

2013 - Electromechanical Piezoresistive Sensing in Suspended Graphene Membranes [Articolo su rivista]
Smith, A. D.; Niklaus, F; Paussa, Alan; Vaziri, S; Fischer, A. C.; Sterner, M; Forsberg, M; Delin, A; Esseni, David; Palestri, Pierpaolo; Ostling, M; Lemme, M. C.
abstract

2013 - Experimental Verification of ISI and Jitter Modeling in High Speed Links [Relazione in Atti di Convegno]
Cristofoli, Andrea; Palestri, Pierpaolo; N., Da Dalt; Selmi, Luca
abstract

2013 - Interpretation of graphene mobility data by means of a semiclassical Monte Carlo transport model [Articolo su rivista]
Bresciani, Marco; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; B., Szafranek; D., Neumaier
abstract

In this paper we compare experimental data and simulations based on a semiclassical model in order to investigate the relative importance of a several scattering mechanisms on the mobility of graphene nano-ribbons. Furthermore, some new experimental results complementing the range of ribbon widths available in the literature are also reported. We show that scattering with remote phonons originating in the substrate insulator can appreciably reduce the mobility of graphene and it should not be neglected in the interpretation of graphene mobility data. In fact by accounting for remote phonon scattering we could reproduce fairly well the experimentally observed dependence of the mobility on the ribbon width, the temperature and the inversion density, whereas the agreement with experiments is much worse when remote phonons are not included in the calculations.

2013 - Mobility in FDSOI Devices: Monte Carlo and Kubo Greenwood Approaches Compared to NEGF Simulations [Relazione in Atti di Convegno]
Rideau, D; Niquet, Y. M.; Nier, Oliver; Palestri, Pierpaolo; Esseni, David; Nguyen, V. H.; Triozon, F; Duchemin, I; Garetto, D; Smith, L; Silvestri, L; Nallet, F; Tavernier, C; Jaouen, H.
abstract

2013 - Mobility in high-K metal gate UTBB-FDSOI devices: From NEGF to TCAD perspectives [Relazione in Atti di Convegno]
D., Rideau; Y. M., Niquet; Nier, Oliver; A., Cros; J. P., Manceau; Palestri, Pierpaolo; Esseni, David; V. H., Nguyen; F., Triozon; J. C., Barbe; I., Duchemin; D., Garetto; L., Smith; L., Silvestri; F., Nallet; R., Clerc; O., Weber; F., Andrieu; E., Josse; C., Tavernier; H., Jaouen
abstract

This paper aims to review important theoretical and experimental aspects of both electrostatics and channel mobility in High-K Metal Gate UTBB-FDSOI MOSFETs. A simulation chain, including advanced quantum solvers, and semi-empirical Technology Computer Assisted Design (TCAD) tools is presented.

2013 - Modeling of End of the Roadmap nMOSFET with Alternative Channel Material [Capitolo/Saggio]
Rafhay, Q; Clerc, R; Ghibaudo, G; Palestri, Pierpaolo; Selmi, Luca
abstract

2013 - Modeling, simulation and design of the vertical Graphene Base Transistor [Articolo su rivista]
Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca
abstract

2013 - Modelling, simulation and design of the vertical Graphene Base Transistor [Abstract in Atti di Convegno]
Driussi, Francesco; Palestri, Pierpaolo; Selmi, Luca
abstract

2013 - Multi-scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility [Articolo su rivista]
Nier, Oliver; D., Rideau; Y. M., Niquet; F., Monsieur; V. H., Nguyen; F., Triozon; A., Cros; R., Clerc; J. C., Barbé; Palestri, Pierpaolo; Esseni, David; I., Duchemin; L., Smith; L., Silvestri; F., Nallet; C., Tavernier; H., Jaouen; Selmi, Luca
abstract

Mobility in high-k/metal-gate Ultra-Thin Body and Box Fully Depleted SOI devices has been extensively investigated by means of multi-scale simulations and experimental data. Split-CV mobility measurements have been performed for various Interfacial Layer Equivalent Oxide Thickness allowing an investigation of the physical mechanisms responsible for the mobility degradation at high-k/Interfacial layer interface. The impact of the back bias on transport properties is investigated and mobility enhancement in the reverse regime (back gate inversion) is studied. A multi-scale simulation strategy is ranging from quantum Non-equilibrium Green’s Functions to semi-classical Kubo Greenwood approach. These advanced solvers made possible a throughout calibration of empirical TCAD mobility models.

2013 - New Hot Carrier degradation modeling reconsidering the role of EES in ultra short N-channel MOSFETs [Relazione in Atti di Convegno]
Randriamihaja, Y; Federspiel, X; Huard, V; Bravaix, A; Palestri, Pierpaolo
abstract

2013 - On the Optimization of SiGe and III-V Compound Hetero-Junction Tunnel FET Devices [Relazione in Atti di Convegno]
Revelant, Alberto; Palestri, Pierpaolo; Osgnach, Patrik; Lizzit, Daniel; Selmi, Luca
abstract

We investigate the operation and performance of planar SiGe/Si and n0.53Ga0.47As/In0.7Ga0.3As/In0.53Ga0.47As hetero-junction Semiconductor on Insulator (ScOI) Tunnel FET (TFET) devices. The alignment between the hetero-junction, the gate edge and the source junction is systematically shifted to search for the highest ON-current and the lowest Subthreshold Swing (SS). A slight positive misalignment between the heterojunction and the metallurgical junction is beneficial to improve ION but for the considered devices the ON-current at VDD=0.5V and IOFF=1pA/m hardly exceeds 1A/m. Furthers reduction of the band gap by lattice strain appears mandatory to exceed this limit in the explored material systems.

2013 - On the response of nanoelectrode capacitive biosensors to DNA and PNA strands [Relazione in Atti di Convegno]
Pittino, Federico; Passerini, F; Palestri, Pierpaolo; Selmi, Luca; Widdershoven, F.
abstract

This paper investigates the response of a nanoelectrode based capacitive biosensor to the presence of single and double strands of DNA/PNA. The expected admittance spectrum for an idealized system with cylindrical symmetry, where the biomolecule is represented by a simple dielectric and charged rod, is calculated over a broad frequency range extending from below to above the electrolyte’s dielectric relaxation cut-off frequency. DNA and PNA hybridization is also considered. The results provide indications on optimum detection conditions for admittance based DNA biosensors.

2013 - Performance of III-V nanoscale MOSFETs: a simulation study [Relazione in Atti di Convegno]
Lizzit, Daniel; Osgnach, P; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

Channel materials alternative to silicon have been recently introduced as a new scaling scenario to operate at increasingly lower supply voltages and maintain high performance. Silicon-based devices might reach their scaling limit imposed by the fundamental physical properties of silicon in the next few years making it difficult to achieve the expected performance for the future CMOS [6]. While for pMOS transistors promising results have been obtained by using the Ge as channel material [7], the best candidates for nMOS transistors are III-V semiconductors.

2013 - Quantum Mechanical Study of the Germanium Electron-Hole Bilayer Tunnel FET [Articolo su rivista]
Cem, Alper; Livio, Lattanzio; Luca De, Michielis; Palestri, Pierpaolo; Selmi, Luca; Adrian Mihai, Ionescu
abstract

The electron-hole bilayer tunnel field-effect transistor (EHBTFET) is an electronic switch that uses 2-D-2-D sub-band-to-sub-band tunneling (BTBT) between electron and hole inversion layers and shows significant subthermal swing over several decades of current due to the step-like 2-D density of states behavior. In this paper, EHBTFET has been simulated using a quantum mechanical model. The model results are compared against transactions on computer-aided design simulations and remarkable differences show the importance of quantum effects and dimensionality in this device. Ge EHBTFET with channel thickness of 10 nm results as a promising device for low supply voltage, subthreshold logic applications, with a super steep switching behavior featuring SSavg ~ 40 mV/dec up to VDD. Furthermore, it has been demonstrated that high on current levels ( ~ 40 μA/μm) can be achieved due to the transition from phonon-assisted BTBT to direct BTBT at higher biases.

2013 - Simulation of low Schottky barrier MOSFETs using an improved Multi-subband Monte Carlo model [Articolo su rivista]
Gudmundsson, V; Palestri, Pierpaolo; Hellström P., E; Selmi, Luca; Östling, M.
abstract

We present a simple and efficient approach to implement Schottky barrier contacts in a Multi-subband Monte Carlo simulator by using the subband smoothening technique to mimic tunneling at the Schottky junction. In the absence of scattering, simulation results for Schottky barrier MOSFETs are in agreement with ballistic Non-Equilibrium Green’s Functions calculations. We then include the most relevant scattering mechanisms, and apply the model to the study of double gate Schottky barrier MOSFETs representative of the ITRS 2015 high performance device. Results show that a Schottky barrier height of less than approximately 0.15 eV is required to outperform the doped source/drain structure.

2013 - Simulation of nano-biosensors based on conventional TCAD [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Sette, R; Pittino, Federico; Saccon, F; Esseni, David; Selmi, Luca
abstract

We present a simple methodology to include the modeling of an electrolyte into a TCAD simulator exploiting the similarity between the transport equations for electrons and holes in semiconductors and the ones for charged ions in a solution. Applications to the simulation of pH-meters and biosensors are reported as examples.

2013 - Surface roughness limited mobility modeling in ultra-thin SOI and quantum well III-V MOSFETs [Relazione in Atti di Convegno]
Lizzit, Daniel; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper presents a new model for the surface roughness (SR) limited mobility (μSR). The model is suitable for bulk, for ultra thin body (UTB) and for Hetero-Structure Quantum Well (HS-QW) MOSFETs. Comparison with experimental mobility for Si bulk MOSFETs shows that a good agreement with measured mobility can be obtained with a r.m.s. value of the SR spectrum close to several AFM and TEM measurements. For III-V MOSFETs with small well thickness the proposed model shows a weaker mobility degradation with respect to the Tw6 behavior.

2013 - Technology Computer Aided Design [Capitolo/Saggio]
Esseni, David; Jungemann, C; Lorenz, J; Palestri, Pierpaolo; Sangiorgi, E; Selmi, Luca
abstract

2013 - Toward computationally efficient Multi-Subband Monte Carlo simulations of nanoscale MOSFETs [Relazione in Atti di Convegno]
Osgnach, Patrik; Revelant, Alberto; Lizzit, Daniel; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

We show how intense exploitation of multi-core architectures allowed us to cut by up to an order of magnitude the execution times of a Multi-Subband Monte Carlo (MSMC) simulator. The result brings simulations with the MSMC method out of the strictly academic domain and close to the execution time threshold for effective use in R&D departments of semiconductor research centres and industries.

2012 - A Multi-Subband Monte Carlo study of electron transport in strained SiGe n-type FinFETs [Relazione in Atti di Convegno]
Lizzit, Daniel; Palestri, Pierpaolo; Esseni, David; Conzatti, Francesco; Selmi, Luca
abstract

This paper reports a simulation study investigating the drive current in the prototypical SiGe n-type FinFET depicted in Fig.1 and for different values of the Ge content x in the Si(1−x)Gex active layer. To this purpose we performed strain simulations, band-structure calculations and Multi-Subband Monte Carlo transport simulations accounting for the effects of the Ge content on both the band-structure and scattering rates in the transistor channel. Our results suggest that the largest on-current may be obtained with a simple Si active layer.

2012 - An Efficient Nonlocal Hot Electron Model Accounting for Electron–Electron Scattering [Articolo su rivista]
Zaka, A; Palestri, Pierpaolo; Rafhay, Q; Clerc, R; Iellina, Matteo; Rideau, D; Tavernier, C; Pananakis, G; Herven, J; Selmi, Luca
abstract

This paper presents a nonlocal model for channel hot electron injection in MOSFETs and nonvolatile memories, which includes a full-band description of optical phonon scattering rates and carrier group velocity. By virtue of its efficient formalism, this model can also include carrier–carrier scattering, which has a marked impact on gate current at low gate voltages. The model is compared against full-band Monte Carlo simulations of typical NOR flash devices in terms of distribution functions, bulk current, gate current, and gate current density along the channel. A very good agreement is obtained for various drain and gate voltages and channel lengths.

2012 - An Improved Semi-classical Approach for Simulating Tunnel-FETs [Relazione in Atti di Convegno]
Revelant, Alberto; Osgnach, Patrik; Palestri, Pierpaolo; Selmi, Luca
abstract

2012 - An improved procedure to extract the limiting carrier velocity in ultra scaled CMOS devices [Relazione in Atti di Convegno]
Toniutti, Paolo; Clerc, R; Palestri, Pierpaolo; Diouf, C; Cros, A; Esseni, David; Boeuf, F; Ghibaudo, G; Selmi, Luca
abstract

The validity of a previously published extraction technique for the limiting carrier velocity responsible for current saturation in nano-MOSFETs is carefully re-examined by means of accurate Multi Subband Monte Carlo transport simulations. By comparing the extracted limiting velocity to the calculated injection velocity, we identify the main sources of error of the extraction method. Then, we propose a new extraction procedure and extensively validate it. Our simulations and experimental results reconcile the values and trends of the extracted limiting velocity with the expectations stemming from quasi ballistic transport theory.

2012 - Applicability of Macroscopic Transport Models to Decananometer MOSFETs [Articolo su rivista]
Vasicek, M; Cervenka, J; Esseni, David; Palestri, Pierpaolo; Grasser, P.
abstract

We perform a comparative study of various macroscopic transport models against multisubband Monte Carlo (MC) device simulations for decananometer MOSFETs in an ultrathin body double-gate realization. The transport parameters of the macroscopic models are taken from homogeneous subband MC simulations, thereby implicitly taking surface roughness and quantization effects into account. Our results demonstrate that the drift-diffusion (DD) model predicts accurate drain currents down to channel lengths of about 40 nm but fails to predict the transit frequency below 80 nm. The energy-transport (ET) model, on the other hand, gives good drain currents and transit frequencies down to 80 nm, whereas below 80 nm, the error rapidly increases. The six moments model follows the results of MC simulations down to 30 nm and outperforms the DD and the ET models.

2012 - Effect of the choice of the tunnelling path on semi-classical numerical simulations of TFET devices [Articolo su rivista]
DE MICHIELIS, Luca; Iellina, Matteo; Palestri, Pierpaolo; Ionescu, A; Selmi, Luca
abstract

In this work a non-local band-to-band tunnelling model has been successfully implemented into a fullband Monte Carlo simulator and applied to Tunnel-FET devices. No stability or statistical noise problems were encountered in spite of particle weights ranging over many orders of magnitude (due to vastly different generation rates at different positions inside the device and biases) so that Tunnel-FET I–V curves could be traced over the whole on–off range. Different approaches for the choice of the tunnelling path have been compared and relevant differences are observed in both the current levels and the spatial distribution of the generated carriers.

2012 - Hot Carrier Degradation: From Defect Creation Modeling to Their Impact on NMOS Parameters [Relazione in Atti di Convegno]
Mamy Randriamihaja, Y; Zaka, A; Huard, V; Rafik, M; Rideau, D; Roy, D; Bravaix, A; Palestri, Pierpaolo
abstract

Hot Carrier induced degradation is modeled using the carrier energy distribution function including Carrier-Carrier Scattering process. Silicon-hydrogen bond breakage through single particle and multiple particles interactions is considered in the modeling of the microscopic defect creation along the channel. Good agreement with lateral profile measurements is obtained for various stress conditions. The impact of the simulated defects distribution along the channel on the electrostatic and mobility (using remote coulomb scattering) is found in line with measurements.

2012 - Improved Modeling of Intersymbol Interference in High Speed Serial Links [Relazione in Atti di Convegno]
Cristofoli, Andrea; Palestri, Pierpaolo; Selmi, Luca; Da Dalt, N.
abstract

2012 - Improved modeling of Intersymbol Interference in high speed serial lynks [Relazione in Atti di Convegno]
Cristofoli, Andrea; Palestri, Pierpaolo; Da Dalt, N; Selmi, Luca
abstract

2012 - Microscopic scale characterization and modeling of transistor degradation under HC stress [Articolo su rivista]
Mamy Randriamihaja, Y; Huard, V; Federspiel, X; Zaka, A; Palestri, Pierpaolo; Rideau, D; Roy, D; Bravaix, A.
abstract

2012 - Modeling of Field-Effect-Transistors with Strained and Alternative Channel Materials [Relazione in Atti di Convegno]
Conzatti, Francesco; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

In this paper we present a review of the modeling of strain effects in nano-scale transistors and we describe different approaches that can be followed in order to include the effect of strain in both conventional and innovative devices. We first describe the mathematical framework for the modeling of strain and then we present two important case-studies where we have successfully emploied advanced modeling techniques in order to investigate the effect of strain in germanium-based MOSFETs and in InAs Tunnel-FETs.

2012 - Multi-Subband Semi-classical Simulation of n-type Tunnel-FETs [Relazione in Atti di Convegno]
Revelant, Alberto; Palestri, Pierpaolo; Selmi, Luca
abstract

We present a newly developed model for Tunnel- FET (TFET) devices capable to describe band-toband tunneling (BtBT) as well as off-equilibrium transport of the generated carriers. BtBT generation is implemented as an add-on into an existing Multi-subband Monte Carlo (MSMC) transport simulator that accounts for the effects of alternative channel materials and high- dielectrics. A simple correction for the calculation of the BtBT generation rate is proposed to account for carrier confinement in the subbands.

2012 - On the origin of the mobility reduction in n- and p-metal-oxide-semiconductor field effect transistors with hafnium-based/metal gate stacks [Articolo su rivista]
Toniutti, Paolo; Palestri, Pierpaolo; Esseni, David; Driussi, Francesco; DE MICHIELIS, Marco; Selmi, Luca
abstract

We examine the mobility reduction measured in hafnium-based dielectrics in n- and p-MOSFETs by means of extensive comparison between accurate multi-subband Monte Carlo simulations and experimental data for reasonably mature process technologies. We have considered scattering with remote (soft-optical) phonons and remote Coulomb interaction with single layers and dipole charges. A careful examination of model assumptions and limitations leads us to the conclusion that soft optical phonon scattering cannot quantitatively explain by itself the experimental mobility reduction reported by several groups for neither the electron nor the hole inversion layers. Experimental data can be reproduced only assuming consistently large concentrations of Coulomb scattering centers in the gate stack. However, the corresponding charge or dipole density would result in a large threshold voltage shift not observed in the experiments. We thus conclude that the main mechanisms responsible for the mobility reduction in MOSFETs featuring Hafnium-based high-k dielectric have not been completely identified yet. Additional physical mechanisms that could reconcile simulations with experimental results are suggested and critically discussed.

2011 - 3D-FBK pixelsensors:Recent beam tests results with irradiated devices [Articolo su rivista]
Micelli, Andrea; K., Helle; H., Sandaker; B., Stugu; M., Barbero; F., Hugging; M., Karagounis; V., Kostyukhin; H., Kruger; J. W., Tsung; N., Wermes; M., Capua; S., Fazio; A., Mastroberardino; G., Susinno; C., Gallrapp; B., Digirolamo; D., Dobos; A., Larosa; H., Pernegger; S., Roe; T., Slavicek; S., Pospisil; K., Jakobs; M., Kohler; U., Parzefall; G., Darbo; G., Gariano; C., Gemmeg; A., Rovani; E., Ruscino; C., Butter; R., Bates; V., Oshea; S., Parker; M., Cavalli Sforza; S., Grinstein; I., Korokolov; C., Pradilla; K., Einsweiler; M., Garcia Sciveres; M., Borri; C., Davia; J., Freestone; S., Kolya; C. H., Lail; C., Nellist; J., Pater; R., Thompson; S. J., Watts; M., Hoeferkampm; S., Seidelm; E., Bolle; H., Gjersdal; K. N., Sjoebaek; S., Stapnes; O., Rohne; D., Suo; C., Young; P., Hansson; P., Grenier; J., Hasi; C., Kenney; M., Kocian; P., Jackson; D., Silverstein; H., Davetak; B., Dewilde; D., Tsybychev; G. F., Dallabetta; P., Gabos; M., Povoli; Cobal, Marina; Giordani, Mario; Selmi, Luca; Cristofoli, Andrea; Esseni, David; Palestri, Pierpaolo; C., Fleta; M., Lozano; G., Pellegrini; M., Boscardin; A., Bagolini; C., Piemonte; S., Ronchin; N., Zorzi; T. E., Hansen; T., Hansen; A., Kok; N., Lietaer; J., Kalliopuska; A., Oja
abstract

The Pixel Detector is the innermost part of the ATLAS experiment tracking device at the Large Hadron Collider, and plays a key role in the reconstruction of the primary vertices from the collisions and secondary vertices produced by short-lived particles. To cope with the high level of radiation produced during the collider operation, it is planned to add to the present three layers of silicon pixel sensors which constitute the Pixel Detector, an additional layer (Insertable B-Layer, or IBL) of sensors. 3D silicon sensors are one of the technologies which are under study for the IBL. 3D silicon technology is an innovative combination of very-large-scale integration and Micro-Electro-Mechanical-Systems where electrodes are fabricated inside the silicon bulk instead of being implanted on the wafer surfaces. 3D sensors, with electrodes fully or partially penetrating the silicon substrate, are currently fabricated at different processing facilities in Europe and USA. This paper reports on the 2010 June beam test results for irradiated 3D devices produced at FBK (Trento, Italy). The performance of these devices, all bump-bonded with the ATLAS pixel FE-I3 read-out chip, is compared to that observed before irradiation in a previous beam test.

2011 - Characterization and modelling of gate current injection in embedded non-volatile flash memory [Relazione in Atti di Convegno]
Zaka, A; Garetto, D; Rideau, D; Palestri, Pierpaolo; Manceau, J. P.; Dornel, E; Rafhay, Q; Clerc, R; Leblebici, Y; Tavernier, C; Jaouen, H.
abstract

Hot Carrier Injection (HCI) is investigated from the experimental and modelling perspectives. Extensive characterization of HCI is performed on ash devices to overcome the difculties arising from direct gate injection measurements. Furthermore, a semi-analytical approach has been developped, capable of modelling both ash cell’s electrostatics during transient operation and gate current under HCI by a non-local model valid for long and short channel devices.

2011 - Experimental Determination of the Impact Ionization Coefficients in Irradiated Silicon [Articolo su rivista]
Cristofoli, Andrea; Palestri, Pierpaolo; Giordani, Mario; Cindro, V.; DALLA BETTA, G. F; Selmi, Luca
abstract

We present new results on the influence of radiationinduced damage on the electron Impact Ionization (I.I.) coefficient , suggesting a small but distinct reduction of at high fluence with respect to unirradiated silicon. Experiments on thick (1.5 m) and thin (1 m) epitaxial silicon samples confirm that such a reduction of is expected even in cases where impact ionization is not simply a field driven process because of strongly non local transport conditions. A consistent increase on the breakdown voltage of a 3D radiation detector has been evaluated by means of TCAD simulations using the experimentally extracted I.I. coefficient for irradiated silicon. These results clarify the impact of radiation damage on some of the key model parameters for TCAD simulations and allow for improved accuracy toward predictive breakdown simulations of silicon particle detectors, e.g., for the ATLAS experiment.

2011 - Explanation of the Charge Trapping Properties of Silicon Nitride Storage Layers for NVMs - Part II: Atomistic and Electrical Modeling [Articolo su rivista]
Vianello, Elisa; Driussi, Francesco; Blaise, P.; Palestri, Pierpaolo; Esseni, David; Perniola, L.; Molas, G.; De Salvo, B.; Selmi, Luca
abstract

Based on the material analysis of the SiN layers presented in part I of this paper, we develop accurate atomistic and electrical models for the silicon nitride (SiN)-based nonvolatile memory devices, taking into account the candidate SiN defects responsible for the memory effect. Our analysis points out the role of the hydrogen atoms and Si dangling bonds in the trapping properties of SiN films with different stoichiometries. The atomistic models provide a comprehensive picture describing the energy level and the occupation number of the different defects in the SiN. The electrical model coupled with the atomistic results, for the first time, demonstrates the ability to describe the program/erase curves of charge-trap memory cells with SiN storage layers with diversified composition. Good agreement between simulations and experimental results coming from the material analysis and the electrical characterization of thin (type-B device) and thick (type-A device) tunnel oxide memory cells is shown.

2011 - Impact of carrier heating on backscattering in inversion layers [Articolo su rivista]
R., Clerc; Palestri, Pierpaolo; Selmi, Luca; G., Ghibaudo
abstract

In this work, Monte Carlo simulations and analytical modeling are used to investigate quasi-ballistic transport in nanometric metal oxide semiconductor field effect transistors (MOSFETs). In particular, we examine how the thermal nature of the distribution functions, which is implicitly assumed in the most common expression for the backscattering coefficient, leads to an underestimation of the backscattering coefficient in high field conditions and erroneous velocity distribution along the channel. An improved analytical model is proposed, which better captures the nonequilibrium nature of the distribution function and its impact on backscattering and by allowing velocity profiles to exceed the thermal limit. The improved model provides additional insights on the impact of several assumptions on backscattering and could serve as the basis for the development of physically based compact models of quasi-ballistic MOSFETs.

2011 - Investigation of Strain Engineering in FinFETs Comprising Experimental Analysis and Numerical Simulations [Articolo su rivista]
Conzatti, Francesco; Serra, Nicola; Esseni, David; De Michielis, M.; Paussa, Alan; Palestri, Pierpaolo; Selmi, Luca; Thomas, S. M.; Whall, T. E.; Leadley, D.; Parker, E. H. C.; Witters, L.; Hytch, M. J.; Snoeck, E.; Wang, T. J.; Lee, W. C.; Doornbos, G.; Vellianitis, G.; van Dal, M. J. H.; Lander, R. J. P.
abstract

This study combines direct measurements of strain, electrical mobility measurements, and a rigorous modeling approach to provide insights about strain-induced mobility enhancement in FinFETs and guidelines for device optimization. Good agreement between simulated and measured mobility is obtained using strain components measured directly at device level by a novel holographic technique. A large vertical compressive strain is observed in metal gate FinFETs, and the simulations show that this helps recover the electron mobility disadvantage of the (110) FinFET lateral interfaces with respect to (100) interfaces, with no degradation of the hole mobility. The model is then used to systematically explore the impact of stress components in the fin width, height, and length directions on the mobility of both n- and p-type FinFETs and to identify optimal stress configurations. Finally, self-consistent Monte Carlo simulations are used to investigate how the most favorable stress configurations can improve the on current of nanoscale MOSFETs.

2011 - LC-VCO in the 3.3- to 4-GHz Band Implemented in 32-nm Low-Power CMOS Technology [Articolo su rivista]
D., Ponton; G., Knoblinger; A., Roithmeier; F., Cernoia; M., Tiebout; M., Fulde; Palestri, Pierpaolo
abstract

2011 - Nanoscale MOS Transistors: Semi-Classical Transport and Applications [Monografia/Trattato scientifico]
Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

Written from an engineering standpoint, this book provides the theoretical background and physical insight needed to understand new and future developments in the modeling and design of n- and p-MOS nanoscale transistors. A wealth of applications, illustrations and examples connect the methods described to all the latest issues in nanoscale MOSFET design. Key areas covered include: • Transport in arbitrary crystal orientations and strain conditions, and new channel and gate stack materials • All the relevant transport regimes, ranging from low field mobility to quasi-ballistic transport, described using a single modeling framework • Predictive capabilities of device models, discussed with systematic comparisons to experimental results.

2011 - Phonon Limited Uniform Transport in Bilayer Graphene Transistors [Relazione in Atti di Convegno]
Paussa, Alan; Bresciani, Marco; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

We report modeling results for low-field mobility and velocity saturation in bilayer graphene based on a newly developed semiclassical transport Monte-Carlo simulator validated by comparison with momentum relaxation time (MRT) calculations. We show that remote phonons originating in the dielectric stack are expected to strongly affect the mobility, although assessing their actual influence at high inversion charge requires the development of an accurate model for dynamic screening. When the applied bias opens the energy gap, the mobility is significantly reduced. The saturation velocity is expected to be as high as 3×107 cm/s and less degraded than mobility by bandgap opening.

2011 - Simulation of graphene nanoscale RF transistors including scattering and generation/recombination mechanisms [Relazione in Atti di Convegno]
Paussa, A; Geromel, M; Palestri, Pierpaolo; Bresciani, M; Esseni, David; Selmi, Luca
abstract

We present a Monte Carlo simulator for RF graphene FETs including the dominant scattering mechanisms and a simple model for band-to-band tunneling. We found that in state-ofthe- art devices scattering is relevant and degrades the cut-off frequency compared to the predictions of ballistic models.

2011 - Simulations and Electrical Characterization of Double-side Double Type Column 3D Detectors [Relazione in Atti di Convegno]
Cristofoli, A.; DALLA COSTA, A.; Boscardin, M.; Cindro, V.; DALLA BETTA, G. F.; Driussi, Francesco; Giacomini, G.; Giordani, Mario; Palestri, Pierpaolo; Povoli, M.; Ronchin, S.; Vianello, E.; Selmi, Luca
abstract

2011 - Test beam results of 3D silicon pixel sensors for the ATLAS upgrade [Articolo su rivista]
Grenier, P; Alimonti, G; Barbero, M; Bates, R; Bolle, E; Borri, M; Boscardin, M; Buttar, C; Capua, M; CAVALLI-SFORZA, M; Cobal, M; Cristofoli, A; DALLA BETTA G., -F; Darbo, G; DA VIA, C; Devetak, Ce; Dewilde, B; DI GIROLAMO, B; Dobos, D; Einsweiler, K; Esseni, D; Fazio, S; Fleta, C; Freestone, J; Gallrapp, C; GARCIA-SCIVERES, M; Gariano, G; Gemme, C; GIORDANI M., -P; Gjersdal, H; Grinstein, S; Hansen, T; HANSEN T., -E; Hansson, P; Hasi, J; Helle, K; Hoeferkamp, M; Hagging, F; Jackson, P; Jakobs, K; Kalliopuska, J; Karagounis, M; Kenney, C; Kahler, M; Kocian, M; Kok, A; Kolya, S; Korokolov, I; Kostyukhin, V; Krager, H; LA ROSA, A; LAI C., H; Lietaer, N; Lozano, M; Mastroberardino, A; Micelli, A; Nellist, C; Oja, A; Oshea, V; Padilla, C; Palestri, P; Parker, S; Parzefall, U; Pater, J; Pellegrini, G; Pernegger, H; Piemonte, C; Pospisil, S; Povoli, M; Roe, S; Rohne, O; Ronchin, S; Rovani, A; Ruscino, E; Sandaker, H; Seidel, S; Selmi, L; Silverstein, D; Soabae, K; Slavicek, Kt; Stapnes, S; Stugu, B; Stupak, J; Su, D; Susinno, G; R., Thompson; TSUNG J., -W; Tsybychev, D; WATTS S., J; Wermes, N; Young, C; Zorzi, N
abstract

2011 - Tunnel-FET architecture with improved performance due to enhanced gate modulation of the tunneling barrier [Relazione in Atti di Convegno]
DE MICHIELIS, Luca; Lattanzio, L; Palestri, Pierpaolo; Selmi, Luca; Ionescu, A. M.
abstract

The Tunnel-FET (TFET) device is a gated reverse biased p-i-n junction whose working principle is based on the quantum mechanical Band-to-Band Tunneling (B2BT) mechanism. The OFF-ON transition can be much more abrupt than for conventional MOSFETs, thus allowing a reduction of the supply voltage and power consumption in logic applications . Several TFETs with point Subthreshold Swing (SS) lower than 60mV/dec have been experimentally demonstrated with different architectures as conventional single gate Silicon-on-Insulator (SOI), Double Gate (DG) and Gate-All-Around (GAA). Unfortunately in all cases a relatively large average SS and a poor on-current have been observed. In conclusion with this work we have shown that although commonly fabricated TFETs feature source/channel interfaces normal to the transport direction, in a well-designed TFET the tunneling junction should have the same orientation of the component of the electric field modulated by the gate: only in this case the gate can effectively modulate the tunneling barrier, resulting in a steeper average SS and higher ION.

2011 - Tunneling path impact on semi-classical numerical simulations of TFET devices [Relazione in Atti di Convegno]
DE MICHIELIS, Luca; Iellina, Matteo; Palestri, Pierpaolo; Ionescu, A; Selmi, Luca
abstract

In this work a non-local band-to-band tunnelling model has been implemented into a full-band Monte Carlo simulator. Two different approaches for the choice of the tunnelling path have been implemented and their impact on the transfer characteristics of different Tunnel FET structures is investigated. In both the SOI and the DG TFET architectures we have simulated, up to 1 order of magnitude of underestimation in the current and up to 15% of difference in the value of the Subthreshold Slope can be found according to the choice of the tunnelling path.

2010 - A New Model for the Backscatter Coefficient in Nanoscale MOSFETs [Relazione in Atti di Convegno]
J. L. P. J., van der Steen; Palestri, Pierpaolo; Esseni, David; R. J. E., Hueting
abstract

In this work, we present a new model for the backscatter coefficient in nanoscale MOSFETs. The model assumes that only few backscattering events occur, which is likely to hold for devices with channel length in the order of the carrier mean free path. Both elastic and inelastic scattering mechanisms are accounted for. Moreover, the model naturally captures the effect of degeneracy. The model is compared with Monte-Carlo simulations for a broad range of channel lengths, temperatures, and electric fields, obtaining in general a very good agreement.

2010 - A numerical model for the oscillation frequency, the amplitude and the phase-noise of MOS-current-mode-logic ring oscillators [Articolo su rivista]
Nocente, M; Fontanelli, D; Palestri, P; Nonis, R; Esseni, D; Selmi, L
abstract

This paper presents a new model for the frequency of oscillation, the oscillation amplitude and the phase-noise of ring oscillators consisting of MOS-current-mode-logic delay cells. The numerical model has been validated through circuit simulations of oscillators designed with a typical 130 nm CMOS technology. A design flow based on the proposed model and on circuit simulations is presented and applied to cells with active loads. The choice of the cell parameters that minimize phase-noise and power consumption is addressed.

2010 - A simulation study of the Punch-through Assisted Hot Holes Injection mechanism for non-volatile-memory cells [Articolo su rivista]
Iellina, Matteo; Palestri, Pierpaolo; Akil, N.; VAN DUUREN, M.; Driussi, Francesco; Esseni, David; Selmi, Luca
abstract

In this paper, we investigate the operating principle and the injection efficiency of the punch-through-assisted hot hole injection mechanism for programming nonvolatile memory cells by means of full-band Monte Carlo transport simulations of realistic device structures. The effects of terminal bias and cell scaling on the injection efficiency and the uniformity of charge injection along the channel are analyzed in detail.

2010 - An improved empirical approach to introduce quantization effects in the transport direction in multi-subband Monte Carlo simulations [Articolo su rivista]
Palestri, Pierpaolo; Lucci, Luca; DEI TOS, S; Esseni, David; Selmi, Luca
abstract

In this paper we propose and validate a simple approach to empirically account for quantum effects in the transport direction of MOS transistors (i.e. source and drain tunneling and delocalized nature of the carrier wavepacket) in multi-subband Monte Carlo simulators, that already account for quantization in the direction normal to the semiconductor-oxide interface by solving the 1D Schrödinger equation in each section of the device. The model has been validated and calibrated against ballistic non-equilibrium Green's function simulations over a wide range of gate lengths, voltage biases and temperatures. The proposed model has just one adjustable parameter and our results show that it can achieve a good agreement with the NEGF approach.

2010 - Comparison of Semiclassical Transport Formulations Including Quantum Corrections for Advanced Devices with High-K Gate Stacks [Relazione in Atti di Convegno]
BUFLER F., M; AUBRY FORTUNA, V; Bournel, A; Braccioli, M; Dollfus, P; Esseni, David; Fiegna, C; Gamizk, F; DE MICHIELIS, Marco; Palestri, Pierpaolo; SAINT MARTIN, J; Sampedrok, C; Sangiorgi, E; Selmi, Luca; Toniutti, Paolo
abstract

Long-channel effective mobilities as well as transfer characteristics of a 32 nm single-gate SOI and a 16 nm double-gate (DG) MOSFET have been simulated with live different Monte Carlo (MC) device simulators. The differences are mostly rather small for the SOI-FET with quantum effects having a minor effect on threshold voltage due to the lowly doped channel, while the two multi-subband MC simulators show some prominent deviations in the case of the DG-FET. High-K mobility degradation by remote phonon scattering (RPS) in free carrier MC approximation leads to smaller performance degradation compared to multi-subband MC with remote Coulomb scattering (RCS) and RPS, but requires further investigations.

2010 - Drain Current Computation in Nanoscale nMOSFETs: Comparison of Transport Models [Relazione in Atti di Convegno]
Sangiorgi, E; Alexander, C; Asenov, A; AUBRY FORTUNA, V; Baccarani, G; Bournel, A; Braccioli, M; Cheng, B; Dollfus, P; Esposito, A; Esseni, David; FENOUILLET BERANGER, C; Fiegna, C; Fiori, G; Ghetti, A; Iannaccone, G; Martinez, A; Majkusiak, B; Monfray, S; Palestri, Pierpaolo; Peikert, V; Reggiani, S; Riddet, C; SAINT MARTIN, J; Schenk, A; Selmi, Luca; Silvestri, L; Walczak, J.
abstract

In this paper the modelling approaches for determination of the drain current in nanoscale MOSFETs pursued by various partners in the frame of the European Projects Pullnano and Nanosil are mutually compared in terms of drain current and internal quantities (average velocity and inversion charge). The comparison has been carried out by simulating template devices representative of 22 nm Double-Gate and 32 nm Single-Gate FD-SOI. A large variety of simulation models has been considered, ranging from drift-diffusion to direct solutions of the Boltzmann-Transport-Equation. The predictions of the different approaches for the 32 nm device are quite similar. Simulations of the 22 nm device instead, are much less consistent. Comparison with experimental data for a 32 nm device shows that the modeling approach used to explain the mobility reduction induced by the high-k dielectric is critical.

2010 - Failure of the Scalar Dielectric Function Approach for the Screening Modeling in Double-Gate SOI MOSFETs and in FinFETs [Articolo su rivista]
Toniutti, Paolo; Esseni, David; Palestri, Pierpaolo
abstract

This paper shows that modeling of the screening effect based on the scalar dielectric function (SDF) fails in double-gate (DG) MOS transistors and in FinFETs. This leads to simulation results inconsistent with the experiments, especially at high channel inversion densities where the mobility is limited by the surface roughness scattering. These results suggest that one should not use the SDF to model transport in DG silicon-oninsulator MOSFETs or FinFETs, but rather resort to the full tensorial dielectric function. This paper clearly identifies, using multi-subband Monte Carlo simulations as well as analytical derivations for the screened matrix elements of the surface roughness scattering, the simplifying assumptions in the derivation of the SDF that do not hold in a DG MOSFET.

2010 - LC-Oscillator featuring independent Gate biasing implemented in 32 nm CMOS technology [Relazione in Atti di Convegno]
Ponton, Davide; Palestri, Pierpaolo; Knoblinger, G; Fulde, M; Selmi, Luca
abstract

This paper analyzes the potentials and the limitations of a novel LC-Oscillator topology featuring independent gate biasing. The topic is addressed from an experimental perspective. The novel topology has been implemented in a state-of-the-art 32 nm CMOS technology and used as a proof-of-concept. The performance of the oscillator has been evaluated in terms of power consumption and phase-noise. The independent gate biasing helps in relaxing the noise/power trade-off that limits the performance of conventional LC-Oscillators.

2010 - Low-Field Mobility and High-Field Drift Velocity in Graphene Nanoribbons and Graphene Bilayers [Relazione in Atti di Convegno]
Bresciani, Marco; Paussa, Alan; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

In this paper we follow a semiclassical approach based on the Boltzmann Transport Equation (BTE) to simulate and compare with experiments the low-field mobility (μ) and the high-field drift velocity (vd) of graphene nano-ribbons (GNRs) and graphene bilayers (GbLs). It is found that remote phonons originating in the substrate have a large impact on the mobility, whereas their impact on the saturation velocity is smaller than predicted by recently proposed simplified model.

2010 - Modeling and Simulation Approaches for Gate Current Computation [Capitolo/Saggio]
Majkusiak, B.; Palestri, Pierpaolo; Schenk, A.; Spinelli, A.; S. COMPAGNONI C., M.; Luisier, M.
abstract

2010 - Multi-subband Monte Carlo simulation of fully-depleted silicon-on-insulator Schottky barrier MOSFETs [Relazione in Atti di Convegno]
V., Gudmundsson; Palestri, Pierpaolo; P. E., Hellstrom; Selmi, Luca; M., Ostling
abstract

We propose a new and simple way to account for tunneling in Schottky barrier (SB) contacts by using the effective potential approach. The method has been validated in 1D cases by comparison with the WK B method and then implemented in a Multi-Subband Monte Carlo simulator. Results for metallic Source/Drain (S/D) MOSFETs with Schottky barrier show that very low Schottky barrier heights (SBH) are needed to provide a current drive comparable to the one of doped-S/D devices. We also observe that SB-MOSFETs are working closer to the ballistic limit than their doped-S/D counterparts although the transport bottleneck is the SB contact.

2010 - On the accuracy of current TCAD hot carrier injection models in nanoscale devices [Articolo su rivista]
A., Zaka; Q., Rafhay; Iellina, Matteo; Palestri, Pierpaolo; R., Clerc; D., Rideau; D., Garetto; E., Dornel; J., Singer; G., Pananakakis; C., Tavernier; H., Jaouen
abstract

In this work, the hot electron injection models presently available for technology support have been investigated within the context of the development of advanced embedded non-volatile memories. The distribution functions obtained by these models (namely the Fiegna Model – FM [1], the Lucky Electron Model – LEM [2] and the recently implemented Spherical Harmonics Expansion of the Boltzman’s Transport Equation – SHE [3]), have been systematically compared to rigorous Monte Carlo (MC) results [4], both in homogeneous and device conditions. Gate-to-drain current ratio and gate current density simulation has also been benchmarked in device simulations. Results indicate that local models such as FM, can partially capture the channel hot electron injection, at the price of model parameter adjustments. Moreover, at least in the device and field condition considered in this work, an overall better agreement with MC simulations has been obtained using the 1st order SHE, even without any particular fitting procedure. Extending the results presented in [3] by exploring shorter gate lengths and addressing the floating gate voltage dependence of the gate current, this work shows that the SHE method could contribute to bridge the gap between the rigorous but time consuming MC method and less rigorous but suitable TCAD local models.

2010 - Programming Efficiency and Drain Disturb Trade-Off in Embedded Non Volatile Memories [Relazione in Atti di Convegno]
A., Zaka; Palestri, Pierpaolo; D., Rideau; Iellina, Matteo; E., Dormel; Q., Rafhay; C., Tavernier; H., Jaouen
abstract

The embedded NOR-type Non Volatile Memory (eNVM) cell is characterized by many figures of merit. Of particular interest are the programming efficiency (PE), defined as the electron gate-to-drain current ratio (Ig/Id) during programming, and the drain disturb current (DDC), defined as the hole gate current Igh during drain disturb (Fig. 1). eNVM gate-length scaling has brought shallower and steeper Source/Drain (S/D) junctions enabling not only higher PE but also increased DDC, the latter yielding to potential reliability issues. Therefore, in the spirit of a compromise in channel/LDD implant conditions is here presented, showing a trade-off between electron and hole injection during programming and drain disturb phases, respectively.

2010 - Pseudo-spectral methods for the efficient simulation of quantization effects in nanoscale MOS transistors [Articolo su rivista]
Paussa, Alan; Conzatti, Francesco; Breda, Dimitri; Vermiglio, Rossana; Esseni, David; Palestri, Pierpaolo
abstract

This paper presents an in-detail investigation of the 6 possible advantages related to the use of the pseudospectral (PS) 7 method for the efficient description of the carrier quantization 8 in nanoscale n- and p-MOS transistors. To this purpose, we 9 have implemented, by using both the finite-difference (FD) and 10 PS methods, self-consistent Schrödinger–Poisson solvers for both 11 a 2-D hole gas described by a k · p Hamiltonian (suitable for 12 p-MOSFETs) and a 1-D electron gas in the effective-mass ap- 13 proximation (for n-type fin-shaped FETs and nanowire FETs). 14 The PS and FD methods have been systematically compared in 15 terms of the CPU time and the number of discretization points by 16 monitoring not only the subband energies in the low-dimensional 17 carrier gas but also the calculation of some scattering-matrix 18 elements that are critically important for the transport modeling. 19 Our results indicate a remarkable reduction in the CPU time for 20 the PS method with respect to the FD method, which makes the PS 21 method very attractive for the modeling of the carrier quantization 22 in nanoscale MOSFETs.

2010 - Simple and efficient modeling of the E–k relationship and low-field mobility in Graphene Nano-Ribbons [Articolo su rivista]
Bresciani, Marco; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

This paper proposes a simple analytical formulation for the dispersion relationship of extended electronic states in Graphene Nano-Ribbons (GNRs). The model has been validated by comparison with Tight-Binding calculation of GNRs in the presence of edge disorder. The model is suited for inclusion in semiclassical models for GNRs featuring widths down to approximately 2 nm. Monte-Carlo simulations accounting for phonons and edge roughness scattering are then used to understand the ribbon width of the low-field mobility. The mechanisms responsible for the low mobility values measured in narrow ribbons compared to graphene sheets are the increased phonon scattering rate and mobility effective mass due to the strong band structure modification induced by the reduced lateral dimensions and the increased scattering with the edges. However, scattering with phonons and with edges is not sufficient to reproduce the experimental mobility on insulating substrates, suggesting that the effect of remote polar phonons originating in the substrate can be significant in graphene based devices.

2010 - Simulation study of the on-current improvements in Ge and sGe versus Si and sSi nano-MOSFETs [Relazione in Atti di Convegno]
Conzatti, Francesco; Toniutti, Paolo; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper employs a state-of-the-art semi-classical transport model for inversion layers to analyze the Ion in Si, sSi, Ge and sGe n- and p-MOSFETs by accounting for all the relevant scattering mechanisms (including the remote surface-optical phonons (SOph) and remote Coulomb scattering (remQ) related to high-κ dielectrics), in which strain is implicitly introduced by a modification of the band structure. Our models are first validated against experiments for both mobility and IDS in nanoscale transistors. Then the Ion in Ge and Si MOSFETs is compared for different crystal orientations and strain conditions.

2010 - Understanding the mobility reduction in MOSFETs featuring high-κ dielectrics [Relazione in Atti di Convegno]
Toniutti, P; DE MICHIELIS, M; Palestri, P; Driussi, F; Esseni, D; Selmi, L
abstract

2010 - Understanding the mobility reduction in MOSFETs featuring high-κ dielectrics [Relazione in Atti di Convegno]
Toniutti, Paolo; DE MICHIELIS, Marco; Palestri, Pierpaolo; Driussi, Francesco; Esseni, David; Selmi, Luca
abstract

In this paper we analyze by means of accurate Multi-Subband Monte Carlo simulations the mobility reduction associated to high-k dielectrics in a large number of n- and p-MOSFETs. We argue that soft optical phonon scattering can not explain the experimental mobility reduction for neither the electron nor the hole inversion layer. In order to reproduce the experimental data, a large amount of Coulomb centers in the gate stack is required, which would result in a huge threshold voltage shift not observed in the experiments. Even if we assume the remote charge to be in the form of dipoles, the associated theshold voltage shift is still large and not consistent with the experimental findings.

2009 - A better understanding of the low-field mobility in Graphene Nano-ribbons [Relazione in Atti di Convegno]
Bresciani, M; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

N/A

2009 - A comparison of advanced transport models for the computation of the drain current in nanoscale nMOSFETs [Articolo su rivista]
Palestri, Pierpaolo; C., Alexander; A., Asenov; V., Aubry Fortuna; G., Baccarani; A., Bournel; M., Braccioli; B., Cheng; P., Dollfus; A., Esposito; Esseni, David; C., Fenouillet Beranger; C., Fiegna; G., Fiori; A., Ghetti; G., Iannaccone; A., Martinez; B., Majkusiak; S., Monfray; V., Peikert; S., Reggiani; C., Riddet; J., Saint Martin; E., Sangiorgi; A., Schenk; Selmi, Luca; L., Silvestri; Toniutti, Paolo; J., Walczak
abstract

In this paper we compare advanced modeling approaches for the determination of the drain current in nanoscale MOSFETs. Transport models range from drift–diffusion to direct solutions of the Boltzmann-Transport-Equation with the Monte-Carlo method. Template devices representative of 22 nm Double-Gate and 32 nm Single-Gate Fully-Depleted Silicon-On-Insulator transistors were used as a common benchmark to highlight the differences between the quantitative predictions of different approaches. Using the standard scattering and mobility models for unstrained silicon channels and pure SiO2 dielectrics, the predictions of the different approaches for the 32 nm template are quite similar. Simulations of the 22 nm device instead, are much less consistent, particularly those achieved with MC simulators. Comparison with experimental data for a 32 nm device shows that the modeling approach used to explain the mobility reduction induced by the high-j dielectric is critical. In the absence of a clear understanding of the impact of high-j stack on transport, different models, all providing agreement with the experimental low-field mobility, predict quite different drain currents in saturation and in the sub-threshold region.

2009 - Assessment of the impact of technology scaling on the performance of LC-VCOs [Relazione in Atti di Convegno]
Ponton, Davide; Knoblinger, G; Roithmeier, A; Tiebout, M; Fulde, M; Palestri, Pierpaolo
abstract

This paper analyzes the scaling of LC voltage controlled oscillator (LC-VCO) implemented in advanced planar CMOS technologies. An LC-VCO for GSM applications, has been designed in state-of-the-art 45/40 nm and 32 nm CMOS technologies, exploiting different front- and back-end of line (FEOL/BEOL) options. The designs are compared with each other and with recent literature in terms of power and phase-noise performance.

2009 - Comparison of Advanced Transport Models for Nanoscale nMOSFETS [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Alexander, C; Asenov, A; Baccarani, G; Bournel, A; Braccioli, M; Cheng, B; Dollfus, P; Esposito, A; Esseni, David; Ghetti, A; Fiegna, C; Fiori, G; AUBRY FORTUNA, V; Iannaccone, G; Martinez, A; Majkusiak, B; Monfray, B; Reggiani, S; Riddet, C; SAINT MARTIN, J; Sangiorgi, E; Schenk, A; Selmi, Luca; Silvestri, L; Walczak, J.
abstract

In this paper we mutually compare advanced modeling approaches for the determination of the drain current in nanoscale MOSFETs. Transport models range from Drift-Diffusion to direct solution of the Boltzmann Transport equation with the Monte-Carlo methods. Template devices representative of 22 nm Double-Gate and 32 nm FDSOI transistors were used as a common benchmark to highlight the differences between the quantitative predictions of different approaches. Our results set a benchmark to assess modeling tools for nanometric MOSFETs.

2009 - Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices [Articolo su rivista]
Ponton, Davide; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Tiebout, M; Parvais, B; Siprak, D; Knoblinger, G.
abstract

This paper deals with the design of single-stage differential low-noise amplifiers for ultra-wideband (UWB) applications, comparing state-of-the-art planar bulk and silicon-on-insulator (SOI) FinFET CMOS technologies featuring 45-nm gate length. To ensure a broadband input impedance matching, the g m-boosted topology has been chosen. Furthermore, the amplifiers have been designed to work over the whole UWB band (3.1-10.6 GHz), while driving a capacitive load, which is a realistic assumption for direct conversion receivers where the amplifier directly drives a mixer. The simulations (based on compact models obtained from preliminary measurements) highlight that, at the present stage of the technology development, the planar version of the circuit appears to outperform the FinFET one. The main reason is the superior cutoff frequency of planar devices in the inversion region, which allows the achievement of noise figure and voltage gain comparable to the FinFET counterpart, with a smaller power consumption.

2009 - Design strategies for SOI FinFET Low-Noise Amplifiers: dealing with Flicker Noise [Relazione in Atti di Convegno]
Ponton, Davide; Palestri, Pierpaolo; Parvais, B; Fulde, M.
abstract

The trade-off between gate length (Lgate), flicker noise and powder consumption in Low-Noise-Amplifiers (LNA) designed with 45nm FinFETs (FFs) has been investigated, in order to draw new design guidelines for this novel technology. The simulation results highlight the existence of an optimum Lgate which reduces the impact of flicker noise at minimum power consumption.

2009 - Drain current improvements in uniaxially strained p-MOSFETs: A Multi-Subband Monte Carlo study [Articolo su rivista]
Conzatti, Francesco; DE MICHIELIS, Marco; Esseni, David; Palestri, Pierpaolo
abstract

This paper presents a Multi-Subband Monte Carlo study of the drain current improvements in uniaxially, compressively strained (001)/[110] p-MOSFETs and analyzes the ingredients through which the strain improves the long channel mobility as well as the ION of nanoscale transistors. We first discuss the strain induced mobility enhancement and then address the effects of the strain on the ION. In particular, our results show that compressive stress in (001)/[110] p-MOS transistors increases the ION by improving both the injection velocity and the back-scattering coefficient and that, furthermore, the back-scattering coefficients of the p-MOS transistors have values comparable to those of n-MOS devices with similar channel length.

2009 - Experimental and Simulation Analysis of Program/Retention Transients in Silicon Nitride-Based NVM Cells [Articolo su rivista]
Vianello, Elisa; Driussi, Francesco; Arreghini, Antonio; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; N., Akil; M. J., van Duuren; D. S., Golubovic
abstract

A new characterization technique and an improved model for charge injection and transport through ONO gate stacks are used to investigate the program/retention sequence of silicon nitride-based (SONOS/TANOS) nonvolatile memories. The model accounts for drift-diffusion transport in the conduction band of silicon nitride (SiN). A priori assumptions on the spatial distribution of the charge at the beginning of the program/retention operations are not needed. We show that the carrier transport in the SiN layer impacts the spatial distribution of the trapped charge and, consequently, several aspects of program and retention transients. A few model improvements allow us to reconcile the apparent discrepancy between the values of silicon nitride trap energies extracted from program and retention experiments, thus reducing the number of model parameters.

2009 - Experimental and physics-based modeling assessment of strain induced mobility enhancement in FinFETs [Relazione in Atti di Convegno]
Serra, N; Conzatti, F; Esseni, David; DE MICHIELIS, M; Palestri, Pierpaolo; Selmi, Luca; Thomas, S; WHALL T., E; PARKER E. H., C; LEADLEY D., R; Witters, L; Hikavyy, A; HYTCH M., J; Houdellier, F; Snoeck, E; WANG T., J; LEE W., C; Vellianitis, G; VAN DAL M. J., H; Duriez, B; Doornbos, G; Lander, R. J. P.
abstract

This study combines direct measurements of channel strain, electrical mobility measurements and a rigorous modeling approach to provide insight about the strain induced mobility enhancement in FinFETs and guidelines for the device optimization. Good agreement between simulated and measured mobility is obtained using strain components measured directly at device level by a novel technique. A large vertical compressive strain is observed in FinFETs and the simulations show that this helps recover the electron mobility disadvantage of the (110) FinFETs lateral interfaces w.r.t. (100) interfaces, with no degradation of the hole mobility. The model is then used to systematically explore the impact of the fin-width, fin-height and fin-length stress components on n- and p-FinFETs mobility and to identify optimal stress configurations.

2009 - Foreword [Articolo su rivista]
Selmi, Luca; Esseni, David; Palestri, Pierpaolo
abstract

2009 - Multi-Subband Monte Carlo simulations of ION degradation due to fin thickness fluctuations in FinFETs [Articolo su rivista]
Serra, N; Palestri, Pierpaolo; SMIT G. D., J; Selmi, Luca
abstract

The impact of fin thickness nonuniformities on carrier transport in n-type FinFETs is analyzed with a Multi-Subband Monte Carlo technique, which allows for an accurate description of the quasi-ballistic transport taking place in short channel devices and which comprises the dominant scattering mechanisms as well as a semi-empirical technique to handle quantization effects in the transport direction. We found that the impact of channel thickness discontinuity on the on-current is larger when the nonuniformities are located close to the Virtual Source of the device. Furthermore, the sensitivity of the on-current to thickness nonuniformity is essentially the same when considering devices with different crystal orientations. Comparison with drift-diffusion simulations reveals substantial differences in the predicted trends of the sensitivity of the drain current to thickness fluctuations in these nanoscale devices.

2009 - New insight on the charge trapping mechanisms of SiN--based memory by atomistic simulations and electrical modeling [Relazione in Atti di Convegno]
Vianello, Elisa; Perniola, L; Blaise, P; Molas, G; COLONNA J., P; Driussi, Francesco; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Rochat, N; Licitra, C; Lafond, D; Kies, R; Reimbold, G; DE SALVO, B; Boulanger, F.
abstract

In this paper, we have studied the charge trapping mechanisms of nitride-based non-volatile memories. The impact of different silicon-nitride (SiN) compositions (standard, std, and Si-rich) on the device characteristics has been investigated through material characterizations, electrical measurements, atomistic and electrical simulations. We found that the different physical nature of the dominant defects in the two SiN compositions is at the origin of the different device electrical behaviors. In particular, we argue that the different electron occupation number of the defect states of the two SiN materials explains the observed faster erasing speed and charge loss rate of Si-rich SiN devices, with respect to std SiN devices, in spite of comparable programming behavior. A simple trap model is proposed to improve state of the art simulators of SiN based memories.

2009 - On the Accuracy of Current TCAD Hot Carrier Injection Models for the Simulation of Degradation Phenomena in Nanoscale Devices [Relazione in Atti di Convegno]
A., Zaka; Q., Rafhay; Palestri, Pierpaolo; R., Clerc; D., Rideau; Selmi, Luca; C., Tavernier; H., Jaouen
abstract

The aim of this paper is to assess the capability of TCAD tools to accurately model hot electron injection in advanced device architecture versus state of the art full band Monte Carlo.

2009 - Reduction of Up-converted Flicker Noise in differential LC-VCO designed in 32nm CMOS technology [Relazione in Atti di Convegno]
Ponton, Davide; G., Knoblinger; A., Roithmeier; M., Tiebout; M., Fulde; Palestri, Pierpaolo
abstract

This paper deals with the design of LC Voltage Controlled Oscillator (LC-VCO) for GSM applications, implemented in a state-of-the-art 32 nm Planar CMOS technology. A standard VCO is compared with a topology featuring tail decoupling, which, to best of our knowledge, is used for the first time for a wide tuning-range application (i.e. 700 MHz centered at 3.65 GHz). The Decoupled VCO significantly reduces the Phase-Noise, up to 9 dB, by lowering the impact of the flicker noise introduced by the switching-pair on the 1/f3 region, with comparable current consumption and tuning-range with respect to the standard VCO.

2009 - Semi-classical transport modelling of CMOS transistors with arbitrary crystal orientations and strain engineering [Articolo su rivista]
Esseni, David; F., Conzatti; M., De Michielis; N., Serra; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper reviews the basic methodologies and models used in the semi-classical modelling of CMOS transistors in the framework of the nowadays generalized scaling scenario. The capabilities to describe devices with arbitrary crystal orientations and strain configurations are discussed. Several simulation results are illustrated and compared to the experiments to assess the understanding of the underlying physics and the predictive capabilities of the models. A case study concerning the drain currents in nano-scale uniaxially strained MOSFETs is presented and it shows how the strain engineering may change the traditional on-current disadvantage of the p-MOS compared to the n-MOS transistors.

2009 - Semiclassical Modeling of Quasi-Ballistic Hole Transport in Nanoscale pMOSFETs Based on a Multi-Subband Monte Carlo Approach [Articolo su rivista]
DE MICHIELIS, Marco; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper presents a new self-consistent multi-subband Monte Carlo (MSMC) simulator designed to investigate quasi-ballistic transport in nanoscale pMOSFETs. The simulator is 2-D in real space and k-space, and an accurate analytical model of the warped hole energy dispersion is adopted. The effects of the hole gas degeneracy are naturally included by accounting for the Pauli's exclusion principle. The simulator is implemented by resorting to original solutions for handling the hole-free flights consistently with the complicated energy dispersion. A detail description of the formulation of the scattering rates used in the simulator and a comparison to calculations based on a k middot p quantization model are given. Upon an appropriate calibration, the new MSMC tool can accurately reproduce the experimental data for low field mobility, and it can be used for the analysis of the semiballistic transport regime in nanoscale pMOSFETs. Preliminary results for the ballistic ratios BR in double-gate silicon-on-insulator pMOSFETs show that the BR in pMOS are not much worse than in nMOS transistors.

2009 - Special Issue of Solid State Electronics Devoted to the 2008 International Conference on Ultimate Integration on Silicon [Curatela]
Selmi, Luca; Esseni, David; Palestri, Pierpaolo
abstract

2009 - Theory of Motion at the band crossing points in bulk semiconductor crystals and in inversion layers [Articolo su rivista]
Esseni, David; Palestri, Pierpaolo
abstract

This paper presents an original investigation of the motion at the band crossing points in the energy dispersion of either bulk crystals or inversion layers. In particular, by using a formalism based on the time dependent Schrödinger equation, we address the quite elusive topic of the belonging of the carriers to the bands that are degenerate at the crossing point. This problem is relevant and delicate for the semiclassical transport modeling in numerically calculated band structures; however, its clariﬁcation demands a full-quantum transport treatment. We here propose analytical derivations and numerical calculations clearly demonstrating that, in a given band structure, the motion of the carriers at the band crossing points is entirely governed by the overlap integrals between the eigenfunctions of the Hamiltonian that has produced the same band structure. Our formulation of the problem is quite general and we apply it to the silicon conduction band calculated by means of the nonlocal pseudopotential method, to the hole inversion layers described by a quantized k·p approach, and to the electron inversion layers described by the effective mass approximation method. In all the physical systems, our results underline the crucial role played by the abovementioned overlap integrals.

2008 - A New Multi Subband Monte Carlo Simulator for Nano p-MOSFETs [Relazione in Atti di Convegno]
DE MICHIELIS, Marco; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper presents a new self-consistent Multi- Subband Monte Carlo (MSMC) simulator design to investigate quasi-ballistic transport in nano p-MOSFETs. The simulator adopts an accurate analytical description of the warped hole subbands. A first comparison between n− and p−MOSFET performance is reported.

2008 - A better understanding of the requirements for predictive modeling of strain engineering in nMOS transistors [Articolo su rivista]
Comparone, G; Palestri, Pierpaolo; Esseni, David; Lucci, L; Selmi, Luca
abstract

In this paper we use a Multi-Subband-Monte-Carlo model to study the transport in nMOSFETs featuring strained silicon channels. It is shown that state-of-the-art modeling of the mobility in n-type inversion layers cannot reproduce the mobility enhancements measured in Si devices with either uniaxial or biaxial strain. Possible reasons for this limitation are analyzed in detail.

2008 - Back-Scattering in Quasi Ballistic NanoMOSFETs: The Role of Non Thermal Carrier Distributions [Relazione in Atti di Convegno]
Clerc, R; Palestri, Pierpaolo; Selmi, Luca; Ghibaudo, G.
abstract

In this work, the kT layer theory for quasi ballistic transport in nanodevices has been reinvestigated, underlying the impact of carrier heating on backscattering. Assuming a constant mean free path, a differential equation for the currents fluxes has been derived, including both the impact of collision and field on backscattering. By making proper approximations on the impact of heating on carrier distribution functions, the backscattering coefficient and velocity profiles have been re-derived, and successfully compared to Monte Carlo simulations of template potential profiles. These results open new perspectives in the development of new physically based compact models for MOSFETs, better accounting for non equilibrium transport effects.

2008 - Comprehensive Behavioral modeling of conventional and Dual-Tuning PLLS [Articolo su rivista]
L., Bizjak; N., Da Dalt; P., Thurner; R., Nonis; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper presents a modular and comprehensive nonlinear time-domain behavioral model for phase-locked loops (PLLs) that are suitable for analyzing the impact on the output signal of the noise contribution and nonidealities of the constituent building blocks. The model building blocks are described by Simulink submodels and can be configured to implement different PLL topologies. Postprocessing of the PLL output provides the PLL phase noise and spur-to-carrier-ratio performances. The calculated phase-noise spectra are compared with those obtained with the well-known linear model and with measurements. To show the flexibility of this approach, many case studies are reported; among them, the analysis of the spurs due to charge pump mismatch and the transient phase noise, and spurs performances of a PLL featuring a dual control of the voltage-controlled oscillator.

2008 - Design of UWB LNA in 45nm CMOS Technology: Planar Bulk vs. FinFET [Relazione in Atti di Convegno]
D., Ponton; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; M., Tiebout; B., Parvais; G., Knoblinger
abstract

This paper describes the design of a single-stage differential Low Noise Amplifier (LNA) for Ultra Wide Band(UWB) applications, implemented in state of the art Planar and FinFET 45nm CMOS technologies. A gm-boosted topology has been chosen and the LNA has been designed to work over the whole UWB band (3.1 – 10.6GHz), while driving a capacitive load. The simulations highlight that, at the present stage of the technology development, the Planar version of the LNA outperforms the FinFET one thanks to the superior cutoff frequency fT of Planar devices in the inversion region, achieving comparable Noise Figure and voltage gain, but consuming less power.

2008 - Drain Current Improvements in Uniaxially Strained p-MOSFETs: a Multi-Subband Monte Carlo Study [Relazione in Atti di Convegno]
Conzatti, Francesco; DE MICHIELIS, Marco; Esseni, David; Palestri, Pierpaolo
abstract

This paper presents a Multi-Subband Monte Carlo study of the drain current improvements in uniaxially, compressively strained (0 0 1)/[1 1 0] p-MOSFETs and analyzes the ingredients through which the strain improves the long channel mobility as well as the I(ON) of nanoscale transistors. We first discuss the strain induced mobility enhancement and then address the effects of the strain on the I(ON). In particular, our results show that compressive stress in (0 0 1)/[1 1 0] p-MOS transistors increases the I(ON) by improving both the injection velocity and the back-scattering coefficient and that, furthermore, the back-scattering coefficients of the p-MOS transistors have values comparable to those of n-MOS devices with similar channel length.

2008 - Impact of the Charge Transport in the Conduction Band on the Retention of Si-Nitride Based Memories [Relazione in Atti di Convegno]
E., Vianello; Driussi, Francesco; Palestri, Pierpaolo; A., Arreghini; Esseni, David; Selmi, Luca; N., Akil; M., van Duuren; D. S., Golubović
abstract

An improved model for charge injection through ONO gate stacks, that comprises carrier transport in the conduction band of the silicon nitride (Si3N4), is used to investigate the program/retention sequence of Si3N4 based (SONOS/TANOS) non volatile memories without making assumptions on the initial distribution of the trapped charge at the beginning of retention. We show that carrier transport in the Si3N4 layer impacts the spatial charge distribution and consequently several other aspects of the retention transient. The interpretation of the Arrehnius plots of the high temperature retention data, typically used to infer the trap depth from the retention activation energy is discussed. The model provides a simple explanation of the small threshold voltage increase observed during retention experiments of thick tunnel oxide ONO stacks.

2008 - Investigation of the transport properties of silicon nanowires using deterministic and Monte Carlo approaches to the solution of the Boltzmann Transport Equation [Articolo su rivista]
Lenzi, M; Palestri, Pierpaolo; Gnani, E; Reggiani, S; Gnudi, A; Esseni, David; Selmi, Luca; Baccarani, G.
abstract

In this paper we investigate the transport properties of silicon nanowire FETs by using two different simulation approaches: the Monte Carlo method and a deterministic, numerical solution of the Boltzmann equation for the quasi-1D electron gas. In both cases we solve the coupled Schroedinger-Poisson equations to extract the profiles of the 1D subbands along the channel; next, the multi-subband Boltzmann equations are tackled with the two different procedures. A very good agreement is achieved between the two approaches to the transport problem in terms of mobility, drain current and internal physical quantities, such as carrier distribution functions and average velocities. Some peculiar features of the low-field mobility as a function of the wire diameter and gate bias are discussed and justified based on the subband energy and wave-function behavior within the cylindrical geometry of the nanowire, as well%

2008 - Monte-Carlo simulation of MOSFETs with band offsets in the source and drain [Articolo su rivista]
Braccioli, M.; Palestri, Pierpaolo; Mouis, M.; Poiroux, T.; Vinet, M.; LE CARVAL, G.; Fiegna, C.; Sangiorgi, Enrico; Deleonibus, S.
abstract

Full-band Monte-Carlo simulations of short channel double-gate SOI nMOSFETs were used to assess possible enhancement of drain current in devices featuring a conduction band offset between the source and the channel as those obtained using non-conventional source/drain materials. We found that the coupling between carrier transport and device electrostatics tends to balance the enhancement of charge injection provided by the band discontinuity, so that the largest contribution to the current enhancement given by alternative S/D materials is due to the strain that they induce in the channel.

2008 - Proceedings of the 2008 International Conference on Ultimate Integration of Silicon (ULIS) [Curatela]
Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

2008 - Revised analysis of the mobility and ION degradation in high-k gate stacks: surface optical phonons vs. remote Coulomb scattering [Relazione in Atti di Convegno]
Toniutti, P; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

We use Multi-Subband Monte Carlo simulations to understand which mechanism is mainly responsible for the mobility degradation observed in nMOSFETs featuring high-k dielectrics. Direct comparison with the experimental data of Cassé et al. points out that for realistic interfacial layer thicknesses the effect of surface optical phonons on the mobility is very modest, and that the measured mobility reduction can be attributed to remote Coulomb scattering of charge in the gate-stack with concentrations in the order of 10^14 cm-2. We found that the drain current reduction in short channel devices is, instead, not as strong as the mobility reduction.

2008 - The Monte Carlo approach to transport modeling in deca-nanometer MOSFETs [Articolo su rivista]
Sangiorgi, E; Palestri, P; Esseni, D; Fiegna, C; Selmi, L
abstract

2008 - The impact of longitudinal non-uniform Fin-thickness on quasi-ballistic transport in FinFETs [Relazione in Atti di Convegno]
Serra, N; Palestri, Pierpaolo; SMIT G. D., J; Selmi, Luca
abstract

The impact of fin-thickness nonuniformities on carrier transport in FinFETs is analyzed with a quasi-ballistic transport model based on the multisubband Monte Carlo technique. Silicon channels featuring thickness constrictions or enlargements show subband energy variations due to the changes in vertical quantization along the fin. We found that the impact on the on-current is larger when the nonuniformities are located close to the virtual source of the device. Furthermore, the sensitivity of on-current to thickness nonuniformity is essentially the same when considering different crystal orientations. Comparison with drift-diffusion simulations reveals quantitative and qualitative differences in the predicted drain current trends of these nanoscale, quasi-ballistic MOS devices.

2008 - ULIS 2008 - 9th International Conference on ULtimate Integration of Silicon: Foreword [Relazione in Atti di Convegno]
Selmi, L.; Esseni, D.; Palestri, P.; Driussi, F.
abstract

2007 - A design methodology for MOS Current-Mode Logic Frequency Dividers [Articolo su rivista]
Nonis, R; Palumbo, E; Palestri, Pierpaolo; Selmi, Luca
abstract

2007 - A new analytical model for the energy dispersion in two-dimensional hole inversion layers [Articolo su rivista]
DE MICHIELIS, Marco; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

2007 - A semi analytical description of the hole band structure in inversion layers for the physically based modelling of pMOS transistors [Articolo su rivista]
DE MICHIELIS, M; Esseni, D; TSANG Y., L; Palestri, P; Selmi, L; ONEILL A., G; Chattopadhyay, S
abstract

This paper presents a new semianalytical model for the energy dispersion of the holes in the inversion layer of pMOS transistors. The wave vector dependence of the energy inside the 2-D subbands is described with an analytical, nonparabolic, and anisotropic expression. The procedure to extract the parameters of the model is transparent and simple, and we have used the band structure obtained with the k·p method to calibrate the model for silicon MOSFETs with different crystal orientations. The model is validated by calculating several transport-related quantities in the inversion layer of a heavily doped pMOSFET and by systematically comparing the results to the corresponding k·p calculations. Finally, we have used the newly developed band-structure model to calculate the effective mobility of pMOS transistors and compare the results with the experimental data. The overall computational complexity of our model is dramatically smaller compared to a fully numerical treatment (such as the k·p method); hence, our approach opens new possibilities for the physically based modeling of pMOS transistors.

2007 - An efficient, mixed semiclassical/quantum mechanical model to simulate planar and wire nano-transistors [Relazione in Atti di Convegno]
Selmi, Luca; Palestri, Pierpaolo; Esseni, David; Lucci, Luca; DE MICHIELIS, Marco
abstract

2007 - Analysis of transport properties of nanoscale SOI devices: Full Quantum versus Semi Classical models [Relazione in Atti di Convegno]
Lucci, Luca; M., Bescond; R., Clerc; Palestri, Pierpaolo; Esseni, David; Selmi, Luca; S., Cristoloveanu
abstract

In this work recently developed 2D Multi-Subband Monte Carlo device simulator and a Non-Equilibrium Green's functions solver are compared focusing on the source-channel barrier height modeling in double gate SOI MOSFETs.

2007 - Comparison of Monte Carlo Transport Models for Nanometer-Size MOSFETs [Relazione in Atti di Convegno]
Fiegna, C; Braccioli, M; BRUGGER S., C; BUFLER F., M; Dollfus, P; AUBRY FORTUNA, V; Jungemann, C; Meinerzhagen, B; Palestri, Pierpaolo; GALDIN RETAILLEAU, S; Sangiorgi, E; Schenk, A; Selmi, Luca
abstract

This paper presents the results of a comparison among five Monte Carlo device simulators for nano-scale MOSFETs. These models are applied to the simulation of the I-V characteristics of a 25 nm gate-length MOSFET representative of the high-performance transistor of the 65 nm technology node. Appreciable differences between the simulators are obtained in terms of simulated ION. These differences are mainly related to different treatments of the ionized impurity scattering (IIS) and pinpoint a limitation of the available models for screening effects at very large carrier concentrations.

2007 - Comparison of modeling approaches for the capacitance-voltage and current voltage characteristics of advanced gate stacks [Articolo su rivista]
Palestri, Pierpaolo; N., Barin; D., Brunel; C., Busseret; A., Campera; P. A., Childs; Driussi, Francesco; C., Fiegna; G., Fiori; R., Gusmeroli; G., Iannaccone; M., Karner; H., Kosina; A. L., Lacaita; E., Langer; B., Majkusiak; C., Monzio Compagnoni; A., Poncet; E., Sangiorgi; Selmi, Luca; A. S., Spinelli; J., Walczak
abstract

In this paper, we compare the capacitance-voltage and current-voltage characteristics of gate stacks calculated with different simulation models developed by seven different research groups, including open and closed boundaries approaches to solve the Schrodinger equation inside the stack. The comparison has been carried out on template device structures, including pure SiO2 dielectrics and high-kappa, stacks, forcing the use of the same physical parameters in all models. Although the models are based on different modeling assumptions, the discrepancies among results in terms of capacitance and leakage current are small. These discrepancies have been carefully investigated by analyzing the individual modeling parameters and the internal quantities (e.g., tunneling probabilities and subband energies) contributing to current and capacitance.

2007 - Device Modeling [Capitolo/Saggio]
Esseni, David; Palestri, Pierpaolo; Sangiorgi, E.
abstract

2007 - Mobility and Backscattering in Germanium n-type Inversion Layers [Relazione in Atti di Convegno]
Rafhay, Q; Palestri, Pierpaolo; Esseni, David; Clerc, R; Selmi, Luca
abstract

2007 - Monte Carlo modeling of nanometer scale MOSFETs [Relazione in Atti di Convegno]
Sangiorgi, E; Palestri, Pierpaolo; Esseni, David; Fiegna, C; Selmi, Luca
abstract

Recent developments in the Monte Carlo method for the simulation of semi-classical carrier transport in nano-MOSFETs include the treatment of quantum-mechanical effects in the simulation (using either the Multi-Subband approach or quantum corrections to the electrostatic potential). In this paper, after reviewing recent progress in this field, selected applications are presented, including the analysis of quasi-ballistic transport, the determination of the RF characteristics of deca-nanometric MOSFETs, and the study of non-conventional device structures and channel materials.

2007 - Monte-Carlo Simulation of Decananometric nMOSFETs: Multi-Subband vs. 3D-Electron Gas with Quantum Corrections [Articolo su rivista]
I., Riolino; M., Braccioli; Lucci, Luca; Palestri, Pierpaolo; Esseni, David; C., Fiegna; Selmi, Luca
abstract

In this paper two Monte-Carlo simulators implementing different models for the influence of carrier quantization on the electrostatics and transport are used to analyze sub-100 nm double-gate SOI devices. To this purpose a new stable and efficient scheme to implement the contacts in the simulation of double-gate SOI devices is introduced first. Then, results in terms of drain current and microscopic quantities are compared, providing new insight on the limitation of a well assessed semiclassical transport simulation approach and a more rigorous multi-subband model.

2007 - Monte-Carlo analysis of signal propagation delay and AC performance of decananometric bulk and double-gate MOSFETs [Articolo su rivista]
Barin, N.; Palestri, Pierpaolo; Fiegna, C.
abstract

A time-dependent simulation procedure has been implemented in a state of the art Monte-Carlo device simulator that includes quantum corrections, and applied to the evaluation of the RF performance of bulk and ultra-thin-body double-gate (UTB-DG) MOSFETs with L-G = 25 nm. The analysis focuses on the evaluation of the signal delay along the channel and of the admittance matrix at the device terminals. The performance of the bulk and UTB-DG MOSFETs are compared; the latter provides a significantly larger transition frequency (F-T), due to the larger trans-conductance and much lower total drain capacitance, thanks to suppressed junction capacitance.

2007 - Monte-Carlo simulation of MOSFETs with Band-Offsets in the Source and Drain [Relazione in Atti di Convegno]
Braccioli, M; Palestri, Pierpaolo; Poiroux, T; Vinet, M; LE CARVAL, G; Mouis, M; Fiegna, C; Sangiorgi, E; Deleonibus, S.
abstract

2007 - Multi-Subband Monte-Carlo study of Transport, Quantization and Electron Gas Degeneration in Ultra-Thin SOI n-MOSFETs [Articolo su rivista]
Lucci, L; Palestri, Pierpaolo; Esseni, David; Bergagnini, L; Selmi, Luca
abstract

2007 - On the Apparent Mobility in Nanometric n-MOSFETs [Articolo su rivista]
Zilli, M; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

This letter investigates the definition and determination of mobility in nanometric metal–oxide–semiconductor transistors by means of multisubband Monte Carlo simulations. Our results clearly show that the transport in nano-MOSFETs, even for very small VDS, is far from being uniform and local. Consequently, the apparent mobility extracted from the experiments is a channel-length-dependent quantity, which is only partly related to the uniform transport mobility. Our study comprises both the electrical and magnetoresistance mobility.

2007 - On the experimental determination of channel back-scattering in nanoMOSFETs [Relazione in Atti di Convegno]
Zilli, Massimiliano; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

By using accurate Multi-Subband-Monte-Carlo simulations of quasi-ballistic transport we carry out a detailed re-examination of the experimental extraction procedure for the ballistic-ratio BR=ID/IBAL in nanoMOSFETs proposed in [1]. It is found that the ballistic-ratio extracted applying this procedure to the simulated drain current severely underestimates the BR extracted by directly compare the simulated ID and IBAL. This is mainly due to inaccurate determination of the temperature dependence of the inversion charge. It is suggested that this limitation of the extraction procedure may explain the apparent lack of improvement in the ballisticity with the geometrical scaling.

2007 - Progress in Technology Oriented Analytical Models for Advanced MOSFET devices [Relazione in Atti di Convegno]
Clerc, R; Ferrier, M; Rafhay, Q; Ghibaudo, G; Palestri, Pierpaolo; Lucci, Luca; Selmi, Luca
abstract

2007 - Quasi Ballistic transport in advanced MOSFET devices [Relazione in Atti di Convegno]
R., Clerc; Palestri, Pierpaolo; Q., Rafhay; M., Ferrier; G., Pananakakis; G., Ghibaudo; Selmi, Luca
abstract

The Physics and understanding of ballistic and quasi ballistic transport in nanoMOSFET is reviewed, underlying main concepts, analytical models and open questions in this area.

2007 - Quasiballistic Transport in Nano-MOSFETs [Capitolo/Saggio]
Sangiorgi, E; Eminente, S; Fiegna, C; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

2007 - Small-signal Analysis of Decananometer bulk and SOI MOSFETs for Analog/Mixed-Signal and RF Applications using the Time-Dependent Monte Carlo Approach [Articolo su rivista]
Eminente, S.; Barin, N.; Palestri, Pierpaolo; Fiegna, C.; Sangiorgi, E.
abstract

A state-of-the-art Monte Carlo simulator is applied to the investigation of the radio-frequency performance of bulk and ultrathin-body single-gate SOI MOSFETs that are designed according to the prescriptions of the 2005 ITRS for analog and mixed-signal applications. We provide an analysis of the signal-delay buildup along the channel and an investigation of the scaling properties of the parameters of the ac equivalent circuit, the transition frequency, and the 3-dB bandwidth of the voltage gain in common-source configuration. A comparison with a standard drift-diffusion approach is presented in order to discuss the main differences between the two transport models in terms of high-frequency ac analysis.

2007 - Technology Oriented Analytical Models of MOSFETs in the Quasi Ballistic Regime [Relazione in Atti di Convegno]
Clerc, R; Rafhay, Q; Ferrier, M; Palestri, Pierpaolo; Ghibaudo, G; Selmi, Luca
abstract

2007 - The Monte Carlo approach to transport modeling in deca-nanometer MOSFETs [Relazione in Atti di Convegno]
Sangiorgi, E.; Palestri, P.; Esseni, D.; Fiegna, C.; Selmi, L.
abstract

In this paper, we review recent developments of the Monte Carlo approach to the simulation of semi-classical carrier transport in nano-MOSFETs, with particular focus on the inclusion of quantum-mechanical effects in the simulation (using either the Multi-Subband approach or quantum corrections to the electrostatic potential) and on the numerical stability issues related to the coupling of the transport with the Poisson equation. Selected applications are presented, including the analysis of quasi-ballistic transport, the determination of the RF characteristics of deca-nanometric MOSFETs, and the study of non-conventional device structures and channel materials. © 2007 IEEE.

2007 - The Monte Carlo approach to transport modeling in decananometer MOSFETs [Relazione in Atti di Convegno]
Sangiorgi, E; Palestri, Pierpaolo; Esseni, David; Fiegna, C; Selmi, Luca
abstract

In this paper, we review recent developments of the Monte Carlo approach to the simulation of semi-classical carrier transport in nano-MOSFETs, with particular focus on the inclusion of quantum-mechanical effects in the simulation (using either the Multi-Subband approach or quantum corrections to the electrostatic potential) and on the numerical stability issues related to the coupling of the transport with the Poisson equation. Selected applications are presented, including the analysis of quasi-ballistic transport, the determination of the RF characteristics of deca-nanometric MOSFETs, and the study of nonconventional device structures and channel materials.

2007 - Validity of the parabolic effective mass approximation in silicon and germanium n-MOSFETs with different crystal orientations [Articolo su rivista]
J. L. P. J., van der Steen; Esseni, David; Palestri, Pierpaolo; Selmi, Luca; R. J. E., Hueting
abstract

2006 - A Model to Understand Current Consumption, Maximum Operating Frequency And Scaling Trends Of MCML Frequency Dividers [Relazione in Atti di Convegno]
Nonis, Roberto; Palumbo, Enzo; Palestri, Pierpaolo; Selmi, Luca
abstract

In this work, the effect of digital CMOS technology down scaling on the performances of MOS Current Mode Logic frequency dividers is addressed. A fast and effective methodology to design the dividers is presented. The insight given by the methodology is then exploited to study the down scaling of MCML dividers by considering two CMOS technologies representative of the 130nm and 90nm technology nodes. The model provides quantitatively accurate predictions of the advantages of scaling on current consumption and maximum frequency of operation.

2006 - Assessment of the Impact of Biaxial Strain on the Drain Current of Decanometric n-MOSFET [Relazione in Atti di Convegno]
Ponton, D; Lucci, L; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

2006 - Effect of the Gap Size on the Source-Side-Injection Efficiency of Split-gate Memory Cells [Articolo su rivista]
Palestri, Pierpaolo; Akil, N; Stefanutti, W; Slotboom, M; Selmi, Luca
abstract

2006 - Monte Carlo Simulation of Decananometric Double-Gate SOI devices: Multi-Subband vs. 3D-Electron Gas with Quantum Corrections [Relazione in Atti di Convegno]
Riolino, I; Braccioli, M; Lucci, L; Esseni, David; Fiegna, C; Palestri, Pierpaolo; Selmi, Luca
abstract

2006 - Monte Carlo Simulation of Substrate Enhanced Electron Injection in Split-gate Memory Cells [Articolo su rivista]
Stefanutti, W; Palestri, Pierpaolo; Akil, N; Selmi, Luca
abstract

In this paper, we use fullband Monte Carlo simulations and gate current measurements to investigate charge injection in split-gate memory cells under negative substrate bias. It is shown that, in the source-side-injection (SSI) regime, the enhancement of the programming efficiency due to the substrate bias is low, unless very low drain and floating-gate biases are considered. In particular, the enhancement of the efficiency is largely reduced if the drain current is kept constant when comparing different substrate biases. Furthermore, it is observed that the carrier injection profile under negative substrate bias is broader than in the SSI regime, and a substantial amount of charge is injected in the spacer region.

2006 - Monte Carlo Simulation of deca-nanometer MOSFETs for Analog/Mixed-signal and RF applications [Relazione in Atti di Convegno]
Eminente, S.; Barin, N.; Palestri, Pierpaolo; Fiegna, C.; Sangiorgi, E.
abstract

A state of the art Monte-Carlo simulator is applied to the investigation of the RF performance of bulk MOSFETs designed according to the prescriptions of the 2005 ITRS Roadmap for analog and mixed signal applications, and of a 53 nm ultra-thin-body (UTB) single-gate (SG) SOI MOSFET. We provide an analysis of the signal-delay build-up along the channel and an investigation of the scaling properties of the parameters of the AC equivalent circuit, the transition frequency FT, and the 3dB bandwidth of the voltage gain in common-source configuration. The effects of ballistic transport and their impact on the AC figures of merit are investigated for short UTB double-gate MOSFETs

2006 - Multi-Subband-Monte-Carlo investigation of the mean free path and of the kT layer in degenerated quasi ballistic nanoMOSFETs [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Clerc, R; Esseni, David; Lucci, Luca; Selmi, Luca
abstract

This paper examines, by means of multi-subband-Monte-Carlo (MSMC) simulations, the prediction of the well known compact formula for back-scattering in nanoMOSFETs, analyzing the effect of carrier degeneracy and complex scattering mechanisms on the back-scattering. The paper also addresses the definition of an appropriate mean-free-path and its relationship to the low-field mobility

2006 - On the Physical Understanding of the kT-Layer Concept in Quasi-Ballistic Regime of Transport in Nanoscale Devices [Articolo su rivista]
Clerc, R.; Palestri, Pierpaolo; Selmi, Luca
abstract

2006 - Physical Description of the Mixed-Mode Degradation Mechanism for High Performance Bipolar Transistors [Relazione in Atti di Convegno]
Vanhoucke, T; HURKX G. A., M; Panko, D; Campos, R; Piontek, A; Palestri, Pierpaolo; Selmi, Luca
abstract

2006 - Quasi Ballistic transport in Fully Depleted SOI MOSFETs: the "kT layer concept revisited [Relazione in Atti di Convegno]
Clerc, R; Palestri, Pierpaolo; Selmi, Luca
abstract

2006 - Revised Stability Analysis of the Nonlinear Poisson Scheme in Self-Consistent Monte Carlo Device Simulations [Articolo su rivista]
Palestri, Pierpaolo; Barin, N; Esseni, David; Fiegna, C.
abstract

In this paper, the stability of self-consistent Monte Carlo (MC) device simulations is revised by developing a model that extends the existing ones by accounting for the effect of a carrier diffusion. Both the linear and the nonlinear Poisson schemes have been considered. The analysis of the linear Poisson scheme reveals that, consistently with the availablemodel, the time step between two Poisson solutions must be short compared to a factor proportional to the scattering rate. On the other hand, it has been found that, contrary to the available stability models, the nonlinear Poisson scheme requires long time steps in order to provide stable simulations. For this reason, the nonlinear scheme is advantageous when considering steady-state simulations. The model predictions have been verified by comparison with MC simulations implementing both schemes.

2006 - Simulation of Double-Gate nano-MOSFETs with the Multi-subband Monte Carlo Method [Relazione in Atti di Convegno]
Lucci, Luca; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

A recently developed self-consistent Monte-Carlo (MC) simulator of confined electron's transport in the inversion layer of nano-MOSFETs is used to analyze three nano-scale ultra-thin body (UTB) SOI MOSFETs. The effect of the subband structure and carrier degeneracy as well as the relative importance of different scattering mechanisms is discussed.

2006 - Stability of Self-Consistent Monte Carlo Simulations: Effects of the Grid Size and of the Coupling Scheme [Articolo su rivista]
Palestri, Pierpaolo; N., Barin; Esseni, David; C., Fiegna
abstract

n this paper, the authors show that the grid spacing affects the stability of self-consistent Monte Carlo device simulations. An analytical model is derived to describe this effect. Guidelines for the choice of the grid size are provided, showing that, when the linear Poisson scheme is used, source/drain extensions with doping level as high as 1020 cm-3 require grid spacing lower than 1 nm in order to have stable simulations. On the other hand, the nonlinear coupling scheme does not impose any constraint, provided that the time between two solutions of the Poisson equation is so long that each solution can be considered as a stationary solution of the Boltzmann transport equation.

2006 - Transport in deca-nanometric MOSFETs: from bandstructure to on-currents [Relazione in Atti di Convegno]
Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

2006 - Validity of the effective mass approximation in silicon and germanium inversion layers [Relazione in Atti di Convegno]
VAN DER STEEN J., L; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

2005 - A Model to Understand Current Consumption, Maximum Operating Frequency And Scaling Trends Of MCML Frequency Dividers [Relazione in Atti di Convegno]
Nonis, Roberto; Palumbo, Enzo; Palestri, Pierpaolo; Selmi, Luca
abstract

In this work, the effect of digital CMOS technology down scaling on the performances of MOS Current Mode Logic frequency dividers is addressed. A fast and effective methodology to design the dividers is presented. The insight given by the methodology is then exploited to study the down scaling of MCML dividers by considering two CMOS technologies representative of the 130 nm and 90 nm technology nodes. The model provides quantitatively accurate predictions of the advantages of scaling on current consumption and maximum frequency of operation.

2005 - An Improved Semi-Classical Monte Carlo Approach for Nano-MOSFET Simulation [Articolo su rivista]
Palestri, Pierpaolo; Eminente, S; Esseni, David; Fiegna, C; Sangiorgi, E; Selmi, Luca
abstract

2005 - Ballistic Effects in Advanced MOSFETs along the Roadmap [Relazione in Atti di Convegno]
Sangiorgi, E; Palestri, Pierpaolo; Eminente, S; Esseni, David; Fiegna, C; Selmi, Luca
abstract

2005 - Comparison of BULK and Ultra-Thin Double Gate SOI MOSFETs for the 65 nm Technology Node: A Monte Carlo Study [Relazione in Atti di Convegno]
M., Braccioli; S., Eminente; Palestri, Pierpaolo; Esseni, David; C., Fiegna
abstract

2005 - Effect of the Grid Size on the Stability of Self-Consistent Monte-Carlo Simulations [Relazione in Atti di Convegno]
N., Barin; Palestri, Pierpaolo; Esseni, David; C., Fiegna
abstract

2005 - Full-Band Quantization Analysis Reveals a Third Valley in Silicon Inversion Layers [Articolo su rivista]
Esseni, David; Palestri, Pierpaolo
abstract

2005 - Gate Current in Stacked Dielectrics for Advanced FLASH EEPROM cells [Relazione in Atti di Convegno]
Driussi, Francesco; Marcuzzi, S; Palestri, Pierpaolo; Selmi, Luca
abstract

2005 - Linear combination of bulk bands method for investigating the low-dimensional electron gas in nanostructured devices [Articolo su rivista]
Esseni, David; Palestri, Pierpaolo
abstract

This paper concerns the determination of the band structure of physical systems with reduced dimensionality with the method of the linear combination of bulk band (LCBB), according to the full-band energy dispersion of the underlying crystal. The derivation of the eigenvalue equation is reconsidered in detail for quasi-two-dimensional (2D) and quasi-one-dimensional (1D) systems and we demonstrate how the choice of the volume expansion in the three-dimensional reciprocal lattice space is important in order to obtain a separated eigenvalue problem for each wave vector in the unconstrained plane (for 2D systems) or in the unconstrained direction (for 1D systems). The clarification of the expansion volume naturally leads to identification of the 2D and 1D first Brillouin zone (BZ) for any quantization direction. We then apply the LCBB approach to the silicon and germanium inversion layers and illustrate the main features of the energy dispersion and the 2D first BZ for the [001], [110], and [111] quantization directions. We further compare the LCBB energy dispersion with the one obtained with the conventional effective mass approximation (EMA) in the case of (001) silicon inversion layers. As an interesting result, we show that the LCBB method reveals a valley at the edge of the 2D first BZ which is not considered by the EMA model and that gives a significant contribution to the 2D density of states.

2005 - Mobility, Velocity and Average Energy in Ultra-Thin-Body SOI MOSFETs [Relazione in Atti di Convegno]
Lucci, Luca; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

2005 - Modeling, design and characterization of a new Low Jitter analog Dual Tuning LC-VCO PLL Architecture [Articolo su rivista]
Nonis, Roberto; DA DALT, N; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper describes the modeling, design, and characterization of a low-jitter 2.4-GHz LC-VCO PLL architecture realized in a standard 0.12-mu m CMOS technology. It features an analog dual control loop for fine and coarse VCO tuning that allows very low VCO gain (60 MHz/V) for noise rejection while maintaining a wide tuning range. The coarse input of the VCO is driven by an analog circuit that adjusts the VCO gain in a continuous manner. Measurements demonstrate an integrated jitter of 0.74 ps that is 43% lower compared to results from a standard PLL topology (STD PLL) with a single control loop. The PLLs have the same bandwidth and output frequency range and were built on the same wafer for comparison. The circuit area of the proposed LC-VCO PLL is 0.7 mm(2) and the power consumption is 32 mW. The area and power consumption of the proposed LC-VCO PLL are less than 1% larger compared to the STD PLL.

2005 - Modelling the Uniform Transport in Thin Film SOI MOSFETs with a Monte Carlo Simulator for the 2D Electron Gas [Articolo su rivista]
Lucci, L; Palestri, P; Esseni, D; Selmi, L
abstract

In this paper, we present simulations of some of the most relevant transport properties of the inversion layer of ultra-thin film SOI devices with a self-consistent Monte-Carlo transport code for a confined electron gas. We show that size induced quantization not only decreases the low-field mobility (as experimentally found in [Uchida K, Koga J, Ohba R, Numata T, Takagi S. Experimental eidences of quantum-mechanical effects on low-field mobility, gate-channel capacitance and threshold voltage of ultrathin body SOI MOSFETs, IEEE IEDM Tech Dig 2001;633–6; Esseni D, Mastrapasqua M, Celler GK, Fiegna C, Selmi L, Sangiorgi E. Low field electron and hole mobility of SOI transistors fabricated on ultra-thin silicon films for deep sub-micron technology application. IEEE Trans Electron Dev 2001;48(12):2842–50; Esseni D, Mastrapasqua M, Celler GK, Fiegna C, Selmi L, Sangiorgi E, An experimental study of mobility enhancement in ultra-thin SOI transistors operated in double-gate mode, IEEE Trans Electron Dev 2003;50(3):802–8. [1–3]]), but also the electron saturation velocity and the carrier heating depend on the subband structure, and thus on the silicon film thickness.

2005 - Monte-Carlo Analysis of Ballistic Transport in MOSFETs along the ITRS Roadmap [Relazione in Atti di Convegno]
Palestri, Pierpaolo; S., Eminente; Esseni, David; C., Fiegna; Selmi, Luca; E., Sangiorgi
abstract

Monte-Carlo simulations including quantum corrections to the potential are used to study electronic transport in Bulk and Double Gate (DG) SOI MOSFETs with LG down to 14 nm. The ON current (ION) and the ballistic current IBL of MOSFETs designed according to the 2003 Roadmap down to the 45 nm node are analyzed. Our results show that, for the explored LG values, scattering still controls ION; thanks to a lower transversal electric field, the DG SOI MOSFETs with low channel doping allow to get closer to the ballistic limit than bulk counterparts.

2005 - Multi-subband Monte Carlo modeling of nano-MOSFETs with strong vertical quantization and electron gas degeneration [Relazione in Atti di Convegno]
Lucci, Luca; Palestri, Pierpaolo; Esseni, David; Selmi, Luca
abstract

This paper presents a new self-consistent MC simulator for the 2D electron gas of nano-MOSFETs. The simulator is two-dimensional in real space and in k-space, and accounts for the electron gas degeneracy in the k-plane. Simulations of thin-film SOI MOSFETs show that the subband structure and the carrier degeneracy strongly affect the transport properties particularly the injection velocity. Our results also point-out the strong anisotropy of the occupation function, which seriously hampers the use of simulators based on the momentum of the BTE

2005 - Stability of Self-Consistent Monte-Carlo Simulations: Revised Analysis of Linear and Non-Linear Poisson Schemes [Relazione in Atti di Convegno]
N., Barin; Palestri, Pierpaolo; Esseni, David; C., Fiegna
abstract

2005 - Understanding Quasi-Ballistic Transport in nano-MOSFETs. Part I:Scattering in the Channel and in the Drain [Articolo su rivista]
Palestri, Pierpaolo; Esseni, David; S., Eminente; C., Fiegna; E., Sangiorgi; Selmi, Luca
abstract

In this paper, and in Part II, Monte Carlo (MC) simulations including quantum corrections to the potential and calibrated scattering models are used to study electronic transport in bulk and double-gate silicon-on-insulator MOSFETs with L-G down to 14-nm designed according to the 2003 International Technology Roadmap for Semiconductors. Simulations with and without scattering are used to assess the influence of quasi-ballistic transport on the MOSFET on-current. We analyze in detail the flux of back-scattered carriers. The role of scattering in different parts of the device is clarified and the MC results are compared to simple models for quasi-ballistic transport presented in the literature.

2005 - Understanding Quasi-Ballistic Transport in nano-MOSFETs. Part II: Technology Scaling along the ITRS [Articolo su rivista]
Eminente, S.; Esseni, David; Palestri, Pierpaolo; Fiegna, C; Selmi, Luca; Sangiorgi, E.
abstract

The on-current and its ballistic limit for MOSFETs designed according to the 2003 International Technology Roadmap for Semiconductors down to the 45-nm node, are evaluated by using the full-band, self-consistent Monte Carlo simulator with quantum–mechanical corrections described in Part I. Our results show that quasi-ballistic transport increases for G below approximately 50 nm and contributes most part of the ON improvements related to scaling. Thanks to a lower vertical electric field, double-gate silicon-on-insulator MOSFETs with ultrathin body and low channel doping achieve performance closer to the ballistic limit than the bulk counterparts.

2004 - A Monte Carlo Study of the Role of Scattering in Deca-nanometer MOSFETs [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Esseni, David; S., Eminente; C., Fiegna; E., Sangiorgi; Selmi, Luca
abstract

In this paper, a Monte-Carlo simulator, including quantum corrections to the potential and an improved physically based model for surface roughness scattering is used to study the electronic transport in double gate (DG) SO1 MOSFETs with Lc down to 14nm. Our results demonstrate that, for the explored LG values, scattering still controls the ON current (IDS), which for Lc = 25nm is overestimated by about a factor of 2 by a ballistic model. By monitoring the electrons back-scattered at the source, we discuss the role of the scattering in different parts of the device.

2004 - An improved semiclassical Monte-Carlo approach for nano-scale MOSFET simulation [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Eminente, S; Esseni, David; Fiegna, C; Sangiorgi, E; Selmi, Luca
abstract

A conventional Monte-Carlo simulator has been extended to include electrostatic and transport effects that are most relevant for the analysis of nano-scale MOSFETs with either bulk or single and double gate SOI architecture and silicon film thickness down to approximately 10nm. Corrections to the self-consistent electrostatic potential and a new model for the surface roughness scattering have been included. The effectiveness of the approach has been tested simulating carrier transport in a 25nm double gate SOI MOSFET.

2004 - Comparative Analysis of Basic Transport Properties in the Inversion Layer of Bulk and SOI MOSFETs: a Monte-Carlo Study [Relazione in Atti di Convegno]
Lucci, Luca; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

2004 - Enhanced Ballisticity in nano-MOSFETs along the ITRS Roadmap: A Monte Carlo Study [Relazione in Atti di Convegno]
S., Eminente; Esseni, David; Palestri, Pierpaolo; C., Fiegna; Selmi, Luca; E., Sangiorgi
abstract

In this work we have simulated the ION and its ballistic limit I-BL of MOSFETs designed according to the 2003 Roadmap down to the 45 nm node, by using a Full-Band, self-consistent Monte Carlo simulator with quantum mechanical corrections. Our results show that scattering plays an important role by limiting the current for gate length down to at least 14 nm; the impact of quasi-ballistic transport increases for L-G below approximately 50 nm and contribute most part of the ION improvements related to scaling. Thanks to a lower transversal electric field, the DG SOI MOSFETs with low channel doping allow to get closer to the ballistic limit than bulk counterparts.

2004 - Full Band and Approximated Solutions of the Schr\"odinger Equation in Silicon Inversion Layers [Relazione in Atti di Convegno]
Esseni, David; Palestri, Pierpaolo
abstract

2004 - Modeling, Design and Characterization of a new low Jitter Analog Dual Tuning LC-VCO PLL Architecture [Relazione in Atti di Convegno]
Nonis, Roberto; DA DALT, N; Palestri, Pierpaolo; Selmi, Luca
abstract

2004 - Monte-Carlo Simulations of Hot-carrier Effects and Photon-Emission in MOS Devices [Altro]
Palestri, Pierpaolo
abstract

2004 - On the extraction of the channel current in permeable gate oxide MOSFETs [Articolo su rivista]
Palestri, Pierpaolo; Esseni, David; Selmi, Luca; Guegan, G; Sangiorgi, E.
abstract

It is a common practice to extract the channel current in permeable gate MOSFETs as the average of the source and drain currents. This paper analyzes the extraction error associated to this procedure by means of theoretical calculations, measurements in a nMOS technology with 1.5 nm oxide thickness and a simple distributed model of the permeable gate MOSFET. The main dependencies of the extraction error on the bias conditions, the oxide thickness and the channel length are discussed in detail.

2003 - A Methodology to Extract the Channel Current of Permeable Gate Oxide MOSFETs [Articolo su rivista]
Palestri, P; Esseni, D.; Selmi, L.; Guegan, G.; Sangiorgi, E.
abstract

2003 - Carrier Quantization in SOI MOSFETs using an Effective Potential Based Monte-Carlo Tool [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Esseni, David; Abramo, Antonio; Clerc, R; Selmi, Luca
abstract

2003 - Device simulation for decananometer MOSFETs [Articolo su rivista]
Sangiorgi, Enrico; Palestri, Pierpaolo; Esseni, David; Fiegna, C.; Abramo, Antonio; Selmi, Luca
abstract

2003 - Towards Microscopic Understanding of MOSFET Reliability: the Role of Carrier Energy and Transport Simulations [Relazione in Atti di Convegno]
Selmi, Luca; Esseni, David; Palestri, Pierpaolo
abstract

2002 - A Comparative Analysis of Substrate Current Generation Mechanisms in Tunneling MOS Capacitors [Articolo su rivista]
Palestri, Pierpaolo; DALLA SERRA, Alberto; Selmi, Luca; M., Pavesi; Rigolli, P. L.; Abramo, Antonio; F., Widdershoven; Sangiorgi, Enrico
abstract

2002 - A Drift-Diffusion/Monte Carlo Simulation Methodology for SiGe HBT Design [Articolo su rivista]
Palestri, Pierpaolo; Mastrapasqua, M.; Pacelli, A.; King, C. A.
abstract

An accurate and efficient simulation methodology for Si(1-x)Ge(x) HBTs is presented. A two-dimensional (2-D) drift-diffusion solver is employed for dc and ac characteristics, and one-dimensional (1-D) full-band Monte Carlo for transport in the base-collector high-electric-field region. Extrinsic parasitics are introduced as lumped circuit elements whose values are obtained from measurements and layout considerations. This approach not only reduces the computational cost of the simulation, but it also helps to differentiate the relevance of the intrinsic and extrinsic device parameters. We discuss the calibration of the simulation on a 0.25 mum process and use a 1-D regional analysis in the quasi-static approximation to identify the major source of delay. Results of the delay analysis were used to improve device performance for the 0.16 mum technology node.

2002 - Advanced Physically Based Device Modeling for Gate Current and Hot Carrier Phenomena in Scaled MOSFETs [Capitolo/Saggio]
Palestri, Pierpaolo; Selmi, Luca; DALLA SERRA, Alberto; Abramo, Antonio; Sangiorgi, Enrico; M., Pavesi; P., Rigolli; F., Widdershoven
abstract

2002 - Can photon emission/absorption processes explain the substrate current of tunneling MOS capacitors ? [Articolo su rivista]
DALLA SERRA, Alberto; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper reports physically based numerical calculations on the relative importance of hot carrier induced photon emission and impact ionization in generating the substrate current of thin oxide MOS capacitors. In particular, we demonstrate that the generation efficiency of photons with energy above the band gap energy is at least 104 smaller than that of electron–hole pairs by impact ionization. Results provide a direct evidence that photon emission can not explain the substrate current which is measured during tunneling experiments from the gate, and set a lower limit to the probability of hole back-tunneling that could make anode hole injection the dominant substrate current generation mechanism in tunneling experiments from the inverted substrate.

2002 - Compact Modeling of Thermal Resistance in Bipolar Transistors on Bulk and SOI substrates [Articolo su rivista]
Pacelli, A.; Palestri, Pierpaolo; Mastrapasqua, M.
abstract

Analytical expressions for the thermal resistance of bipolar transistors on bulk and SOI substrates are presented. The models are derived on the basis of intuitive physical pictures and validated by comparison with experimental data and three-dimensional (3D) device simulation. The effect of bulk and SOI substrates, shallow- and deep-trench isolation, and multiple emitter fingers is accounted for. All models are suitable for both hand calculations and computer-aided design.

2002 - Erratum: A comparative analysis of substrate current generation mechanisms in tunneling MOS capacitors (IEEE Electron Devices (2002) 49 (1427-1435)) [Abstract in Rivista]
Palestri, P.; Serra, A. D.; Selmi, L.; Pavesi, M.; Rigolli, P. L.; Abramo, A.; Widdershoven, F.; Sangiorgi, E.
abstract

2002 - Investigation on convergence and stability of self-consistent Monte Carlo device simulations [Relazione in Atti di Convegno]
Clerc, R; Palestri, Pierpaolo; Abramo, Antonio
abstract

2002 - Minimizing thermal resistance and collector-to-substrate capacitance in graded base SiGe BiCMOS on SOI [Articolo su rivista]
M., Mastrapasqua; Palestri, Pierpaolo; A., Pacelli; G. K., Celler; M. R., Frei; P. R., Smith; R. W., Johnson; L., Bizzarro; W., Lin; T. G., Ivanov; M. S., Carroll; I. C., Kizilyalli; C. A., King
abstract

We describe a low fabrication cost, high-performance implementation of SiGe BiCMOS on SOI. The use of high-energy Implant allows the simultaneous formation of the subcollector and an additional n-type region below the buried oxide. The combination of buried oxide layer and floating n-type region underneath results In a very low col lector-to-substrate capacitance. We also show that this process option achieves a much lower thermal resistance than using SOI with deep trench isolation, both reducing cost and curbing self-heating effects.

2002 - Phase Noise Modelling in Phase Locked Loop Frequency Synthesizer [Relazione in Atti di Convegno]
Nonis, Roberto; Palestri, Pierpaolo; DA DALT, N; Selmi, Luca
abstract

2002 - Physics-Based and Compact Models for Self-Heating in High-Speed Bipolar Integrated Circuits [Relazione in Atti di Convegno]
A., Pacelli; Palestri, Pierpaolo; M., Mastrapasqua
abstract

We present three-dimensional heat-transport simulation for bipolar transistors. The simulations are validated on experimental data, and are employed to develop analytical models for the thermal resistance of devices fabricated on bulk and SOI substrate, and with deep-trench isolation. The cross-heating effect in multifinger devices is also modeled.

2002 - Spontaneous hot carrier photon emission rates in silicon: improved modeling and application to metal oxide semiconductor devices [Articolo su rivista]
Pavesi, M; Rigolli, Pl; Manfredi, M; Palestri, Pierpaolo; Selmi, Luca
abstract

The recent publication of controversial experimental evidence on the origin of hot-carrier currents in 4-10 nm tunnel metal oxide semiconductor capacitors renewed the interest in improving hot-carrier luminescence models for silicon devices. This work presents several such improvements, aimed at making possible a physically based analysis of the hot-carrier luminescence effects taking place during tunneling experiments in relatively thick SiO2 layers. To this purpose, silicon band structure and scattering rate calculations have been extended well above 10 eV by considering eight conduction bands, instead of the usual four, so as to allow for a detailed description of the high-energy carriers injected from silicon into silicon dioxide during tunneling experiments. The absolute contributions of the direct and phonon-assisted, interband and intraband transitions of electrons and holes to the total photon emission rate are analyzed, so the results can be directly compared with the experimental data. To the best of our knowledge, it is for the first time that results for valence-to-valence band transitions of holes are presented and compared with those of conduction-to-conduction band transitions of electrons. Results can be directly compared with experimental data. Template results obtained with a variety of carrier distributions (Maxwellian, Gaussian, and Dirac's delta-like) are shown and implications for device analysis are discussed.

2001 - Can Photon Emission / Absorption Processes Explain the Substrate Current of Tunneling MOS Capacitors? [Relazione in Atti di Convegno]
DALLA SERRA, A.; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper reports physically based numerical calculations on the relative importance of hot carrier induced photon emission and impact ionization in generating the substrate current of thin oxide MOS capacitors. In particular, we demonstrate that the generation efficiency of photons with energy above the band gap energy is at least 10-4 smaller than that of electron-hole pairs by impact ionization. Results provide a direct evidence that photon emission can not explain the substrate current which is measured during tunneling experiments from gate, and set a lower limit to the probability of hole back-tunneling that could make anode hole injection the dominant substrate current generation mechanism in tunneling experiments from the inverted substrate.

2001 - Closed- and Open- boundary Models for Gate-Current calculation in n-MOSFETs [Articolo su rivista]
DALLA SERRA, Alberto; Abramo, Antonio; Palestri, Pierpaolo; Selmi, Luca; Widdershoven, F.
abstract

2001 - Device simulation for advenced Si(1-x) Ge(x) HBTs [Relazione in Atti di Convegno]
M., Mastrapasqua; A., Pacelli; Palestri, Pierpaolo; C. A., King
abstract

2001 - Microscopic Analysis of the Impact of Substrate Bias on the Gate Current of pMOSFETs [Relazione in Atti di Convegno]
Zanchetta, Sergio; Esseni, David; Palestri, Pierpaolo; Selmi, Luca
abstract

This paper presents a detailed numerical investigation of the recently reported phenomenon of substrate enhanced hole gate current in deep submicron pMOS transistors [1]. To this purpose, full-band Monte Carlo simulations of carrier heating and injection in the gate oxide have been carried out at different substrate voltages. Results are in good qualitative agreement with previously reported measurements, and provide a clear microscopic picture to explain the experimentally observed features of electron and hole gate currents in pMOS devices.

2001 - Monte Carlo Simulation of Impact Ionization in SiGe HBTs [Articolo su rivista]
Palestri, Pierpaolo; Pacelli, A.; Mastrapasqua, M.; Bude, J. D.
abstract

Measurements and Monte Carlo simulations of impact ionization in the base-collector region of SiGe HBTs are presented. A device with low germanium concentration (graded from 0 to 12%) is considered and no differences are found between the experimental multiplication factor in that device and the corresponding silicon control. Because impact ionization (II) occurs inside the bulk-Si collector, phonon and II scattering rates for bulk silicon can be used in the Monte Carlo simulation, avoiding the need to model the strained SiGe layers. Full-Band Monte Carlo simulations are shown to reproduce the multiplication factors measured in SiGe devices featuring different collector profiles.

2001 - Non-local microscopic view of signal propagation times in BJTs biased up to high currents [Articolo su rivista]
Palestri, Pierpaolo; Selmi, Luca
abstract

This paper presents a microscopic analysis of signal propagation delay in bipolar transistors featuring relevant non-equilibrium transport effects. First, the physical mechanisms responsible of signal delay are reviewed. A novel technique to extract signal delays from self-consistent Monte Carlo device simulations is presented. These results are then used for a physically based comparison between compact quasi-static delay formulas and more accurate particle simulations carried out over a broad range of collector currents.

2001 - On the Extraction of Oxide Thickness and Sub-Band Energy Shift in Thin Oxide MOS Capacitors with Permeable Gates [Relazione in Atti di Convegno]
DALLA SERRA, Alberto; Palestri, Pierpaolo; Selmi, Luca; Widdershoven, F.
abstract

2001 - Thermal Resistance in Si(1-x) Ge(x) HBTs on Bulk and SOI Substrates [Relazione in Atti di Convegno]
Palestri, Pierpaolo; A., Pacelli; M., Mastrapasqua
abstract

We present a characterization of self-heating in a 0.25mum SiGe BiCMOS technology on bulk and SOI substrates. Measurements are compared with analytical models and simulations. Thermal coupling between emitter fingers and effect of metallization are also analyzed.

2000 - A Monte Carlo Technique to Investigate Signal Delays of Advanced Si BJT's up to High Currents [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Selmi, Luca; G. A. M., Hurkx; J. W., Slotboom
abstract

We present a new Monte Carlo technique to investigate the signal delay of advanced BJTs featuring relevant non-local effects. The method is suited to analyze base and collector signal delays in presence of significant nonequilibrium transport effects and up to high currents, and to verify the physical meaning and applicability of delay expressions for compact models.

2000 - A better insight in the performance of silicon bjt's featuring highly non-uniform collector doping profiles [Articolo su rivista]
Palestri, Pierpaolo; Fiegna, C.; Selmi, Luca; Peter, M. S.; Hurkx, G. A. M.; Slotboom, J. W.; Sangiorgi, Enrico
abstract

This paper investigates the effects of highly nonuniform collector doping profiles on the speed and breakdown performance of silicon bipolar transistors. Monte Carlo and drift diffusion simulation results point out that a thin highly doped layer adjacent to the base collector junction can improve the device cut off frequency without deteriorating significantly the maximum oscillation frequency and the breakdown voltage, provided the voltage drop across this layer is lower than an effective threshold of approximately 1.2 V. Guidelines are given for choosing the doping, position, and thickness of this layer.

2000 - A comparison between semi-classical and quantum-mechanical escape-times for gate current calculations [Relazione in Atti di Convegno]
DALLA SERRA, Alberto; Abramo, Antonio; Palestri, Pierpaolo; Selmi, Luca
abstract

2000 - Cathode Hot Electrons and Anode Hot Holes in Tunneling MOS Capacitors [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Selmi, Luca; Sangiorgi, Enrico; M., Pavesi; F., Widdershoven
abstract

2000 - Coupled Monte Carlo Simulation of Si and SiO2 Transport in MOS Capacitors [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Selmi, Luca; M., Pavesi; F., Widdershoven; Sangiorgi, Enrico
abstract

We present a Monte Carte (MC) model comprising SiO2 and Si transport, suitable to simulate carrier multiplication in MOS structures. The code extends full-band density of states (DoS) and scattering rate calculations in silicon up to high energy. Simulations of 5-15 nn oxides for Non Volatile Memory applications demonstrate the role of oxide transport on the distribution of the holes generated by impact ionization, which are often regarded as the origin of oxide degradation, SILC and breakdown.

2000 - Hot Carrier Effects in MOS capacitors: Improvements in Coupled Monte Carlo Simulations of Si and SiO2 Transport [Abstract in Atti di Convegno]
P., Rigolli; M., Manfredi; M., Pavesi; Palestri, Pierpaolo; Selmi, Luca
abstract

2000 - Impact Ionization and Photon Emission in MOS Capacitors and FETs [Relazione in Atti di Convegno]
Palestri, Pierpaolo; M., Pavesi; P., Rigolli; Selmi, Luca; DALLA SERRA, Alberto; Abramo, Antonio; F., Widdershoven; Sangiorgi, Enrico
abstract

2000 - Monte Carlo Analysis of Signal Delays in BJTs [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Selmi, Luca; Sangiorgi, E.
abstract

2000 - Non Local Electron and Hole Impact Ionization in Advanced Si BJTs [Working paper]
Palestri, Pierpaolo; Selmi, Luca; Hurkx, G. A. M.; Slotboom, J. W.; Terpstra, D; Peter, M; Woltjer, R; Sangiorgi, Enrico
abstract

This report describes a modeling and experimental study of electron and hole impact ionization in silicon bipolar transistors. A method is developed to extract simultaneously the effective field (carrier temperature) dependent electron and hole ionization coefficients from multiplication coefficient data. A simple non local impact ionization model for electrons and holes is developed and the model parameters are extracted by means of comparison with accurate Monte Carlo calculations. The model is used to predict the breakdown voltage of Zener diodes as well as collector-base and collector emitter breakdown voltages of a variety of silicon BJT's fabricated with the SUBILO and DOUBLE POLY processes. The operational validity limits of the model are also assessed by means of calculations on template rectangular and triangular field profiles of varying depletion-region-extension and peak-electricfield -value. The activities were carried out as part of Philips Nat. Labs. cooperation with DIEGM, University of Udine, Italy. Conclusions: In summary, our analysis of electron and hole impact ionization in advanced bipolar devices and Zener diodes concentrated on the following subjects: # Koninklijke Philips Electronics N.V. 2000 iii .

2000 - Tunnelling Injection in Thin Oxide MOS Capacitors [Relazione in Atti di Convegno]
. DALLA SERRA, A.; Abramo, Antonio; Palestri, Pierpaolo; Selmi, Luca; Sangiorgi, E.
abstract

In this paper the semi-classical and quantum-mechanical definitions of escape-time from quasi-bound states have been compared in the frame of MOSFET gate leakage-current calculations. The theoretical background and the numerical issues involved in the implementation of these approaches inside device simulators have been compared. Results on many different thin gate-oxide capacitors, and on a special purpose test structure with mercury-probe contact, point out that the semi-classical approach is faster, less demanding from the numerical point of view, and surprisingly accurate compared to the fully quantum-mechanical treatment of more physically-sound models.

1999 - Analysis of highly non-uniform collector doping profiles for the optimization of the breakdown / speed trade off in advanced BJTs [Working paper]
Palestri, Pierpaolo; Fiegna, C; Selmi, Luca; PETER M., S; HURKX G. A., M; SLOTBOOM J., W; Sangiorgi, Enrico
abstract

Philips Research Nat. Laboratories Report 808/99

1998 - Energy Dependent Electron and Hole Impact Ionization in Si Bipolar Transistors [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Selmi, Luca; Hurkx, F; Slotboom, J; Sangiorgi, Enrico
abstract

This paper describes a self-consistent procedure to extract energy dependent electron (/spl alpha/) and hole (/spl beta/) ionization coefficients directly from electrical measurements of multiplication factors (M/sub n/ and M/sub p/, respectively) carried out on a single reversed junction in a bipolar device. The extracted /spl alpha/ and /spl beta/ coefficients are used to accurately calculate breakdown voltages in a variety of bipolar devices. Results point out the role of holes and of non-local hole heating on the avalanche characteristics of modern bipolar devices.

1998 - Optimization Guidelines for Epitaxial Collectors of Advanced BJT’s with Improved Breakdown Voltage and Speed [Relazione in Atti di Convegno]
Palestri, Pierpaolo; Fiegna, C; Selmi, Luca; Hurkx, F; Slotboom, J; Sangiorgi, Enrico
abstract

Università degli studi di Modena e Reggio Emilia

Pubblicazioni