Francesco Maria PUGLISI - personale UniMoRe

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Francesco Maria PUGLISI

Professore Associato
Dipartimento di Ingegneria "Enzo Ferrari"

Pubblicazioni

2023 - A Unified Framework to Explain Random Telegraph Noise Complexity in MOSFETs and RRAMs [Relazione in Atti di Convegno]
Vecchi, S.; Pavan, P.; Puglisi, F. M.
abstract

2023 - Biologically Plausible Information Propagation in a CMOS Integrate-and-Fire Artificial Neuron Circuit with Memristive Synapses [Articolo su rivista]
Benatti, Lorenzo; Zanotti, Tommaso; Gandolfi, Daniela; Mapelli, Jonathan; Puglisi, Francesco Maria
abstract

Neuromorphic circuits based on spikes are currently envisioned as a viable option to achieve brain-like computation capabilities in specific electronic implementations while limiting power dissipation given their ability to mimic energy efficient bio-inspired mechanisms. While several network architectures have been developed to embed in hardware the bio-inspired learning rules found in the biological brain, such as the Spike Timing Dependent Plasticity, it is still unclear if hardware spiking neural network architectures can handle and transfer information akin to biological networks. In this work, we investigate the analogies between an artificial neuron combining memristor synapses and rate-based learning rule with biological neuron response in terms of information propagation from a theoretical perspective. Bio-inspired experiments have been reproduced by linking the biological probability of release with the artificial synapses conductance. Mutual information and surprise have been chosen as metrics to evidence how, for different values of synaptic weights, an artificial neuron allows to develop a reliable and biological resembling neural network in terms of information propagation and analysis

2023 - Guest Editorial TDMR IIRW Special Section [Breve Introduzione]
Puglisi, F. M.
abstract

The IEEE International Integrated Reliability Workshop (IIRW) is a unique event that takes place every year at the beautiful Fallen Leaf Lake, South Lake Tahoe, CA, USA. The workshop brings together reliability engineers and researchers from all around the world, to exchange ideas over four days in a welcoming, pleasant, and informal setting. The workshop focuses on the recent advances in research on semiconductor device reliability and the related challenges. Topics include transistor and front-end-of-the-line (FEOL) reliability, time-dependent dielectric breakdown (TDDB), bias temperature instability (BTI), hot carrier (HC), back-end-of-the-line (BEOL) reliability, electro-migration, circuit reliability, packaging reliability, conventional and emerging memory reliability, failure analysis, wafer-level reliability, and many others. Specifically, in 2022 IIRW focus areas were circuit reliability (device-circuit degradation and aging), in-memory computing and neuromorphic reliability, plasma-induced damage (PID), and electrostatic discharge (ESD).

2023 - Linking the Intrinsic Electrical Response of Ferroelectric Devices to Material Properties by means of Impedance Spectroscopy [Articolo su rivista]
Benatti, L.; Vecchi, S.; Puglisi, F. M.
abstract

Ferroelectric devices have gained attention in recent years as a potential solution for ultra-low power computing due to their ability to act as memory units and synaptic weights in brain-inspired architectures. One way to study the behavior of these devices under different conditions, particularly the influence of material composition and charge trapping on ferroelectric switching, is through impedance spectroscopy. However, the parasitic impedance of the metal lines that contact the electrodes of the device can affect the measured response and interpretation of the results. In this study, we examined the frequency response of ferroelectric tunnel junctions (FTJs) with a metal-dielectric-ferroelectric-metal (MDFM) stack at various voltages, starting from the analysis of single layer capacitors (MFM and MDM) to better interpret FTJ’s results. To accurately assess the intrinsic response of the device, we developed a method that estimates and removes the parasitic access impedance contribution, which was validated by means of physics-based simulations. This method allows quantifying the intrinsic device-level variability of FTJs and, for the first time, to investigate the relation between the thickness of the dielectric layer, the equivalent phase composition of the ferroelectric material, and the magnitude of the peak in the frequency response, often assumed to be related to charge trapping only.

2023 - Local electric field perturbations due to trapping mechanisms at defects: What random telegraph noise reveals [Articolo su rivista]
Vecchi, S.; Pavan, P.; Puglisi, F. M.
abstract

As devices scale closer to the atomic size, a complete understanding of the physical mechanisms involving defects in high-kappa dielectrics is essential to improve the performance of electron devices and to mitigate key reliability phenomena, such as Random Telegraph Noise (RTN). In fact, crucial aspects of defects in HfO2 are still under investigation (e.g., the presence of metastable states and their properties), but it is well known that oxygen vacancies (V(+)s) and oxygen ions (O(0)s) are the most abundant defects in HfO2. In this work, we use simulations to gain insights into the RTN that emerges when a constant voltage is applied across a TiN/(4 nm)HfO2/TiN stack. Signals exhibit different RTN properties over bias and, thus, appear to originate from different traps. Yet, we demonstrate that they can be instead promoted by the same O(0)s which change their capture (tau(c)) and emission (tau(e)) time constants with the applied bias, which, in turn, changes the extent of their electrostatic interactions with the traps that assist charge transport (V(+)s). For a certain bias, RTN is given by the modulation of the trap-assisted current at V(+)s induced by trapping/detrapping events at O(0)s, which are, in turn, influenced by the bias itself and by trapped charge at nearby O(0)s. In this work, we demonstrate that accounting for the effect of trapped charge is essential to provide accurate estimation of the RTN parameters, which allow us to retrieve information about traps and to explain key mechanisms behind complex RTN signals.

2023 - Reliability of HfO2-Based Ferroelectric FETs: A Critical Review of Current and Future Challenges [Articolo su rivista]
Zagni, Nicolo'; Puglisi, Francesco Maria; Pavan, Paolo; Alam, Muhammad Ashraful
abstract

Ferroelectric transistors (FeFETs) based on doped hafnium oxide (HfO2) have received much attention due to their technological potential in terms of scalability, highspeed, and low-power operation. Unfortunately, however, HfO2-FeFETs also suffer from persistent reliability challenges, specifically affecting retention, endurance, and variability. A deep understanding of the reliability physics of HfO2-FeFETs is an essential prerequisite for the successful commercialization of this promising technology. In this article, we review the literature about the relevant reliability aspects of HfO2-FeFETs. We initially focus on the reliability physics of ferroelectric capacitors, as a prelude to a comprehensive analysis of FeFET reliability. Then, we interpret key reliability metrics of the FeFET at the device level (i.e., retention, endurance, and variability) based on the physical mechanisms previously identified. Finally, we discuss the implications of device-level reliability metrics at both the circuit and system levels. Our integrative approach connects apparently unrelated reliability issues and suggests mitigation strategies at the device, circuit, or system level. We conclude this article by proposing a set of research opportunities to guide future development in this field.

2023 - Study of RRAM-Based Binarized Neural Networks Inference Accelerators Using an RRAM Physics-Based Compact Model [Capitolo/Saggio]
Zanotti, Tommaso; Pavan, Paolo; Maria Puglisi, Francesco
abstract

In-memory computing hardware accelerators for binarized neural networks based on resistive RAM (RRAM) memory technologies represent a promising solution for enabling the execution of deep neural network algorithms on resource-constrained devices at the edge of the network. However, the intrinsic stochasticity and nonidealities of RRAM devices can easily lead to unreliable circuit operations if not appropriately considered during the design phase. In this chapter, analysis and design methodologies enabled by RRAM physics-based compact models of LIM and mixed-signal BNN inference accelerators are discussed. As a use case example, the UNIMORE RRAM physics-based compact model calibrated on an RRAM technology from the literature, is used to determine the performance vs. reliability trade-offs of different in-memory computing accelerators: i) a logic-in-memory accelerator based on the material implication logic, ii) a mixed-signal BNN accelerator, and iii) a hybrid accelerator enabling both computing paradigms on the same array. Finally, the performance of the three accelerators on a BNN inference task is compared and benchmarked with the state of the art.

2023 - The Major Effect of Trapped Charge on Dielectric Breakdown Dynamics and Lifetime Estimation [Relazione in Atti di Convegno]
Vecchi, Sara; Padovani, Andrea; Pavan, Paolo; Puglisi, Francesco Maria
abstract

2023 - The Role of Defects and Interface Degradation on Ferroelectric HZO Capacitors Aging [Relazione in Atti di Convegno]
Benatti, L.; Vecchi, S.; Pesic, M.; Puglisi, F. M.
abstract

2023 - Ultra-low power logic in memory with commercial grade memristors and FPGA-based smart-IMPLY architecture [Articolo su rivista]
Benatti, L; Zanotti, T; Pavan, P; Puglisi, Fm
abstract

Reducing power consumption in nowadays computer technologies represents an increasingly difficult challenge. Conventional computing architectures suffer from the so-called von Neumann bottleneck (VNB), which consists in the continuous need to exchange data and instructions between the memory and the processing unit, leading to significant and apparently unavoidable power consumption. Even the hardware typically employed to run Artificial Intelligence (AI) algorithms, such as Deep Neural Networks (DNN), suffers from this limitation. A change of paradigm is so needed to comply with the ever-increasing demand for ultra-low power, autonomous, and intelligent systems. From this perspective, emerging memristive non-volatile memories are considered a good candidate to lead this technological transition toward the next-generation hardware platforms, enabling the possibility to store and process information in the same place, therefore bypassing the VNB. To evaluate the state of current public-available devices, in this work commercial-grade packaged Self Directed Channel memristors are thoroughly studied to evaluate their performance in the framework of in-memory computing. Specifically, the operating conditions allowing both analog update of the synaptic weight and stable binary switching are identified, along with the associated issues. To this purpose, a dedicated yet prototypical system based on an FPGA control platform is designed and realized. Then, it is exploited to fully characterize the performance in terms of power consumption of an innovative Smart IMPLY (SIMPLY) Logic-in-Memory (LiM) computing framework that allows reliable in-memory computation of classical Boolean operations. The projection of these results to the nanoseconds regime leads to an estimation of the real potential of this computing paradigm. Although not investigated in this work, the presented platform can also be exploited to test memristor-based SNN and Binarized DNNs (i.e., BNN), that can be combined with LiM to provide the heterogeneous flexible architecture envisioned as the long-term goal for ubiquitous and pervasive AI.

2022 - A Hybrid CMOS-Memristor Spiking Neural Network Supporting Multiple Learning Rules [Articolo su rivista]
Florini, Davide; Gandolfi, Daniela; Mapelli, Jonathan; Benatti, Lorenzo; Pavan, Paolo; Puglisi, Francesco Maria
abstract

Artificial intelligence (AI) is changing the way computing is performed to cope with real-world, ill-defined tasks for which traditional algorithms fail. AI requires significant memory access, thus running into the von Neumann bottleneck when implemented in standard computing platforms. In this respect, low-latency energy-efficient in-memory computing can be achieved by exploiting emerging memristive devices, given their ability to emulate synaptic plasticity, which provides a path to design large-scale brain-inspired spiking neural networks (SNNs). Several plasticity rules have been described in the brain and their coexistence in the same network largely expands the computational capabilities of a given circuit. In this work, starting from the electrical characterization and modeling of the memristor device, we propose a neuro-synaptic architecture that co-integrates in a unique platform with a single type of synaptic device to implement two distinct learning rules, namely, the spike-timing-dependent plasticity (STDP) and the Bienenstock-Cooper-Munro (BCM). This architecture, by exploiting the aforementioned learning rules, successfully addressed two different tasks of unsupervised learning.

2022 - Combining Experiments and a Novel Small Signal Model to Investigate the Degradation Mechanisms in Ferroelectric Tunnel Junctions [Relazione in Atti di Convegno]
Benatti, L.; Pavan, P.; Puglisi, F. M.
abstract

2022 - Comprehensive physics-based RRAM compact model including the effect of variability and multi-level random telegraph noise [Articolo su rivista]
Zanotti, T; Pavan, P; Puglisi, Fm
abstract

Resistive Random Access Memory (RRAM) technologies are a promising candidate for the development of more energy efficient circuits, for computing, security, and storage applications. However, such devices show stochastic behaviours that not only originate from variations introduced during fabrication, but that are intrinsic to their operation. Specifically, cycle-to-cycle variations cause the programmed resistive state to be randomly distributed, while Random Telegraph Noise (RTN) introduces random current fluctuations over time. These phenomena can easily affect the reliability and performance of RRAM-based circuits. Therefore, designing such circuits requires accurate compact models. Although several RRAM compact models have been proposed in the literature, these are rarely implemented following the programming best-practice for improving the simulator convergence, and a compact model that is able to reproduce the device characteristic including thermal effects, RTN, and variability in multiple operating conditions using a single set of parameters is still missing. Also, only a few works in the literature describe the procedure to calibrate such compact models, and even fewer address the calibration of the variability on experimental data. In this work, we extend the UniMORE RRAM physics-based compact model by developing and validating two variability models, (i) a comprehensive variability model which can reproduce the effect of cycle-to-cycle variability in multiple operating conditions, and (ii) a simplified version that requires fewer calibration data and enables to reproduce cycle-to-cycle variations in specific operating conditions. The model is implemented following Verilog-A programming best-practices and validated on data from three RRAM technologies from the literature and experimentally on TiN/Ti/HfOx/TiN devices, and the relation between experimental data and the variability model parameters is described.

2022 - Defects Motion as the Key Source of Random Telegraph Noise Instability in Hafnium Oxide [Relazione in Atti di Convegno]
Vecchi, S.; Pavan, P.; Puglisi, F. M.
abstract

Besides standard two- and multi-level Random Telegraph Noise (RTN), more complex cases of RTN are commonly reported which show peculiar current signal instabilities. The physical origin of such phenomena is typically traced back to the presence of metastable defects states, the Coulomb interaction between traps, and the possible interaction of hydrogen species with oxide defects. However, the effect of the motion of atomic species on RTN phenomena has never been brought to the picture, even though such a mechanism is extremely relevant for oxygen ions in HfO2, e.g., it guarantees resistive switching in HfO2 RRAM. In this paper, we demonstrate that complex RTN signals observed in experiments naturally emerge when considering the combination of the Coulomb field due to the trapped charge at defects together with their field-assisted motion. Strikingly, we demonstrate that multilevel RTN signals with high instability and complex time evolution, which are conventionally though to be caused by an intricate many-bodies problem involving several defects, can in fact result by the

2022 - Editorial: Brain-inspired computing: Neuroscience drives the development of new electronics and artificial intelligence [Articolo su rivista]
Gandolfi, Daniela; Puglisi, Francesco Maria; Serb, Alexander; Giugliano, Michele; Mapelli, Jonathan
abstract

2022 - Effect of cycling on ultra-thin HfZrO4, ferroelectric synaptic weights [Articolo su rivista]
Bégon-Lours, Laura; Halter, Mattia; Sousa, Marilyne; Popoff, Youri; Dávila Pineda, Diana; Falcone, Donato Francesco; Yu, Zhenming; Reidt, Steffen; Benatti, Lorenzo; Puglisi, Francesco Maria; Offrein, Bert Jan
abstract

2022 - Emergence of associative learning in a neuromorphic inference network [Articolo su rivista]
Gandolfi, D.; Puglisi, F. M.; Boiani, G. M.; Pagnoni, G.; Friston, K. J.; D'Angelo, E.; Mapelli, J.
abstract

Objective. In the theoretical framework of predictive coding and active inference, the brain can be viewed as instantiating a rich generative model of the world that predicts incoming sensory data while continuously updating its parameters via minimization of prediction errors. While this theory has been successfully applied to cognitive processes-by modelling the activity of functional neural networks at a mesoscopic scale-the validity of the approach when modelling neurons as an ensemble of inferring agents, in a biologically plausible architecture, remained to be explored.Approach.We modelled a simplified cerebellar circuit with individual neurons acting as Bayesian agents to simulate the classical delayed eyeblink conditioning protocol. Neurons and synapses adjusted their activity to minimize their prediction error, which was used as the network cost function. This cerebellar network was then implemented in hardware by replicating digital neuronal elements via a low-power microcontroller.Main results. Persistent changes of synaptic strength-that mirrored neurophysiological observations-emerged via local (neurocentric) prediction error minimization, leading to the expression of associative learning. The same paradigm was effectively emulated in low-power hardware showing remarkably efficient performance compared to conventional neuromorphic architectures.Significance. These findings show that: (a) an ensemble of free energy minimizing neurons-organized in a biological plausible architecture-can recapitulate functional self-organization observed in nature, such as associative plasticity, and (b) a neuromorphic network of inference units can learn unsupervised tasks without embedding predefined learning rules in the circuit, thus providing a potential avenue to a novel form of brain-inspired artificial intelligence.

2022 - Hardware implementation of a true random number generator integrating a hexagonal boron nitride memristor with a commercial microcontroller [Articolo su rivista]
Pazos, S.; Zheng, W.; Zanotti, T.; Aguirre, F.; Becker, T.; Shen, Y.; Zhu, K.; Yuan, Y.; Wirth, G.; Puglisi, F. M.; Roldan, J. B.; Palumbo, F.; Lanza, M.
abstract

The development of the internet-of-things requires cheap, light, small and reliable true random number generator (TRNG) circuits to encrypt the data-generated by objects or humans-before transmitting them. However, all current solutions consume too much power and require a relatively large battery, hindering the integration of TRNG circuits on most objects. Here we fabricated a TRNG circuit by exploiting stable random telegraph noise (RTN) current signals produced by memristors made of two-dimensional (2D) multi-layered hexagonal boron nitride (h-BN) grown by chemical vapor deposition and coupled with inkjet-printed Ag electrodes. When biased at small constant voltages (<= 70 mV), the Ag/h-BN/Ag memristors exhibit RTN signals with very low power consumption (similar to 5.25 nW) and a relatively high current on/off ratio (similar to 2) for long periods (>1 hour). We constructed TRNG circuits connecting an h-BN memristor to a small, light and cheap commercial microcontroller, producing a highly-stochastic, high-throughput signal (up to 7.8 Mbit s(-1)) even if the RTN at the input gets interrupted for long times up to 20 s, and if the stochasticity of the RTN signal is reduced. Our study presents the first full hardware implementation of 2D-material-based TRNGs, enabled by the unique stability and figures of merit of the RTN signals in h-BN based memristors.

2022 - Impedance Investigation of MIFM Ferroelectric Tunnel Junction using a Comprehensive Small-Signal Model [Articolo su rivista]
Benatti, L.; Puglisi, F. M.
abstract

The urge to develop efficient and ultra-low power architectures for modern and future technological needs lead to an increasing interest and investigation of neuromorphic and ultra-low power computing. In this respect, ferroelectric technology is found to be a perfect candidate to guide this technological transition. Elucidating the physical mechanisms occurring during ferroelectric-based devices operations is fundamental in order to improve the reliability of emerging architectures. In this work, we investigate metal/insulator/ferroelectric/metal (MIFM) ferroelectric tunnel junctions (FTJs) consisting of a ferroelectric hafnium zirconium oxide (HZO) layer and an alumina (Al2O3) layer by means of C-f and G-f measurements performed at multiple voltages and temperatures. For a trustworthy interpretation of the measurements results, an innovative small signal model is introduced that goes beyond the state of the art by i) separating the role played by the leakage in the two layers; ii) including the impact of the series impedance (that depends on the samples layout); iii) including the frequency dependence of the dielectric permittivity; iv) accounting for the fact that not the whole HZO volume crystallizes in the orthorhombic ferroelectric phase. The model correctly reproduces measurements taken on different devices in different conditions. Results highlight that the typical estimation method for interface trap density may be misleading.

2022 - Impedance Spectroscopy of Ferroelectric Capacitors and Ferroelectric Tunnel Junctions [Relazione in Atti di Convegno]
Benatti, L.; Vecchi, S.; Puglisi, F. M.
abstract

Ferroelectric devices are currently considered as a viable option for ultra-low power computing, thanks to their ability to act as memory units and synaptic weights in brain inspired architectures. A common methodology to assess their response in different conditions (especially the role of material composition and charge trapping in ferroelectric switching) is impedance spectroscopy. However, test devices may be affected by the parasitic impedance of the metal lines contacting the electrodes of the device, which may alter the measured response and the results interpretation. In this work, we investigate the frequency response at different voltages of ferroelectric tunnel junction (FTJ) having a metal-dielectric-ferroelectric-metal (MDFM) stack, starting from the analysis of single layer capacitors (MFM and MDM). A simple but reliable method, validated by physics-based simulations, is proposed to estimate and remove the parasitic access impedance contribution, revealing the intrinsic device response. The method is used to quantify the intrinsic device-level variability of FTJs and to highlight for the first time the relation between the thickness of the dielectric layer, the phase composition of the ferroelectric, and the magnitude of the peak in the frequency response, usually thought as related to charge trapping only.

2022 - Memristive technologies for data storage, computation, encryption, and radio-frequency communication [Articolo su rivista]
Lanza, M.; Sebastian, A.; Lu, W. D.; Le Gallo, M.; Chang, M. -F.; Akinwande, D.; Puglisi, F. M.; Alshareef, H. N.; Liu, M.; Roldan, J. B.
abstract

Memristive devices, which combine a resistor with memory functions such that voltage pulses can change their resistance (and hence their memory state) in a nonvolatile manner, are beginning to be implemented in integrated circuits for memory applications. However, memristive devices could have applications in many other technologies, such as non–von Neumann in-memory computing in crossbar arrays, random number generation for data security, and radio-frequency switches for mobile communications. Progress toward the integration of memristive devices in commercial solid-state electronic circuits and other potential applications will depend on performance and reliability challenges that still need to be addressed, as described here.

2022 - Scaled, Ferroelectric Memristive Synapse for Back-End-of-Line Integration with Neuromorphic Hardware [Articolo su rivista]
Begon-Lours, L.; Halter, M.; Puglisi, F. M.; Benatti, L.; Falcone, D. F.; Popoff, Y.; Davila Pineda, D.; Sousa, M.; Offrein, B. J.
abstract

Ohmic, memristive synaptic weights are fabricated with a back-end-of-line compatible process, based on a 3.5 nm HfZrO4 thin film crystallized in the ferroelectric phase at only 400 °C. The current density is increased by three orders of magnitude compared to the state-of-the-art. The use of a metallic oxide interlayer, WOx, allows excellent retention (only 6% decay after 106 s) and endurance (1010 full switching cycles). The On/Off of 7 and the small device-to-device variability (<5%) make them promising candidates for neural networks inference. The synaptic functionality for online learning is also demonstrated: using pulses of increasing (resp. constant) amplitude and constant (resp. increasing) duration, emulating spike-timing (resp. spike-rate) dependent plasticity. Writing with 20 ns pulses only dissipate femtojoules. The cycle-to-cycle variation is below 2%. The training accuracy (MNIST) of a neural network is estimated to reach 92% after 36 epochs. Temperature-dependent experiments reveal the presence of allowed states for charge carriers within the bandgap of hafnium zirconate. Upon polarization switching, the screening of the polarization by mobile charges (that can be associated with oxygen vacancies and/or ions) within the ferroelectric layer modifies the energy profile of the conduction band and the bulk transport properties.

2022 - Self-consistent Automated Parameter Extraction of RRAM Physics-Based Compact Model [Relazione in Atti di Convegno]
Zanotti, Tommaso; Pavan, Paolo; Puglisi, Francesco Maria
abstract

2022 - Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing [Articolo su rivista]
De Rose, R.; Zanotti, T.; Puglisi, F. M.; Crupi, F.; Pavan, P.; Lanuzza, M.
abstract

Smart material implication (SIMPLY) logic has been recently proposed for the design of energy-efficient Logic-in-Memory (LIM) architectures based on non-volatile resistive memory devices. The SIMPLY logic is enabled by adding a comparator to the conventional IMPLY scheme. This allows performing a preliminary READ operation and hence the SET operation only in the case it is actually required. This work explores the SIMPLY logic scheme using nanoscale spin-transfer torque magnetic tunnel junction (STT-MTJ) devices. The performance of the STT-MTJ based SIMPLY architecture is analyzed by varying the load resistor and applied voltages to implement both READ and SET operations, while also investigating the effect of temperature on circuit operation. Obtained results show an existing tradeoff between error rate and energy consumption, which can be effectively managed by properly setting the values of load resistor and applied voltages. In addition, our analysis proves that tracking the temperature dependence of the MTJ properties through a proportional to absolute temperature (PTAT) reference voltage at the input of the comparator is beneficial to mitigate the reliability degradation under temperature variations.

2022 - Spatially Controlled Generation and Probing of Random Telegraph Noise in Metal Nanocrystal Embedded HfO2Using Defect Nanospectroscopy [Articolo su rivista]
Ranjan, A.; Puglisi, F. M.; Molina-Reyes, J.; Pavan, P.; O'Shea, S. J.; Raghavan, N.; Pey, K. L.
abstract

Random telegraph noise (RTN) is often considered a nuisance or, more critically, a key reliability challenge for miniaturized semiconductor devices. However, this picture is gradually changing as recent works have shown emerging applications based on the inherent randomness of the RTN signals in state-of-The-Art technologies, including true random number generator and IoT hardware security. Suitable material platforms and device architectures are now actively explored to bring these technologies from an embryonic stage to practical application. A key challenge is to devise material systems, which can be reliably used for the deterministic creation of localized defects to be used for RTN generation. Toward this goal, we have investigated RTN in Au nanocrystal (Au-NC) embedded HfO2stacks at the nanoscale by combining conduction atomic force microscopy defect spectroscopy and a statistical factorial hidden Markov model analysis. With a voltage applied across the stack, there is an enhanced asymmetric electric field surrounding the Au-NC. This in turn leads to the preferential generation of atomic defects in the HfO2near the Au-NC when voltage is applied to the stack to induce dielectric breakdown. Since RTN arises from various electrostatic interactions between closely spaced atomic defects, the Au-NC HfO2material system exhibits an intrinsic ability to generate RTN signals. Our results also highlight that the spatial confinement of multiple defects and the resulting electrostatic interactions between the defects provides a dynamic environment leading to many complex RTN patterns in addition to the presence of the standard two-level RTN signals. The insights obtained at the nanoscale are useful to optimize metal nanocrystal embedded high-κ stacks and circuits for on-demand generation of RTN for emerging random number applications.

2022 - The Impact of Electrostatic Interactions between Defects on the Characteristics of Random Telegraph Noise [Articolo su rivista]
Vecchi, S.; Pavan, P.; Puglisi, F. M.
abstract

Random telegraph noise (RTN) is one of the most challenging defect-related reliability concerns in emerging HfO2-based devices due to the higher bulk defect density compared to SiO2. Despite many research efforts, the physical mechanisms determining complex signals (e.g., multilevel, anomalous, temporary RTN) are still unclear and need a deeper investigation. With this driving force, we performed physic-based kinetic Monte Carlo (kMC) simulations in a TiN/HfO2/TiN cell to directly analyze the role of defects which promote RTN, both in steady state and transient regime. The nonmonotonic trends of the ratio of the RTN dwell times with the applied bias frequently found in the literature are found to be caused by changes with the applied voltage of the preferential capture/emission source/destination of traps. The in-depth analysis sheds new light on the conventional methods for defect classification and vertical position estimation. Moreover, such source/destination changes also occur over time due to the dynamics of the local electric field, which varies with the evolution of the surrounding electrostatic landscape. Notably, the local field is given by the overlap of the applied voltage and of the trapped charge contributions, the latter being dominant at low voltages. The analysis of the Markov chains of closely spaced defects shown interdependencies and alterations of the RTN capture and emission times. A new method is proposed to include the impact of electrostatic interactions between defects on RTN.

2022 - The Relevance of Trapped Charge for Leakage and Random Telegraph Noise Phenomena [Relazione in Atti di Convegno]
Vecchi, S.; Pavan, P.; Puglisi, F. M.
abstract

The current understanding of key reliability phenomena such as leakage and Random Telegraph Noise (RTN) is still incomplete. Models exist that explain simple cases (2-level RTN), yet experimental reports showed the occurrence of complex cases (e.g., coupled RTN, anomalous and temporary RTN) that deserve deeper investigation. In this paper, we focus on the often overlooked role of trapped charge in the electrostatic coupling among defects, entailing a multi-body problem, and on the related effects on leakage and RTN. The electric field in the dielectric is found to be usually dominated by the trapped charge rather than by the applied voltage, defying common beliefs and elegantly explaining some of the aforesaid complex scenarios. We demonstrate that such defects interactions are responsible for a strong modulation of the capture and emission time constants over time. Moreover, we highlight how defects capture/emission source/destination can change with the local field and therefore with the applied voltage, which gives rise to non-monotonic trends in c/e vs. applied voltage plot. This last point reveals that the classical formula adopted for the estimation of the defects vertical position within the dielectric is oversimplified and may lead to significant errors. The results of this study advance the understanding of leakage and RTN, and can be useful for the design of applications such as low-power Physical Unclonable Functions and True Random Number Generators.

2021 - Advanced Data Encryption using 2D Materials [Articolo su rivista]
Wen, Chao; Li, Xuehua; Zanotti, Tommaso; Puglisi, Francesco Maria; Shi, Yuanyuan; Saiz, Fernan; Antidormi, Aleandro; Roche, Stephan; Zheng, Wenwen; Liang, Xianhu; Hu, Jiaxin; Duhm, Steffen; Roldan, Juan B.; Wu, Tianru; Chen, Victoria; Pop, Eric; Garrido, Blas; Zhu, Kaichen; Hui, Fei; Lanza, Mario
abstract

2021 - Energy-efficient non-von neumann computing architecture supporting multiple computing paradigms for logic and binarized neural networks [Articolo su rivista]
Zanotti, T.; Puglisi, F. M.; Pavan, P.
abstract

Different in-memory computing paradigms enabled by emerging non-volatile memory technologies are promising solutions for the development of ultra-low-power hardware for edge com-puting. Among these, SIMPLY, a smart logic-in-memory architecture, provides high reconfigurability and enables the in-memory computation of both logic operations and binarized neural networks (BNNs) inference. However, operation-specific hardware accelerators can result in better performance for a particular task, such as the analog computation of the multiply and accumulate operation for BNN inference, but lack reconfigurability. Nonetheless, a solution providing the flexibility of SIMPLY while also achieving the high performance of BNN-specific analog hardware accelerators is missing. In this work, we propose a novel in-memory architecture based on 1T1R crossbar arrays, which enables the coexistence on the same crossbar array of both SIMPLY computing paradigm and the analog acceleration of the multiply and accumulate operation for BNN inference. We also highlight the main design tradeoffs and opportunities enabled by different emerging non-volatile memory technologies. Finally, by using a physics-based Resistive Random Access Memory (RRAM) compact model calibrated on data from the literature, we show that the proposed architecture improves the energy delay product by >103 times when performing a BNN inference task with respect to a SIMPLY implementation.

2021 - Low-Bit Precision Neural Network Architecture with High Immunity to Variability and Random Telegraph Noise based on Resistive Memories [Relazione in Atti di Convegno]
Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo
abstract

In-memory computing architectures based on Resistive random access memory technologies (RRAM) are a promising candidate for the development of ultra-low power hardware accelerators that could enable the deployment of deep neural networks inference algorithms on energy constrained devices at the edge of the communication network. However, the study of the reliability of such circuits is non-trivial due to the intrinsic RRAM devices nonlinearity and stochasticity. For instance, RRAM devices are subject not only to device-to-device and cycle-to-cycle resistance variations but also to Random Telegraph Noise which introduces additional time dependent resistance fluctuations that could result in reduced circuit performance. Previous studies exploited simplified statistical models to show that such device nonidealities may reduce the classification accuracy even when binarized neural networks are employed. However, a circuit reliability analysis based on full circuit-level simulations is still missing. In this work, we develop and train a low-bit precision neural network which employs binary weights and 4-bits activations. We further analyze the impact of RRAM nonidealities (e.g., variability and Random Telegraph Noise) on the classification accuracy by means of full circuit-level simulations enabled by a physics-based RRAM compact model, calibrated on experimental data from the literature. Results show that combining binary weights with low-precision activations allows retaining software-level accuracy even in the presence of Random Telegraph Noise and weight variability.

2021 - Mechanisms Underlying the Bidirectional VT Shift After Negative-Bias Temperature Instability Stress in Carbon-Doped Fully Recessed AlGaN/GaN MIS-HEMTs [Articolo su rivista]
Zagni, Nicolo; Cioni, Marcello; Chini, Alessandro; Iucolano, Ferdinando; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

In this brief, we investigate the bidirectional threshold voltage drift (VT) following negative-bias temperature instability (NBTI) stress in carbon-doped fully recessed AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs). Several stress conditions were applied at different: 1) gate biases (VGS,STR); 2) stress times (tSTR); and 3) temperatures (T). Both negative and positive VT (thermally activated with different activation energies, EA) were observed depending on the magnitude of VGS,STR. In accordance with the literature, observed VT < 0 V (EA ≈ 0.5 eV) under moderate stress is attributed to the emission of electrons from oxide and interface traps. Instead, VT > 0 V (EA ≈ 0.9 eV) under high stress is attributed to the increased negatively ionized acceptor trap density in the buffer associated with carbon doping.

2021 - Modeling Nanoscale III–V Channel MOSFETs with the Self-Consistent Multi-Valley/Multi-Subband Monte Carlo Approach [Articolo su rivista]
Caruso, Enrico; Esseni, David; Gnani, Elena; Lizzit, Daniel; Palestri, Pierpaolo; Pin, Alessandro; Puglisi, Francesco Maria; Selmi, Luca; Zagni, Nicolò
abstract

We describe the multi-valley/multi-subband Monte Carlo (MV–MSMC) approach to model nanoscale MOSFETs featuring III–V semiconductors as channel material. This approach describes carrier quantization normal to the channel direction, solving the Schrödinger equation while off-equilibrium transport is captured by the multi-valley/multi-subband Boltzmann transport equation. In this paper, we outline a methodology to include quantum effects along the transport direction (namely, source-to-drain tunneling) and provide model verification by comparison with Non-Equilibrium Green’s Function results for nanoscale MOSFETs with InAs and InGaAs channels. It is then shown how to use the MV–MSMC to calibrate a Technology Computer Aided Design (TCAD) simulation deck based on the drift–diffusion model that allows much faster simulations and opens the doors to variability studies in III–V channel MOSFETs.

2021 - Multi-Input Logic-in-Memory for Ultra-Low Power Non-Von Neumann Computing [Articolo su rivista]
Zanotti, Tommaso; Pavan, Paolo; Puglisi, Francesco Maria
abstract

2021 - On the Modeling of the Donor/Acceptor Compensation Ratio in Carbon‐Doped GaN to Univocally Reproduce Breakdown Voltage and Current Collapse in Lateral GaN Power HEMTs [Articolo su rivista]
Zagni, Nicolo'; Chini, Alessandro; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

The intentional doping of lateral GaN power high electron mobility transistors (HEMTs) with carbon (C) impurities is a common technique to reduce buffer conductivity and increase breakdown voltage. Due to the introduction of trap levels in the GaN bandgap, it is well known that these impurities give rise to dispersion, leading to the so‐called “current collapse” as a collateral effect. Moreover, first‐principles calculations and experimental evidence point out that C introduces trap levels of both acceptor and donor types. Here, we report on the modeling of the donor/acceptor compensation ratio (CR), that is, the ratio between the density of donors and acceptors associated with C doping, to consistently and univocally reproduce experimental breakdown voltage (VBD) and current‐collapse magnitude (ΔICC). By means of calibrated numerical device simulations, we confirm that ΔICC is controlled by the effective trap concentration (i.e., the difference between the acceptor and donor densities), but we show that it is the total trap concentration (i.e., the sum of acceptor and donor densities) that determines VBD, such that a significant CR of at least 50% (depending on the technology) must be assumed to explain both phenomena quantitatively. The results presented in this work contribute to clarifying several previous reports, and are helpful to device engineers interested in modeling C‐doped lateral GaN power HEMTs.

2021 - Optimized Synthesis Method for Ultra-Low Power Multi-Input Material Implication Logic With Emerging Non-Volatile Memories [Articolo su rivista]
Puglisi, F. M.; Zanotti, T.; Pavan, P.
abstract

In this paper, we revisit Boole's expansion theorem to propose a new synthesis method for implication logic circuits based on memristors. By rewriting the sum-of-products form of Boole's expansion theorem in terms that are best suited for the implication logic, we develop a generalized rule to derive the sequence of operations needed to realize any logic function written in the classical AND-OR form. The proposed method leverages on multi-input operation, minimizing both the number of steps required to compute a given Boolean function and the number of memristors involved. Moreover, it allows using well-established methods of logic circuit optimization like binary decision diagrams, Karnaugh maps, and heuristic algorithms, that are already implemented in commercial CAD software. The proposed method allows a fair comparison between the performance of CMOS and implication logic implementations of the same logic function under the same degree of optimization, and is shown to outperform existing approaches. Possible device-circuit co-design strategies to optimize circuit performance are finally discussed.

2021 - Performances and Trade-offs of Low-Bit Precision Neural Networks based on Resistive Memories [Relazione in Atti di Convegno]
Zanotti, T.; Pavan, P.; Puglisi, F. M.
abstract

In this work we devise and train a RRAM-based low-precision neural network with binary weights and 4-bits activations. Full-circuit simulations including the analog neuron peripheral circuitry are run in different conditions, including the effect of RRAM devices nonidealities, to evaluate the reliability and performance of the network when executing a classification task. Results show that the power-throughput trade-off during inference is governed by the neuron circuitry, and that the reset conditions can be tuned to simultaneously maximize energy efficiency and accuracy leading to improved network reliability. Accuracy losses are found to be dominated by the variability of the RRAMs in low resistive state (LRS), which suggests specific strategies for accuracy loss minimization. The network shows excellent performance in terms of accuracy, throughput, and energy efficiency, with robustness to RRAM non-idealities.

2021 - Random Telegraph Noise in Metal-Oxide Memristors for True Random Number Generators: A Materials Study [Articolo su rivista]
Li, X.; Zanotti, T.; Wang, T.; Zhu, K.; Puglisi, F. M.; Lanza, M.
abstract

Some memristors with metal/insulator/metal (MIM) structure have exhibited random telegraph noise (RTN) current signals, which makes them ideal to build true random number generators (TRNG) for advanced data encryption. However, there is still no clear guide on how essential manufacturing parameters like materials selection, thicknesses, deposition methods, and device lateral size can influence the quality of the RTN signal. In this paper, an exhaustive statistical analysis on the quality of the RTN signals produced by different MIM-like memristors is reported, and straightforward guidelines for the fabrication of memristors with enhanced RTN performance are presented, which are: i) Ni and Ti electrodes show better RTN than Au electrodes, ii) the 50 μm × 50 μm devices show better RTN than the 5 μm × 5 μm ones, iii) TiO2 shows better RTN than HfO2 and Al2O3, iv) sputtered-oxides show better RTN than ALD-oxides, and v) 10 nm thick oxides show better RTN than 5 nm thick oxides. The RTN signals recorded have been used as entropy sources in high-throughput TRNG circuits, which have passed the randomness tests of the National Institute of Standards and Technology. The work can serve as a useful guide for materials scientists and electronic engineers when fabricating MIM-like memristors for RTN applications.

2021 - Reliability and Performance Analysis of Logic-in-Memory Based Binarized Neural Networks [Articolo su rivista]
Zanotti, T.; Puglisi, F. M.; Pavan, P.
abstract

Resistive Random access memory (RRAM) devices together with the material implication (IMPLY) logic are a promising computing scheme for realizing energy efficient reconfigurable computing hardware for edge computing applications. This approach has been recently shown to enable the in-memory implementation of Binarized Neural Networks. However, an accurate analysis of the performance achieved on a real classification task are still missing. In this work, we train and estimate the performance of an IMPLY-based implementation of a multilayer perceptron (MLP) BNN and highlight its main reliability challenges by using a physics-based RRAM compact model calibrated on three RRAM technologies from the literature. We then show how the smart IMPLY (SIMPLY) architecture solves the reliability issues of conventional IMPLY architectures and compare its performance with respect to conventional solutions considering different parallelization degree. The worst-case energy estimates for an inference task performed on the trained network, show that the SIMPLY implementation results in a >46 energy-delay-product (EDP) improvement with respect to a conventional low-power embedded system implementation.

2021 - STT-MTJ Based Smart Implication for Energy-Efficient Logic-in-Memory Computing [Articolo su rivista]
De Rose, Raffaele; Zanotti, Tommaso; Maria Puglisi, Francesco; Crupi, Felice; Pavan, Paolo; Lanuzza, Marco
abstract

Spin-transfer torque magnetic tunnel junction (STT-MTJ) technology is an attractive solution for designing non-volatile Logic-in-Memory (LIM) architectures. This work explores a smart material implication (SIMPLY) LIM scheme based on nanoscale STT-MTJs. The SIMPLY architecture is benchmarked against the conventional material implication (IMPLY) logic. Obtained results prove that for similar performance the STT-MTJ based SIMPLY scheme ensures more reliable operation (i.e., lower error rate by more than three orders of magnitude) and an energy saving of -70% than its IMPLY counterpart, at the only cost of minimal area overhead.

2021 - Standards for the Characterization of Endurance in Resistive Switching Devices [Articolo su rivista]
Lanza, M.; Waser, R.; Ielmini, D.; Yang, J. J.; Goux, L.; Sune, J.; Kenyon, A. J.; Mehonic, A.; Spiga, S.; Rana, V.; Wiefels, S.; Menzel, S.; Valov, I.; Villena, M. A.; Miranda, E.; Jing, X.; Campabadal, F.; Gonzalez, M. B.; Aguirre, F.; Palumbo, F.; Zhu, K.; Roldan, J. B.; Puglisi, F. M.; Larcher, L.; Hou, T. -H.; Prodromakis, T.; Yang, Y.; Huang, P.; Wan, T.; Chai, Y.; Pey, K. L.; Raghavan, N.; Duenas, S.; Wang, T.; Xia, Q.; Pazos, S.
abstract

Resistive switching (RS) devices are emerging electronic components that could have applications in multiple types of integrated circuits, including electronic memories, true random number generators, radiofrequency switches, neuromorphic vision sensors, and artificial neural networks. The main factor hindering the massive employment of RS devices in commercial circuits is related to variability and reliability issues, which are usually evaluated through switching endurance tests. However, we note that most studies that claimed high endurances >106 cycles were based on resistance versus cycle plots that contain very few data points (in many cases even <20), and which are collected in only one device. We recommend not to use such a characterization method because it is highly inaccurate and unreliable (i.e., it cannot reliably demonstrate that the device effectively switches in every cycle and it ignores cycle-to-cycle and device-to-device variability). This has created a blurry vision of the real performance of RS devices and in many cases has exaggerated their potential. This article proposes and describes a method for the correct characterization of switching endurance in RS devices; this method aims to construct endurance plots showing one data point per cycle and resistive state and combine data from multiple devices. Adopting this recommended method should result in more reliable literature in the field of RS technologies, which should accelerate their integration in commercial products.

2021 - Understanding the Reliability of Ferroelectric Tunnel Junction Operations using an Advanced Small-Signal Model [Relazione in Atti di Convegno]
Benatti, Lorenzo; Puglisi, Francesco Maria
abstract

Ferroelectric technology is becoming ever more appealing for a variety of applications, especially analog neuromorphic computing. In this respect, elucidating the physical mechanisms occurring during device operation is of key importance to improve the reliability of ferroelectric devices. In this work, we investigate ferroelectric tunnel junctions (FTJs) consisting of a ferroelectric hafnium zirconium oxide (HZO) layer and an alumina (Al 2 O 3 ) layer by means of C-f and G-f measurements performed at multiple voltages and temperatures. For a dependable interpretation of the results, a new small signal model is introduced that goes beyond the state of the art by i) separating the role of the leakage in the two layers; ii) including the significant impact of the series impedance (that depends on the samples layout); iii) including the frequency dependence of the dielectric permittivity; iv) accounting for the fact that likely not the whole HZO volume crystallizes in the orthorhombic ferroelectric phase. The model correctly reproduces measurements taken on different devices in different conditions. Results highlight that the typical estimation method for interface trap density may be misleading.

2021 - “Hole Redistribution” Model Explaining the Thermally Activated RON Stress/Recovery Transients in Carbon-Doped AlGaN/GaN Power MIS-HEMTs [Articolo su rivista]
Zagni, Nicolo'; Chini, Alessandro; Puglisi, Francesco Maria; Meneghini, Matteo; Meneghesso, Gaudenzio; Zanoni, Enrico; Pavan, Paolo; Verzellesi, Giovanni
abstract

RON degradation due to stress in GaN-based power devices is a critical issue that limits, among other effects, long-term stable operation. Here, by means of 2-D device simulations, we show that the RON increase and decrease during stress and recovery experiments in carbon-doped AlGaN/GaN power metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) can be explained with a model based on the emission, redistribution, and retrapping of holes within the carbon-doped buffer (“hole redistribution” in short). By comparing simulation results with front- and back-gating OFF-state stress experiments, we provide an explanation for the puzzling observation of both stress and recovery transients being thermally activated with the same activation energy of about 0.9 eV. This finds a straightforward justification in a model in which both RON degradation and recovery processes are limited by hole emission by dominant carbon-related acceptors that are energetically located at about 0.9 eV from the GaN valence band.

2020 - Characterization and TCAD Modeling of Mixed-Mode Stress Induced by Impact Ionization in Scaled SiGe HBTs [Articolo su rivista]
Zagni, Nicolo; Puglisi, Francesco Maria; Verzellesi, Giovanni; Pavan, Paolo
abstract

We investigate the reliability of state-of-the-art SiGe heterojunction bipolar transistors (HBTs) in 55-nm technology under mixed-mode stress. We perform electrical characterization and implement a TCAD model calibrated on the measurement data to describe the increased base current degradation at different collector-base voltages. We introduce a simple and self-consistent simulation methodology that links the observed degradation trend to interface traps generation at the emitter/base spacer oxide ascribed to hot holes generated by impact ionization (II) in the collector/base depletion region. This effectively circumvents the limitations of commercial TCAD tools that do not allow II to be the driving force of the degradation. The approach accounts for self-heating and electric fields distribution allowing to reproduce measurement data including the deviation from the power-law behavior.

2020 - Circuit Reliability Analysis of In-Memory Inference in Binarized Neural Networks [Relazione in Atti di Convegno]
Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo
abstract

2020 - Circuit Reliability Analysis of RRAM-based Logic-in-Memory Crossbar Architectures Including Line Parasitic Effects, Variability, and Random Telegraph Noise [Relazione in Atti di Convegno]
Zanotti, T.; Puglisi, F. M.; Pavan, P.
abstract

The Logic-in-Memory paradigm is considered a promising solution for improving the energy efficiency and computing power of architectures aimed at low power and/or data-intensive applications. Among in-memory computing enabling technologies, emerging non-volatile memories (e.g., RRAMs) are promising as they offer BEOL integration and small feature size. Several studies have shown that IMPLY architectures based on RRAM devices and the material implication logic enable the efficient computation of logic operations using the RRAM device both as storing and computing element. However, RRAM devices non-idealities introduce important circuit reliability issues, that are frequently neglected, thus undermining the circuit functionality. In this work, we use a physics-based compact model calibrated on experimental data to simulate the IMPLY operation performed on a crossbar array including line parasitic effects and RRAM devices non-idealities. We then introduce a novel smart scheme, SIMPLY, and show the circuit reliability improvement.

2020 - Electroforming in Metal-Oxide Memristive Synapses [Articolo su rivista]
Wang, T.; Shi, Y.; Puglisi, F. M.; Chen, S.; Zhu, K.; Zuo, Y.; Li, X.; Jing, X.; Han, T.; Guo, B.; Bukvisova, K.; Kachtik, L.; Kolibal, M.; Wen, C.; Lanza, M.
abstract

Memristors have shown an extraordinary potential to emulate the plastic and dynamic electrical behaviors of biological synapses and have been already used to construct neuromorphic systems with in-memory computing and unsupervised learning capabilities; moreover, the small size and simple fabrication process of memristors make them ideal candidates for ultradense configurations. So far, the properties of memristive electronic synapses (i.e., potentiation/depression, relaxation, linearity) have been extensively analyzed by several groups. However, the dynamics of electroforming in memristive devices, which defines the position, size, shape, and chemical composition of the conductive nanofilaments across the device, has not been analyzed in depth. By applying ramped voltage stress (RVS), constant voltage stress (CVS), and pulsed voltage stress (PVS), we found that electroforming is highly affected by the biasing methods applied. We also found that the technique used to deposit the oxide, the chemical composition of the adjacent metal electrodes, and the polarity of the electrical stimuli applied have important effects on the dynamics of the electroforming process and in subsequent post-electroforming bipolar resistive switching. This work should be of interest to designers of memristive neuromorphic systems and could open the door for the implementation of new bioinspired functionalities into memristive neuromorphic systems.

2020 - Noise in resistive random access memory devices [Capitolo/Saggio]
Puglisi, F. M.
abstract

2020 - Reconfigurable Smart In-Memory Computing Platform Supporting Logic and Binarized Neural Networks for Low-Power Edge Devices [Articolo su rivista]
Zanotti, T.; Puglisi, F. M.; Pavan, P.
abstract

Edge computing has been shown to be a promising solution that could relax the burden imposed onto the network infrastructure by the increasing amount of data produced by smart devices. However, reconfigurable ultra-low power computing architectures are needed. RRAM devices together with the material implication logic (IMPLY) are a promising solution for the development of low-power reconfigurable logic-in-memory (LiM) hardware. Nevertheless, traditional approaches suffer from several issues introduced by the circuit topology and device non-idealities. Recently, SIMPLY, a smart LiM architecture based on the IMPLY, has been proposed and shown to solve the common issues of traditional architectures. Here, we use a physics-based RRAM compact model calibrated on three RRAM technologies to further analyze the performance of SIMPLY in typical operating conditions, when the repeated execution of logic operation on the same group of devices is considered. The results show that, compared to the conventional IMPLY architecture, SIMPLY spares more than 40% of the high voltage pulses on average even when complex operations are considered (e.g., the 1-bit half adder). We also show how SIMPLY can implement the set of operations required for the implementation of Binarized Neural Networks (BNN) and benchmark its performance against other memristor-based BNN in-memory accelerator from the literature. The results suggest that our approach is more than two orders of magnitude efficient compared to the state of the art reconfigurable in-memory computing approach and could potentially reach the performance of specialized BNN analog hardware accelerators with appropriate device-circuit co-design strategies.

2020 - Reliability of Logic-in-Memory Circuits in Resistive Memory Arrays [Articolo su rivista]
Zanotti, T.; Zambelli, C.; Puglisi, F. M.; Milo, V.; Perez, E.; Mahadevaiah, M. K.; Ossorio, O. G.; Wenger, C.; Pavan, P.; Olivo, P.; Ielmini, D.
abstract

Logic-in-memory (LiM) circuits based on resistive random access memory (RRAM) devices and the material implication logic are promising candidates for the development of low-power computing devices that could fulfill the growing demand of distributed computing systems. However, these circuits are affected by many reliability challenges that arise from device nonidealities (e.g., variability) and the characteristics of the employed circuit architecture. Thus, an accurate investigation of the variability at the array level is needed to evaluate the reliability and performance of such circuit architectures. In this work, we explore the reliability and performance of smart IMPLY (SIMPLY) (i.e., a recently proposed LiM architecture with improved reliability and performance) on two 4-kb RRAM arrays based on different resistive switching oxides integrated in the back end of line (BEOL) of the 0.25-μm BiCMOS process. We analyze the tradeoff between reliability and energy consumption of SIMPLY architecture by exploiting the results of an extensive array-level variability characterization of the two technologies. Finally, we study the worst case performance of a full adder implemented with the SIMPLY architecture and benchmark it on the analogous CMOS implementation.

2020 - Reliability-Aware Design Strategies for Stateful Logic-in-Memory Architectures [Articolo su rivista]
Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo
abstract

2020 - Smart Logic-in-Memory Architecture For Ultra-Low Power Large Fan-In Operations [Relazione in Atti di Convegno]
Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo
abstract

The need for processing the continuously growing amount of data that is produced every day is promoting research for the development of energy-efficient non-von Neumann computing architectures. Over the last decade, resistive RAM (RRAM) devices together with material implication logic (IMPLY) were proposed as a promising solution for the development of low-power logic-in-memory (LIM) circuits. Still, the high design complexity and the low reliability of these circuits are hindering their practical realization. It is only recently that a new smart IMPLY architecture, named SIMPLY, was proposed and shown to drastically improve circuit reliability and energy efficiency of IMPLY-based LIM circuits. In this work, we introduce a new smart operation, called sFALSE, enabled by the SIMPLY architecture, and verify its feasibility using a physics-based RRAM compact model calibrated on three different technologies. We highlight the significant advantage of the proposed solution vs. ordinary IMPLY architecture in terms of energy reduction, especially for large fan-in logic operations (e.g., n-bits NAND and EXOR).

2020 - Smart Logic-in-Memory Architecture for Low-Power non-von Neumann Computing [Articolo su rivista]
Zanotti, Tommaso; Puglisi, Francesco Maria; Pavan, Paolo
abstract

Low-power smart devices are becoming pervasive in our world. Thus, relevant research efforts are directed to the development of innovative low power computing solutions that enable in-memory computations of logic-operations, thus avoiding the von Neumann bottleneck, i.e., the known showstopper of traditional computing architectures. Emerging non-volatile memory technologies, in particular Resistive Random Access memories, have been shown to be particularly suitable to implement logic-in-memory (LIM) circuits based on the material implication logic (IMPLY). However, RRAM devices nonidealities, logic state degradation, and a narrow design space limit the adoption of this logic scheme. In this work, we use a physics-based compact model to study an innovative smart IMPLY (SIMPLY) logic scheme which exploits the peripheral circuitry embedded in ordinary IMPLY architectures to solve the mentioned reliability issues, drastically reducing the energy consumption and setting clear design strategies. We then use SIMPLY to implement a 1-bit full adder and compare the results with other LIM solutions proposed in the literature.

2020 - Systematic Modeling of Electrostatics, Transport, and Statistical Variability Effects of Interface Traps in End-Of-The-Roadmap III-V MOSFETs [Articolo su rivista]
Zagni, Nicolò; Caruso, Enrico; Puglisi, Francesco Maria; Pavan, Paolo; Palestri, Pierpaolo; Verzellesi, Giovanni
abstract

Thanks to their superior transport properties, Indium Gallium Arsenide (InGaAs) Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) constitute an alternative to conventional Silicon MOSFETs for digital applications at ultra-scaled nodes. The successful integration of this technology is challenged mainly by the high defect density in the gate oxide and at the interface with the semiconductor channel, which degrades the electrostatics and could limit the potential benefits over Si. In this work, we i) establish a systematic modeling approach to evaluate the performance degradation due to interface traps in terms of electrostatics and transport of InGaAs Dual-Gate Ultra-Thin Body (DG-UTB) FETs, and ii) investigate the effects of random interface-trap concentration as another roadblock to the scaling of the technology, due to statistical variability of the threshold voltage. Variability is assessed with a Technology CAD (TCAD) simulator calibrated against Multi-Subband Monte Carlo (MSMC) simulations. The modeling approach overcomes the TCAD limitations when dealing with ultra-thin channels (i.e., below 5 nm) without altering crucial geometrical parameters that would compromise the dependability of the variability analysis. Our results indicate that interface-trap fluctuation becomes comparable with the other variability sources dominating the total variability when shrinking the device dimensions, thus contrasting the trend of reduced variability with scaling. This in turn implies that interface and border traps may strongly limit the benefits of InGaAs over Silicon if not effectively reduced by gate process optimization.

2020 - The Role of Carbon Doping on Breakdown, Current Collapse and Dynamic On-Resistance Recovery in AlGaN/GaN High Electron Mobility Transistors on Semi‐Insulating SiC Substrates [Articolo su rivista]
Zagni, Nicolò; Chini, Alessandro; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

In this work, the critical role of carbon doping in the electrical behavior of AlGaN/GaN High Electron Mobility Transistors (HEMTs) on semi-insulating SiC substrates is assessed by investigating the off-state three terminal breakdown, current collapse and dynamic on-resistance recovery at high drain-source voltages. Extensive device simulations of typical GaN HEMT structures are carried out and compared to experimental data from published, state-of-the-art technologies to: i) explain the slope of the breakdown voltage as a function of the gate-to-drain spacing lower than GaN critical electric field as a result of the non-uniform electrical field distribution in the gate-drain access region; ii) attribute the drain current collapse to trapping in deep acceptor states in the buffer associated with carbon doping; iii) interpret the partial dynamic on-resistance recovery after off-state stress at high drain-source voltages as a consequence of hole generation and trapping.

2020 - The effects of carbon on the bidirectional threshold voltage instabilities induced by negative gate bias stress in GaN MIS-HEMTs [Articolo su rivista]
Zagni, Nicolò; Chini, Alessandro; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

In this paper, numerical device simulations are used to point out the possible contributions of carbon doping to the threshold voltage instabilities induced by negative gate bias stress in AlGaN/GaN metal–insulator–semiconductor high-electron mobility transistors. It is suggested that carbon can have a role in both negative and positive threshold voltage shifts, as a result of (1) the changes in the total negative charge stored in the carbon-related acceptor traps in the GaN buffer, and (2) the attraction of carbon-related free holes to the device surface and their capture into interface traps or recombination with gate-injected electrons. For a proper device optimization of carbon-doped MIS-HEMTs, it is therefore important to take these mechanisms into account, in addition to those related to defects in the gate dielectric volume and interface which are conventionally held responsible for threshold voltage instabilities.

2020 - Trap Dynamics Model Explaining the RON Stress/Recovery Behavior in Carbon-Doped Power AlGaN/GaN MOS-HEMTs [Relazione in Atti di Convegno]
Zagni, Nicolo; Chini, Alessandro; Puglisi, Francesco Maria; Pavan, Paolo; Meneghini, Matteo; Meneghesso, Gaudenzio; Zanoni, Enrico; Verzellesi, Giovanni
abstract

In this paper, we present simulation results that reproduce stress and recovery experiments in Carbon-doped power GaN MOS-HEMTs and explain the associated R ON increase and decrease as the result of the emission, redistribution and re-trapping of holes within the Carbon-doped buffer. The proposed model can straightforwardly clarify the beneficial impact of the recently proposed p-type drain contact on R ON degradation as being a consequence of enhanced hole trapping and reduced negative trapped charge within the buffer during stress.

2019 - Advanced modeling and characterization techniques for innovative memory devices: The RRAM case [Capitolo/Saggio]
Puglisi, Francesco Maria; Padovani, Andrea; Pavan, Paolo; Larcher, Luca
abstract

2019 - Boron Vacancies Causing Breakdown in 2D Layered Hexagonal Boron Nitride Dielectrics [Articolo su rivista]
Ranjan, A.; Raghavan, N.; Puglisi, F. M.; Mei, S.; Padovani, A.; Larcher, L.; Shubhakar, K.; Pavan, P.; Bosman, M.; Zhang, X. X.; O'Shea, S. J.; Pey, K. L.
abstract

Dielectric breakdown in 2D insulating films for future logic device technology is not well understood yet, in contrast to the extensive insight we have in the breakdown of bulk dielectric films, such as HfO2 and SiO2. In this letter, we investigate the stochastic nature of breakdown (BD) in hexagonal boron nitride (h-BN) films using ramp voltage stress and examine the BD trends as a function of stress polarity, area, and temperature. We present evidence that points to a non-Weibull distribution for h-BN BD and use the multi-scale physics-based simulations to extract the energetics of the defects that are precursors to BD, which happens to be boron vacancies.

2019 - Chemical vapor deposition of hexagonal boron nitride on metal-coated wafers and transfer-free fabrication of resistive switching devices [Articolo su rivista]
Jing, X.; Puglisi, F.; Akinwande, D.; Lanza, M.
abstract

Due to their outstanding electronic and physical properties, two-dimensional (2D) materials have attracted much interest for the fabrication of solid-state microelectronic devices. Among all methods to synthesize 2D materials, chemical vapor deposition (CVD) is the most attractive in the field of solid-state microelectronics because it can produce high quality 2D material in a scalable manner. However, the high temperatures (>900C) required during the CVD growth of the 2D materials impede their direct synthesis on metal-coated wafers due to prohibitive metal diffusion and de-wetting. This makes necessary carrying out the 2D materials CVD growth independently on metallic foils, and transfer them on the wafers using polymer scaffolds. However, this process is slower, more expensive, and can lead to abundant contamination and cracks in the 2D material. Here we present a facile method to allow the direct growth of multilayer hexagonal boron nitride (h-BN) on Ni-coated Si wafers, which consists on placing a protective cover 30 μm above the Ni surface. The resulting h-BN stacks have been used to fabricate Au/Ti/h-BN/Ni memristors with low cycle-To-cycle variability. This work contributes to the integration of 2D materials in solid-state micro-and nano-electronic technologies.

2019 - Circuit reliability of low-power rram-based logic-in-memory architectures [Relazione in Atti di Convegno]
Zanotti, T.; Puglisi, F. M.; Pavan, P.
abstract

Logic circuits based on Resistive RAM (RRAM) devices and the material implication logic (IMPLY) are promising solutions for low-power logic-in-memory (LiM) architectures. Still, their diffusion is limited by their high design complexity resulting from device and circuit non-idealities. These non-idealities are usually overlooked in the design phase when using simplified RRAM models, thus leading to unreliable designs. In this work, we derive correct design strategies for reliability of RRAM-based LiM circuits and quantitatively evaluate circuit performances using a physics-based compact model.

2019 - Effects of mole fraction variations and scaling on total variability in InGaAs MOSFETs [Articolo su rivista]
Zagni, N.; Puglisi, F. M.; Pavan, P.; Verzellesi, G.
abstract

Variability is one of the major roadblocks for III-V semiconductors in nanoscale devices, according to the recent International Roadmap for Devices and Systems (IRDS). A particular concern is the detrimental effect of variability of threshold voltage due to channel compositional variations. In this paper, we investigate the impact of this variability source and the effects of scaling on the performance of Dual-Gate-Ultra-Thin-Body (DG-UTB) In0.53Ga0.47As MOSFETs. We model mole fraction variations in terms of the Indium content by taking into account the spatial inhomogeneity of the channel and the corresponding bandgap variations, analyzing the effects on threshold voltage variability. We thus define a variability source, i.e., Band Gap Fluctuation (BGF), and we compare the associated variability with the ones from other important sources, namely, Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (B-LER and G-LER). We then define three corner cases for mole fraction variations to determine worst-case variability. Finally, the impact of scaling on variability is assessed by comparing results for two technology nodes on the linear and saturation threshold voltage, V-T,V-lin,V- V-T,V-sat, on-current, I-ON, leakage current, I-OFF, and linear and saturation sub-threshold slope, SS. We find that although scaling has no impact on BGF-induced V-T variability, it increases the total V-T, lin variability as well as that for I-ON and I-OFF.

2019 - IIRW 2019 Discussion Group II: Reliability for Aerospace Applications [Relazione in Atti di Convegno]
Scharlotta, J. -Y.; Kotov, A.; Zambelli, C.; Guarin, F.; Puglisi, F. M.; Ostermaier, C.; Bersuker, G.; Tyagnoy, S.; Young, C.; Haase, G.; Rzepa, G.; Waltl, M.; Chohan, T.; Iyer, S.
abstract

2019 - Insights into the off-state breakdown mechanisms in power GaN HEMTs [Articolo su rivista]
Zagni, Nicolo'; Puglisi, F. M.; Pavan, P.; Chini, A.; Verzellesi, G.
abstract

We analyze the off-state, three-terminal, lateral breakdown in AlGaN/GaN HEMTs for power switching applications by comparing two-dimensional numerical device simulations with experimental data from device structures with different gate-to-drain spacing and with either undoped or Carbon-doped GaN buffer layer. Our simulations reproduce the different breakdown-voltage dependence on the gate-drain-spacing exhibited by the two types of device and attribute the breakdown to: i) a combination of gate electron injection and source-drain punch-through in the undoped HEMTs; and ii) avalanche generation triggered by gate electron injection in the C-doped HEMTs.

2019 - METODO DI LETTURA PER CIRCUITI DEL TIPO LOGIC-IN-MEMORY E RELATIVA ARCHITETTURA CIRCUITALE [Brevetto]
Puglisi, Francesco Maria; Pavan, Paolo; Zanotti, Tommaso
abstract

2019 - Mixed-Mode Stress in Silicon-Germanium Heterostructure Bipolar Transistors: Insights from Experiments and Simulations [Articolo su rivista]
Puglisi, F. M.; Larcher, L.; Pavan, P.
abstract

Recently, a wide class of market segments (e.g., health, material science, security, and communications) is tackled by circuits fabricated in BiCMOS technology, integrating silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) and passives. Currently, the reliability of SiGe HBT devices is a major concern, and much attention is given to self-heating (SH), that limits device performance and regulates their degradation during stress. Moreover, its relevance is supposed to increase with device scaling. In this paper, we explore the reliability issues of SiGe HBTs by combining dedicated experiments and TCAD simulations. We develop and calibrate a TCAD model that is then used to investigate SH effects in both operating and stress conditions. Results show the important role played by the back-end-of-line (BEOL) and by the substrate thermal resistance in dissipating the heat generated by impact ionization. The location at which defects are generated during stress and the microscopic properties of the defects are determined experimentally by means of dedicated noise measurements. Including defects in the TCAD model allows reproducing the degradation observed in stress experiments. Simulations of the SH effects on a stressed device in measurement conditions revealed the presence of a hole hot spot that suggests a possible physical mechanism involved in the degradation slowdown at long stress times reported in the literature.

2019 - Multiscale modeling for application-oriented optimization of resistive random-access memory [Articolo su rivista]
La Torraca, P.; Puglisi, F. M.; Padovani, A.; Larcher, L.
abstract

Memristor-based neuromorphic systems have been proposed as a promising alternative to von Neumann computing architectures, which are currently challenged by the ever-increasing computational power required by modern artificial intelligence (AI) algorithms. The design and optimization of memristive devices for specific AI applications is thus of paramount importance, but still extremely complex, as many dierent physical mechanisms and their interactions have to be accounted for, which are, in many cases, not fully understood. The high complexity of the physical mechanisms involved and their partial comprehension are currently hampering the development of memristive devices and preventing their optimization. In this work, we tackle the application-oriented optimization of Resistive Random-Access Memory (RRAM) devices using a multiscale modeling platform. The considered platform includes all the involved physical mechanisms (i.e., charge transport and trapping, and ion generation, diusion, and recombination) and accounts for the 3D electric and temperature field in the device. Thanks to its multiscale nature, the modeling platform allows RRAM devices to be simulated and the microscopic physical mechanisms involved to be investigated, the device performance to be connected to the material's microscopic properties and geometries, the device electrical characteristics to be predicted, the effect of the forming conditions (i.e., temperature, compliance current, and voltage stress) on the device's performance and variability to be evaluated, the analog resistance switching to be optimized, and the device's reliability and failure causes to be investigated. The discussion of the presented simulation results provides useful insights for supporting the application-oriented optimization of RRAM technology according to specific AI applications, for the implementation of either non-volatile memories, deep neural networks, or spiking neural networks.

2019 - Recommended Methods to Study Resistive Switching Devices [Articolo su rivista]
Lanza, Mario; Wong, H. -S. Philip; Pop, Eric; Ielmini, Daniele; Strukov, Dimitri; Regan, Brian C.; Larcher, Luca; Villena, Marco A.; Yang, J. Joshua; Goux, Ludovic; Belmonte, Attilio; Yang, Yuchao; Puglisi, Francesco M.; Kang, Jinfeng; Magyari-Köpe, Blanka; Yalon, Eilam; Kenyon, Anthony; Buckwell, Mark; Mehonic, Adnan; Shluger, Alexander; Li, Haitong; Hou, Tuo-Hung; Hudec, Boris; Akinwande, Deji; Ge, Ruijing; Ambrogio, Stefano; Roldan, Juan B.; Miranda Castellano, Enrique Alberto; Suñe, Jordi; Pey, Kin Leong; Wu, Xing; Raghavan, Nagarajan; Wu, Ernest; Lu, Wei D.; Navarro, Gabriele; Zhang, Weidong; Wu, Huaqiang; Li, Runwei; Holleitner, Alexander; Wurstbauer, Ursula; Lemme, Max C.; Liu, Ming; Long, Shibing; Liu, Qi; Lv, Hangbing; Padovani, Andrea; Pavan, Paolo; Valov, Ilia; Jing, Xu; Han, Tingting; Zhu, Kaichen; Chen, Shaochuan; Hui, Fei; Shi, Yuanyuan
abstract

Resistive switching (RS) is an interesting property shown by some materials systems that, especially during the last decade, has gained a lot of interest for the fabrication of electronic devices, with electronic nonvolatile memories being those that have received the most attention. The presence and quality of the RS phenomenon in a materials system can be studied using different prototype cells, performing different experiments, displaying different figures of merit, and developing different computational analyses. Therefore, the real usefulness and impact of the findings presented in each study for the RS technology will be also different. This manuscript describes the most recommendable methodologies for the fabrication, characterization, and simulation of RS devices, as well as the proper methods to display the data obtained. The idea is to help the scientific community to evaluate the real usefulness and impact of an RS study for the development of RS technology.

2019 - SIMPLY: Design of a RRAM-Based Smart Logic-in-Memory Architecture using RRAM Compact Model [Relazione in Atti di Convegno]
Puglisi, F. M.; Zanotti, T.; Pavan, P.
abstract

In this work, we introduce a new RRAM-based Smart IMPLY (SIMPLY) logic scheme with unique benefits for low-power systems and verify its feasibility and advantages by means of circuit simulations allowing appropriate device/circuit requirements co-design. Differently from previous works, we use a physics-based compact model of RRAM devices able to reproduce both the ultrafast AC and the DC behavior, accounting for the intrinsic variability of the resistive states, the occurrence of Random Telegraph Noise, and the logic state degradation. The proposed scheme strongly alleviates the issue of logic state degradation, breaks the trade-off between the choice of VSET and VCOND, and allows saving energy up to a factor of ~230 requiring minimum area overhead.

2019 - Understanding current instabilities in conductive atomic force microscopy [Articolo su rivista]
Jiang, Lanlan; Weber, Jonas; Puglisi, Francesco Maria; Pavan, Paolo; Larcher, Luca; Frammelsberger, Werner; Benstetter, Guenther; Lanza, Mario
abstract

Conductive atomic force microscopy (CAFM) is one of the most powerful techniques in studying the electrical properties of various materials at the nanoscale. However, understanding current fluctuations within one study (due to degradation of the probe tips) and from one study to another (due to the use of probe tips with different characteristics), are still two major problems that may drive CAFM researchers to extract wrong conclusions. In this manuscript, these two issues are statistically analyzed by collecting experimental CAFM data and processing them using two different computational models. Our study indicates that: (i) before their complete degradation, CAFM tips show a stable state with degraded conductance, which is difficult to detect and it requires CAFM tip conductivity characterization before and after the CAFM experiments; and (ii) CAFM tips with low spring constants may unavoidably lead to the presence of a ~1.2 nm thick water film at the tip/sample junction, even if the maximum contact force allowed by the setup is applied. These two phenomena can easily drive CAFM users to overestimate the properties of the samples under test (e.g., oxide thickness). Our study can help researchers to better understand the current shifts that were observed during their CAFM experiments, as well as which probe tip to use and how it degrades. Ultimately, this work may contribute to enhancing the reliability of CAFM investigations.

2019 - Unimore Resistive Random Access Memory (RRAM) Verilog-A Model 1.0.0 [Software]
Puglisi, Francesco Maria; Zanotti, Tommaso; Pavan, Paolo
abstract

The Unimore RRAM Verilog-A model is a physics-based compact model of bipolar RRAM which includes cycle-to-cycle variability, thermal effects, self-heating, and multilevel Random Telegraph Noise (RTN). The model considers both the quasi-ohmic charge transport along the conductive filament and the trap-assisted tunneling transport in the dielectric barrier. The reset/set operations dynamics is modeled with differential equations considering the field-driven oxygen ions drift and recombination during reset (i.e., barrier growth), and the field accelerated bond breakage during set (i.e., barrier collapse). The temperature dynamics is, likewise, modeled with differential equations that enable accurate predictions also when using very short pulses. Thus, the model enables the advanced design of circuits for many applications such as Memory, Neuromorphic Circuits, RRAM-based Neural Networks, Logic-In-Memory Systems, Physical Unclonable Functions, True Random Number Generators and others.

2018 - Coexistence of volatile and non-volatile resistive switching in 2D h-BN based electronic synapses [Relazione in Atti di Convegno]
Shi, Y.; Pan, C.; Chen, V.; Raghavan, N.; Pey, K. L.; Puglisi, F. M.; Pop, E.; Wong, H. -S. P.; Lanza, M.
abstract

We present the first fabrication of electronic synapses using two dimensional (2D) hexagonal boron nitride (/j-BN) as active switching layer. The main advantage of these devices compared to the transition metal oxide (TMO) based counterparts is that multilayer h-BN stacks show both volatile and non-volatile resistive switching (RS) depending on the programming stresses applied, which allows implementing short-term (STP) and long-term plasticity (LTP) rules using a single device and without the need of complex architectures.

2018 - Energy-efficient logic-in-memory I-bit full adder enabled by a physics-based RRAM compact model [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pacchioni, Lorenzo; Zagni, Nicolo; Pavan, Paolo
abstract

In this work, we explore the RRAM-based IMPLY logic by means of circuit simulations. Differently from previous works, we use a physics-based compact model of RRAM devices able to reproduce both the AC and the DC behavior, accounting for the intrinsic variability of the resistive states and the logic state degradation. A new implementation of a 1-bit full adder with unique properties for low-power circuits is proposed, and its performance in terms of energy consumption and execution time is evaluated by simulations. Results are compared against recent experiments, demonstrating a good agreement and indicating the direction for further improvement.

2018 - Extracting Atomic Defect Properties From Leakage Current Temperature Dependence [Articolo su rivista]
Larcher, Luca; Padovani, Andrea; Puglisi, Francesco Maria; Pavan, Paolo
abstract

In modern electronic devices, a variety of novel materials have been introduced such as transition metal oxides, chalcogenides, ferroelectric, and magnetic materials. The electrical response of such materials, used also as active layers, is strongly affected by atomic defects, which affect device performances, variability, and reliability. Extracting the defect properties (i.e., density, energy, and atomic nature) is, thus, crucial to both engineer the performances of electron devices and correctly project their scaling potential and reliability. In this paper, we propose a simple method to extract the atomic properties of defects from the thermal activation energy of the leakage current using a charge trapping relaxation model.

2018 - On the impact of channel compositional variations on total threshold voltage variability in nanoscale InGaAs MOSFETs [Relazione in Atti di Convegno]
Zagni, Nicolo; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

In this paper we present an analysis of the impact of channel compositional variations on the total threshold voltage variability in nanoscale III-V MOSFETs. The analysis is carried out on a template Dual-Gate Ultra-Thin Body (DG-UTB) MOSFET through TCAD simulations in Sentaurus by Synopsys. The Impedance Field Method (IFM) is employed to evaluate statistical variability for five different sources: Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (B-LER and G-LER) and Band Gap Fluctuation (BGF). BGF arises due to the compositional variations of Indium in the compound semiconductor composing the channel, namely InGaAs. Our analysis shows that, by appropriately modeling band gap fluctuations, it is possible to identify a worst-case total relative Vt variability for different amounts of Indium mole fraction variations, providing technologists with an important reference. Side-effects of channel compositional variations on other variability sources are evaluated as well, and are found to have a non-negligible impact on B-LER only.

2018 - Random Telegraph Noise in Resistive Random Access Memories: Compact Modeling and Advanced Circuit Design [Articolo su rivista]
Puglisi, Francesco Maria; Zagni, Nicolo; Larcher, Luca; Pavan, Paolo
abstract

In this paper, we report about the derivation of a physics-based compact model of random telegraph noise (RTN) in HfO2-based resistive random access memory (RRAM) devices. Starting from the physics of charge transport, which is different in the high resistive states and low resistive states, we explore the mechanisms responsible for RTN exploiting a hybrid approach, based on self-consistent physics simulations and geometrical simplifications. Then, we develop a simple yet effective physics-based compact model of RTN valid in both states, which can be steadily integrated in state-of-the-art RRAM compact models. The RTN compact model predictions are validated by comparison with both a large experimental data set obtained by measuring RRAM devices in different conditions, and data reported in the literature. In addition, we show how the model enables advanced circuit simulations by exploring three different circuits for memory, security, and logic applications.

2018 - Random telegraph noise in 2D hexagonal boron nitride dielectric films [Articolo su rivista]
Ranjan, A.; Puglisi, F. M.; Raghavan, N.; O'Shea, S. J.; Shubhakar, K.; Pavan, P.; Padovani, A.; Larcher, L.; Pey, K. L.
abstract

This study reports the observation of low frequency random telegraph noise (RTN) in a 2D layered hexagonal boron nitride dielectric film in the pre- and post-soft breakdown phases using conductive atomic force microscopy as a nanoscale spectroscopy tool. The RTN traces of the virgin and electrically stressed dielectric (after percolation breakdown) were compared, and the signal features were statistically analyzed using the Factorial Hidden Markov Model technique. We observe a combination of both two-level and multi-level RTN signals in h-BN, akin to the trends commonly observed for bulk oxides such as SiO2 and HfO2. Experimental evidence suggests frequent occurrence of unstable and anomalous RTN traces in 2D dielectrics which makes extraction of defect energetics challenging.

2018 - Self-Heating Effect in Silicon-Germanium Heterostructure Bipolar Transistors in Stress and Operating Conditions [Relazione in Atti di Convegno]
Puglisi, Fm; Ghillini, M; Larcher, L; Pavan, P
abstract

In recent times many systems in a wide range of application fields (e.g., health, material science, security, and communications) exploit the mm-and sub-mm-wave spectrum, which dramatically sped up the growth of the BiCMOS technology integrating silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) and passives. Today, the reliability of such devices is of primary concern, and particular attention is given to the device self-heating (SH), the importance of which is supposed to increase with the device scaling. In this work we develop a TCAD model for SiGe HBT devices that is used to investigate the SH effects in SiGe HBTs both in operating and stress conditions. We underline the different role played by impact ionization and carriers' and lattice heating on the device degradation. Results show the important role played by the back end-of-line (BEOL) and by the substrate thermal resistance in dissipating the heat generated by impact ionization and hot carriers. Simulations of the SH effects in stress conditions excluded annealing as the possible reason for the degradation dynamics reported in the literature, while simulations of stressed devices in measurement conditions revealed the presence of a hole hot spot that suggests a possible physical mechanism involved in the degradation slowdown at long stress times reported in the literature.

2017 - A new verilog-A compact model of random telegraph noise in oxide-based RRAM for advanced circuit design [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Zagni, Nicolo'; Larcher, Luca; Pavan, Paolo
abstract

In this work, we propose for the first time a Verilog-A physics-based compact model of Random Telegraph Noise (RTN) in Resistive Random Access Memory (RRAM) devices. Starting from the physics of the RTN mechanism in both high (HRS) and low (LRS) resistive states, and combining experimental data with physics-based simulations, we develop and validate a complete compact model of RTN in RRAM devices. The model accounts for the intrinsic randomness in the number of defects contributing to the RTN and their properties. Moreover, it can be readily integrated in existing RRAM device compact models, extending their capabilities. The model is implemented in Verilog-A, and its effectiveness is demonstrated by using it to design the building block of a Truly-Random Number Generator circuit exploiting the RTN randomness as an entropy source.

2017 - Coexistence of Grain‐Boundaries‐Assisted Bipolar and Threshold Resistive Switching in Multilayer Hexagonal Boron Nitride [Articolo su rivista]
Pan, Chengbin; Ji, Yanfeng; Xiao, Na; Hui, Fei; Tang, Kechao; Guo, Yuzheng; Xie, Xiaoming; Puglisi, Francesco Maria; Larcher, Luca; Miranda, Enrique; Jiang, Lanlan; Shi, Yuanyuan; Valov, Ilia; Mcintyre, Paul; Waser, Rainer; Lanza, Mario
abstract

The use of 2D materials to improve the capabilities of electronic devices is a promising strategy that has recently gained much interest in both academia and industry. However, while the research in 2D metallic and semiconducting materials is well established, detailed knowledge and applications of 2D insulators are still scarce. In this paper, the presence of resistive switching (RS) in multilayer hexagonal boron nitride (h-BN) is studied using different electrode materials, and a family of h-BN-based resistive random access memories with tunable capabilities is engineered. The devices show the coexistence of forming free bipolar and threshold-type RS with low operation voltages down to 0.4 V, high current on/off ratio up to 106, and long retention times above 10 h, as well as low variability. The RS is driven by the grain boundaries (GBs) in the polycrystalline h-BN stack, which allow the penetration of metallic ions from adjacent electrodes. This reaction can be boosted by the generation of B vacancies, which are more abundant at the GBs. To the best of our knowledge, h-BN is the first 2D material showing the coexistence of bipolar and threshold RS, which may open the door to additional functionalities and applications.

2017 - Combined variability/sensitivity analysis in III-V and silicon FETs for future technological nodes [Relazione in Atti di Convegno]
Zagni, Nicolo'; Puglisi, Francesco Maria; Verzellesi, Giovanni; Pavan, Paolo
abstract

In this paper, we present a combined analysis of variability and sensitivity effects on electrical characteristics of In0.53Ga0.47As and Si ultra-scaled devices with LG= 15 nm. Two different structures, namely Dual-Gate and FinFET, are analyzed for both channel materials. Variability sources considered in this work are Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body-and Gate-Line Edge Roughness (LER). Sensitivity is assessed by varying process parameters, namely gate length, channel thickness, oxide thickness, and channel doping. Results show that variability in lnGaAs is dominated by both WFF and Body-LER, whereas WFF only dominates in Si devices. Moreover, control over gate length and channel thickness in In0.53Ga0.47As technology is fundamental in order to keep variability under reasonable values, with FinFET showing slightly better results than Dual-Gate structure. Variability is a major challenge for the industrial introduction of In0.53Ga0.47As, which could limit the alleged superior performance of In0.53Ga0.47As over Si.

2017 - Localized characterization of charge transport and random telegraph noise at the nanoscale in HfO2 films combining scanning tunneling microscopy and multi-scale simulations [Articolo su rivista]
Thamankar, R.; Puglisi, Francesco Maria; Ranjan, A.; Raghavan, N.; Shubhakar, K.; Molina, J.; Larcher, Luca; Padovani, Andrea; Pavan, Paolo; O'Shea, S. J.; Pey, K. L.
abstract

Charge transport and Random Telegraph Noise (RTN) are measured successfully at the nanoscale on a thin polycrystalline HfO2 film using room temperature Scanning Tunneling Microscopy (STM). STM is used to scan the surface of the sample with the aim of identifying grains and grain boundaries, which show different charge transport characteristics. The defects responsible for charge transport in grains and grain boundaries are identified as positively charged oxygen vacancies by matching the localized I-V curves measured at the nanoscale with the predictions of physics-based multi-scale simulations. The estimated defect densities at grains and grain boundaries agree with earlier reports in the literature. Furthermore, the current-time traces acquired by STM at fixed bias voltages on grains show characteristic RTN fluctuations. The high spatial resolution of the STM-based RTN measurement allows us to detect fluctuations related to individual defects that typically cannot be resolved by the conventional device-level probe station measurement. The same physical framework employed to reproduce the I-V conduction characteristics at the grains also successfully simulates the RTN detected at the nanoscale. We confirm that charge trapping at defects not directly involved in charge transport can induce significant current fluctuations through Coulombic interactions with other defects in the proximity that support charge transport.

2017 - Measuring and analyzing Random Telegraph Noise in Nanoscale Devices: The case of resistive random access memories [Relazione in Atti di Convegno]
Puglisi, Francesco Maria
abstract

In this paper, we discuss some of the measurement and analysis techniques for Random Telegraph Noise (RTN). Due to its detrimental impact on devices, RTN mechanism must be investigated and integrated into device models. However, RTN analysis requires a self-consistent framework in which automated measurement techniques, data analysis procedures, and physics-based modeling are blended together. Here we discuss guidelines to perform corrrect RTN measurements, and statistical techniques to perform advanced data analysis. This allows getting reliable results, which can lead to an unbiased physical interpretation of the phenomenon. The statistical analysis of RTN measured in hafnium oxide RRAM devices allows revealing the mechanism leading to the wide RTN fluctuations in high-resistive state, as well as the physical properties of the defect species involved in this phenomenon.

2017 - Modelling nanoscale n-MOSFETs with III-V compound semiconductor channels: From advanced models for band structures, electrostatics and transport to TCAD [Relazione in Atti di Convegno]
Caruso, E.; Carapezzi, S.; Visciarelli, M.; Gnani, E.; Zagni, N.; Pavan, P.; Palestri, P.; Esseni, D.; Gnudi, A.; Reggiani, S.; Puglisi, F. M.; Verzellesi, G.; Selmi, L
abstract

We review a few state of the art solutions and recent developments to model short channel III-V compound semiconductor n-MOSFETs based on full quantum transport, semiclassical multi-valley / multi-subband transport and TCAD models. The pros and cons of each, and the insights they can deliver, are illustrated with examples from recent technology developments and literature. Areas where improvements and implementations at TCAD level are most necessary are highlighted as well.

2017 - Multiscale modeling of defect-related phenomena in high-k based logic and memory devices [Relazione in Atti di Convegno]
Padovani, Andrea; Larcher, Luca; Puglisi, Francesco Maria; Pavan, Paolo
abstract

We present a multiscale modeling platform that exploits ab-initio calculation results and a material-related description of the most relevant defect-related phenomena in dielectrics (charge trapping and transport, degradation and atomic species motion) to interpret the reliability and electrical characteristics of logic and memory devices. The model is used to identify and characterize the dielectric defects responsible for the charge transport and degradation in SiOx/high-k (HK) bi-layer logic devices and to investigate the kinetics of forming and switching operations of Hf-based RRAM memories. Simulation results provide a deep and quantitative understanding of the factors controlling device operation and reliability. The proposed multiscale modeling platform represents a powerful tool for investigating material properties and optimizing device performances and reliability.

2017 - Random dopant fluctuation variability in scaled InGaAs dual-gate ultra-thin body MOSFETs: source and drain doping effect [Relazione in Atti di Convegno]
Zagni, Nicolo; Puglisi, Francesco Maria; Pavan, Paolo; Verzellesi, Giovanni
abstract

In this paper, we present simulation results on statistical variability of threshold voltage and the respective sensitivity to process variations in Dual Gate Ultra-Thin Body (DG-UTB) InGaAs nMOSFETs at two technological nodes (with physical gate length Lg = 15 nm and Lg = 10.4 nm). Particularly, we focus on the effect of Random Dopant Fluctuations (RDF) in both the channel and the source/drain regions. While the effect of other variability sources (i.e., workfunction fluctuation, WFF, and line edge roughness, LER) can be controlled by existing technological strategies, RDF can become significant due to the 'source-starvation' effect. From our analysis, we find in fact that RDF is strongly dependent on source/drain doping, while the effect due to channel doping variation is marginal. Moreover, results indicate the possibility of achieving lower RDF variability effects at very high source/ drain doping levels that are beyond the reach of current process technology. Hence, RDF can potentially become the limiting factor to the overall variability in ultra-scaled InGaAs devices due to the difficulties in achieving very high source/drain doping.

2017 - Random telegraph noise: Measurement, data analysis, and interpretation [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Padovani, Andrea; Larcher, Luca; Pavan, Paolo
abstract

Abstract: In this paper, we delve into one of the most relevant defects-related phenomena causing failures in the operation of modern nanoscale electron devices, namely Random Telegraph Noise (RTN). Due to its detrimental impact on devices and circuits performances, RTN mechanism must be thoroughly understood, which requires establishing a self-consistent framework encompassing automated measurement techniques, data analysis algorithms, and physics-based modeling. This platform is not only required to understand the physics of RTN-related failures, but also to enable RTN analysis as a tool to investigate device reliability. Starting from the analysis of RTN signal statistical properties, we propose a set of guidelines to perform correct RTN measurements and data analysis, in order to get reliable results that are needed for an unbiased physical interpretation. This is achieved by combining automated experiments with sophisticated data analysis, consistency check, and comprehensive physics-based simulations. RTN analysis is then applied to two different devices for logic and memory applications, respectively: FinFETs and RRAMs. Particularly, the analysis of the statistical properties of RTN simultaneously measured on the drain and on the gate current of FinFETs allows understanding the details of the defects generation during stress. The analysis of RTN measured during the read operation in RRAM devices allows understanding the physical origin of RTN in these devices and identifying the defects species involved in this phenomenon.

2017 - Scaling perspective and reliability of conductive filament formation in ultra-scaled HfO2 Resistive Random Access Memory [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Celano, Umberto; Padovani, Andrea; Vandervorst, Wilfried; Larcher, Luca; Pavan, Paolo
abstract

In this paper we report about the scaling perspective of ultra-scaled HfO2 Resistive Random Access Memory devices. Due to filamentary conduction, the scalability of these devices is considered to be ultimately limited by the size of the conductive filament. However, even though the precise size and shape of the filament is not fully elucidated, it is widely accepted that its size is mainly controlled by the current compliance. In turn, the latter sets the operating current level of the cell. The reduction of the current level is nevertheless accompanied by performance instabilities, which are the main reliability threat for low-current operations. The resulting tradeoff raises concerns about the scalability potential of RRAM devices. In this work, we combine device-level measurements, Conductive Atomic-Force Microscopy (C-AFM), and physics-based simulations of HfO2 RRAM devices to elucidate the reason for these instabilities. Results clarify the scaling perspectives of ultra-low cell size (< 10Ã10 nm2) RRAMs and their reliability.

2017 - The impact of interface and border traps on current–voltage, capacitance–voltage, and split‐CV mobility measurements in InGaAs MOSFETs [Articolo su rivista]
Pavan, Paolo; Zagni, Nicolo'; Puglisi, Francesco Maria; Alian, Alireza; Thean, Aaron Voon Yew; Collaert, Nadine; Verzellesi, Giovanni
abstract

In this article, we present coupled experimental/simulated results about the influence of interface and border traps on the electrical characteristics and split-CV mobility extraction in InGaAs MOSFETs. These results show that border traps limit the maximum drain current under on-state conditions, induce a hysteresis in the quasi-static transfer characteristics, as well as affect CV measurements, inducing an increase in the accumulation capacitance even at high frequencies where trap effects are commonly assumed to be negligible. Hysteresis in the transfer characteristics can be used as a sensitive monitor of border traps, as suggested by a sensitivity analysis where either the energetic or the spatial distribution of border traps are varied. Finally, we show that mobility extraction by means of the split-CV method is affected by appreciable errors related to the spurious contributions of interface and border traps to the total gate charge, ultimately resulting in significant channel mobility underestimation. In very narrow channel devices, channel electron spilling over the InP buffer layer can also contribute to mobility measurement inaccuracy.

2017 - Threshold Voltage Statistical Variability and Its Sensitivity to Critical Geometrical Parameters in Ultrascaled InGaAs and Silicon FETs [Articolo su rivista]
Zagni, Nicolo'; Puglisi, Francesco Maria; Verzellesi, Giovanni; Pavan, Paolo
abstract

We investigate the statistical variability of the threshold voltage and its sensitivity to critical geometrical parameters in ultrascaled In0.53Ga0.47As and Si MOSFETs by means of 3-D quantum-corrected drift-diffusion simulations. Dual-gate ultrathin-body and FinFET device structures are analyzed for both channel materials. To assess the variability and sensitivity effects also from the scaling perspective, we consider devices belonging to two technological nodes with gate lengths 15 and 10.4 nm, designed according to International Technology Roadmap for Semiconductors (ITRS) specifications. Variability sources included in our analysis are random-dopant fluctuation, work-function fluctuation (WFF), as well as body- and gate-line-edge roughness (LER). Sensitivity to critical geometrical parameters is assessed by varying gate length, channel thickness, and oxide thickness. Results point out the major detrimental effect of WFF and Body-LER for InGaAs FETs, whereas WFF dominates in Si counterparts. Moreover, the sensitivity analysis shows that control over gate length and channel thickness in the InGaAs technology is fundamental in order to keep variability within tolerable values. Scaling of the InGaAs technology highlights the importance of abiding to ITRS projections regarding LER control improvement. Furthermore, a tight channel thickness control is required in ultrascaled devices due to the large sensitivity of the threshold voltage to the channel thickness combined with increased variability.

2017 - Variability and sensitivity to process parameters variations in InGaAs Dual-Gate Ultra-Thin Body MOSFETS: A scaling perspective [Relazione in Atti di Convegno]
Zagni, Nicolò; Puglisi, Francesco Maria; Verzellesi, Giovanni; Pavan, Paolo
abstract

In this work, we present a combined analysis on the statistical variability of threshold voltage, on-state current, and leakage current of III-V ultra-scaled MOSFETs. In addition, we analyze the sensitivity of threshold voltage to critical geometrical and process parameters variations (i.e, gate length, channel thickness, oxide thickness and channel doping). Our analysis verifies the scaling potential of the InGaAs Technology from the variability/sensitivity standpoint for two technologicaTnodes (Lg = 15 nm, Lg = 10.4 nm), by means of Quantum Drift-Diffusion (QDD) simulations. The structure under investigation is a template Dual-Gate Ultra-Thin Body device realized following ITRS projections. The variability sources under consideration are: Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (LER). The sensitivity analysis of threshold voltage is performed by considering also the effects of statistical variability to evaluate their combined effect. The results of the statistical variability analysis highlight the importance of carefully controlling Body-LER, as forecasted in the new IRDS report. Moreover, the combined effect of variability and sensitivity to channel thickness are found to be critical to the scaling process (down to Lg =10.4 nm), as it leads to significant leakage increase or performance reduction, potentially resulting in always-on devices.

2016 - 2D h-BN based RRAM devices [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Larcher, Luca; Pan, C.; Xiao, N.; Shi, Y.; Hui, F.; Lanza, M.
abstract

This paper presents two dimensional (2D) RRAM devices exploiting multilayer hexagonal boron nitride (h-BN) as active switching layer. Different electrodes including Cu, Ni-doped Cu (CuNi) and graphene (G) are considered. The devices show low set/reset voltages, high on/off current ratio, good endurance and very low overall variability. Experimental results are interpreted using a novel simulation framework, which proves that the memory behavior is enabled by the manipulation of a boron (B)-deficient conductive filament (CF). The cyclical release and diffusion of B ions are the key physical mechanisms responsible for switching.

2016 - A consistent picture of cycling dispersion of resistive states in HfOx resistive random access memory [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo
abstract

In this paper we present the results of a systematic study of resistive states cycling dispersion in HfOx Resistive Random Access Memory (RRAM). A wide set of experimental data is collected on several RRAM devices in different operating conditions. A compact model is exploited lo link the device electrical response to its physical characteristics, delivering a clear physical picture of cycling dispersion and of its sensitivity to operating conditions. The implications of operating voltage, current compliance, and temperature on the device reliability are clarified. Particularly, the dispersion of both RHRS and RLRS is much worsened at low current compliance, which reduces the worst-case read window establishing a trade-off between device reliability and power consumption.

2016 - A multi-scale methodology connecting device physics to compact models and circuit applications for OxRAM technology [Articolo su rivista]
Puglisi, Francesco Maria; Deleruyelle, Damien; Portal, Jean Michel; Pavan, Paolo; Larcher, Luca
abstract

RRAM technology relying on transitional metal oxides (namely OxRAM) is about to reach the industrial stage. Nevertheless the physical-based understanding of the material and process implications at device and circuit levels is still not completely clear, hindering the full industrial exploitation of the OxRAM technology. In this context, this article presents a multi-scale methodology that connects the microscopic material properties to the electrical behavior of OxRAM devices at the circuit level. Microscopic models describing OxRAM operation (i.e., forming, resistive switching) and variability (e.g., cycle-to-cycle, RTN) will be reviewed and used for the development of compact models that will allow investigating the potential of this technology at the circuit level. An overview of some innovative applications involving OxRAM will be finally presented.

2016 - Anomalous random telegraph noise and temporary phenomena in resistive random access memory [Articolo su rivista]
Puglisi, Francesco Maria; Larcher, Luca; Padovani, Andrea; Pavan, Paolo
abstract

In this paper we present a comprehensive examination of the characteristics of complex Random Telegraph Noise (RTN) signals in Resistive Random Access Memory (RRAM) devices with TiN/Ti/HfO2/TiN structure. Initially, the anomalous RTN (aRTN) is investigated through careful systematic experiment, dedicated characterization procedures, and physics-based simulations to gain insights into the physics of this phenomenon. The experimentally observed RTN parameters (amplitude of the current fluctuations, capture and emission times) are analyzed in different operating conditions. Anomalous behaviors are characterized and their statistical characteristics are evaluated. Physics-based simulations considering both the Coulomb interactions among different defects in the device and the possible existence of defects with metastable states are exploited to suggest a possible physical origin of aRTN. The same simulation framework is also shown to be able to predict other temporary phenomena related to RTN, such as the temporary change in RTN stochastic properties or the sudden and iterative random appearing and vanishing of RTN fluctuations always exhibiting the same statistical characteristics. Results highlight the central role of the electrostatic interactions among individual defects and the trapped charge in describing RTN and related phenomena.

2016 - Bipolar Resistive RAM Based on HfO2: Physics, Compact Modeling, and Variability Control [Articolo su rivista]
Puglisi, Francesco Maria; Larcher, Luca; Padovani, Andrea; Pavan, Paolo
abstract

In this paper, we thoroughly investigate the characteristics of the TiN/Ti/HfO/TiN resistive random access memory (RRAM) device. The physical mechanisms involved in the device operations are comprehensively explored from the atomistic standpoint. Self-consistent physics simulations based on a multi-scale approach are employed to achieve a complete understanding of the device physics. The latter includes different charge and ion transport phenomena, as well as structural modifications occurring during the device operations. The main sources of variability are also included by connecting the electrical response of the device to the atomistic material properties. The detailed understanding of the device physics allows developing a physics-based compact model describing the device switching in different operating conditions, including also the effects of cycling variability. Random telegraph noise (RTN), which constitutes an additional variability source, and its relations with cycling variability are analyzed. A statistical link between the programmed resistance and the worst-case RTN effect is found and exploited to include RTN effects in the compact model. Finally, we show how implementing an advanced programming scheme tailored on the device physics allows optimal control over variability and RTN, eventually achieving reliable and RTN-resilient two-bits/cell operations.

2016 - Effects of Border Traps on Transfer Curve Hysteresis and Split-CV Mobility Measurement in InGaAs Quantum-Well MOSFETs [Relazione in Atti di Convegno]
Pavan, Paolo; Zagni, Nicolo'; Puglisi, Francesco Maria; Alian, Alireza; Thean, Aaron Voon Yew; Collaert, Nadine; Verzellesi, Giovanni
abstract

In this paper we present TCAD simulation and experimental results on the influence of interface and border traps on the electrical characteristics of InGaAs quantum-well MOSFETs. These results show that border traps limit the maximum ION, induce a hysteresis in the quasi-static transfer characteristics, and markedly affect CV measurements, inducing a large increase in the accumulation capacitance even at high frequencies where trap effects are commonly assumed to be negligible. The latter effect is particularly insidious from the technologist's perspective, since it can partially compensate quantum capacitance reduction effects, leading to CV data misinterpretation. Interface traps affect mainly the subthreshold slope of IV characteristics and cause frequency dispersion under depletion conditions. Finally, we show that channel mobility extracted by means of the split-CV method is affected by spurious contributions to the gate charge related to both interface and border traps, resulting in channel mobility underestimation.

2016 - Guidelines for a Reliable Analysis of Random Telegraph Noise in Electronic Devices [Articolo su rivista]
Puglisi, Francesco Maria; Pavan, Paolo
abstract

In this paper, we propose new guidelines for the analysis of random telegraph noise (RTN) in electronic devices. Starting from an in-depth understanding of RTN signal characteristics, we will identify the correct measurement conditions to enable RTN analysis as a characterization tool for electronic devices. The estimate of RTN statistical parameters may indeed strongly depend on the choice of measurement conditions. We will carefully consider both the measurement limits and the extraction process constraints to devise a strategy to identify RTN signals measured in conditions allowing a meaningful estimation of their parameters. The proposed strategy will be tested on a variety of different RTN signals and operating conditions.

2016 - Monitoring Stress-Induced Defects in HK/MG FinFETs Using Random Telegraph Noise [Articolo su rivista]
Puglisi, Francesco Maria; Costantini, Felipe; Kaczer, Ben; Larcher, Luca; Pavan, Paolo
abstract

In this letter, we report on nFinFETs degradation during stress exploiting ID and IG noise analysis. We employed a stress/measure approach to monitor device characteristics at different levels of cumulative stress. IG-VG and ID-VG indicators suggest defects generation to occur away from the channel. This is confirmed by the quantitative analysis of ID and IG stationary RTN signals at operating conditions, which show no correlation as opposite to what reported for planar FETs. Moreover, we analyze for the first time the ID-t and IG-t non-stationary instabilities during stress. The results confirm that the generation of defects responsible for SILC occurs away from the channel. Only in highly stressed devices, ID-t and IG-t curves observed during stress exhibit anti-correlation, due to comparable values of the gate and drain current levels originated by the high defect density. Hence, in nFinFETs, ID and IG RTN/instabilities might originate from mechanisms involving different entities.

2016 - Multiscale modeling of electron-ion interactions for engineering novel electronic device and materials [Relazione in Atti di Convegno]
Larcher, Luca; Puglisi, Francesco Maria; Padovani, Andrea; Vandelli, Luca; Pavan, Paolo
abstract

In this work, we present a multiscale simulation platform as a viable tool to engineer novel electron devices. The tool connects the specific material properties (as atomic defects, interfaces, material morphology) to the electrical behavior of the device, representing a virtual space for the design of novel electrons device purposely exploiting atom-electron interactions. This simulation platform is based on the modeling the microscopic interactions and chemical reactions (e.g. bond breaking) between electrons and atomic species (ions, vacancies, dangling bonds). In this work, we show how this tool can be used to design resistive memory devices based on binary oxides. The fundamental importance of the complex interplay between charge carriers and atomic species is highlighted by showing how these interactions determine many electrical characteristics of the device, including charge transport, structural modifications associated with resistive switching, variability, and noise fluctuations.

2016 - Multiscale modeling of electron-ion interactions for engineering novel electronic devices and materials [Relazione in Atti di Convegno]
Larcher, Luca; Puglisi, Francesco Maria; Padovani, Andrea; Vandelli, Luca; Pavan, Paolo
abstract

2016 - Operations, Charge Transport, and Random Telegraph Noise in HfOx Resistive Random Access Memory: a Multi-scale Modeling Study [Articolo su rivista]
Puglisi, Francesco Maria; Larcher, Luca; Padovani, Andrea; Pavan, Paolo
abstract

In this work we explore the mechanisms responsible for Random Telegraph Noise (RTN) fluctuations in HfOx Resistive Random Access Memory (RRAM) devices. The statistical properties of the RTN are analyzed in many operating conditions exploiting the Factorial Hidden Markov Model (FHMM) to decompose the multilevel RTN traces in a superposition of two-level fluctuations. This allows the simultaneous characterization of individual defects contributing to the RTN. Results, together with multi-scale physics-based simulations, allows thoroughly investigating the physical mechanisms which could be responsible for the RTN current fluctuations in the two resistive states of these devices, including also the charge transport features in a comprehensive framework. We consider two possible options, which are the Coulomb blockade effect and the possible existence of metastable states for the defects assisting charge transport. Results indicate that both options may be responsible for RTN current fluctuations in HRS, while RTN in LRS is attributed to the temporary screening effect of the charge trapped at defect sites around the conductive filament.

2016 - Probing defects generation during stress in high-κ/metal gate FinFETs by random telegraph noise characterization [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Costantini, Felipe; Kaczer, Ben; Larcher, Luca; Pavan, Paolo
abstract

In this work, we report about defects generation in the oxide layer of n-FinFETs during stress. Defects generation is probed using RTN traces collected at both the drain and the gate. A stress/measure approach is used to monitor the characteristics of the device, including RTN, at different levels of cumulative stress. Indicators derived from IG-VG and ID-VG measurements suggest defects generation to occur away from the channel. This is confirmed by the RTN analysis, which shows that drain and gate RTN events are completely uncorrelated. The detailed analysis of the RTN properties at different stress levels shows that an increase of the gate leakage is accompanied by changes in the gate RTN properties, while the drain RTN properties are rarely affected by the stress. This further proves that stress is associated with defects generation deep in the oxide layer, far away from the channel. This result is in contrast to what reported for planar FETs and suggests that, in n-FinFETs, the root cause of ID RTN might differ from the one causing SILC and IG RTN.

2016 - RTN Analysis as a Tool to Link Physical Device Characteristics to Electrical Reliability in Nanoscale Devices [Relazione in Atti di Convegno]
Puglisi, F. M.
abstract

2016 - Random Telegraph Noise analysis as a tool to link physical device features to electrical reliability in nanoscale devices [Relazione in Atti di Convegno]
Puglisi, Francesco Maria
abstract

In this work, we report a detailed discussion on the techniques and the requirements needed to enable Random Telegraph Noise (RTN) analysis as a tool to investigate device reliability. Starting with the understanding of the RTN signal properties, a set of best practices to perform measurements and data analysis is established to guarantee reliable results and a correct ensuing physical interpretation. It will be shown that combining dedicated and careful experiments with refined data analysis and comprehensive physics simulations is hence required to enable RTN analysis as a safe and innovative investigation tool for electron devices. The effectiveness of RTN analysis as an investigation tool is demonstrated on both FinFET and resistive memory devices: the parameters of RTN as observed in the experiments performed on FinFETs allow understanding the details of the defects generation during stress in such devices; RTN analysis on RRAM allows understanding the physical origin of RTN in these devices and to estimate the physical properties of defects involved in the phenomenon.

2016 - Random telegraph noise in HfOx Resistive Random Access Memory: From physics to compact modeling [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo; Larcher, Luca
abstract

In this paper we propose a compact model of Random Telegraph Noise in HfOx-based Resistive Random Access Memory devices. Starting from the physics of charge transport, we first focus on the RTN phenomenon in the two different resistive states (HRS and LRS). We separately explore the microscopic mechanisms responsible for Random Telegraph Noise (RTN) current fluctuations in HfOx RRAM devices in HRS and LRS, exploiting a self-consistent physics-based simulation framework accounting for many charge transport mechanisms and their alterations. Then, we develop a simple yet effective compact model of RTN valid in both states, which can be easily integrated in state-of-the-art compact RRAM device models. The compact model predictions are validated by comparison with both a large experimental dataset obtained by measuring RRAM devices in different conditions, and data found in the literature.

2016 - Single vacancy defect spectroscopy on HfO2 using random telegraph noise signals from scanning tunneling microscopy [Articolo su rivista]
Thamankar, R.; Raghavan, N.; Molina, J.; Puglisi, Francesco Maria; O'Shea, S. J.; Shubhakar, K.; Larcher, Luca; Pavan, Paolo; Padovani, Andrea; Pey, K. L.
abstract

Random telegraph noise (RTN) measurements are typically carried out at the device level using standard probe station based electrical characterization setup, where the measured current represents a cumulative effect of the simultaneous response of electron capture/emission events at multiple oxygen vacancy defect (trap) sites. To better characterize the individual defects in the high-j dielectric thin film, we propose and demonstrate here the measurement and analysis of RTN at the nanoscale using a room temperature scanning tunneling microscope setup, with an effective area of interaction of the probe tip that is as small as 10 nm in diameter. Two-level and multi-level RTN signals due to single and multiple defect locations (possibly dispersed in space and energy) are observed on 4 nm HfO2 thin films deposited on n-Si (100) substrate. The RTN signals are statis- tically analyzed using the Factorial Hidden Markov Model technique to decode the noise contribu- tion of more than one defect (if any) and estimate the statistical parameters of each RTN signal (i.e., amplitude of fluctuation, capture and emission time constants). Observation of RTN at the nanoscale presents a new opportunity for studies on defect chemistry, single-defect kinetics and their stochastics in thin film dielectric materials. This method allows us to characterize the fast traps with time constants ranging in the millisecond to tens of seconds range.

2015 - A Complete Statistical Investigation of RTN in HfO₂-Based RRAM in High Resistive State [Articolo su rivista]
Puglisi, Francesco Maria; Larcher, Luca; Padovani, Andrea; Pavan, Paolo
abstract

In this paper, we investigate the random telegraph noise (RTN) in hafnium-oxide resistive random access memories in high resistive state (HRS). The current fluctuations are analyzed by decomposing the multilevel RTN signal into two-level RTN traces using a factorial hidden Markov model approach, which allows extracting the properties of the traps originating the RTN. The current fluctuations, statistically analyzed on devices with a different stack reset at different voltages, are attributed to the activation and deactivation of defects in the oxidized tip of the conductive filament, assisting the trap-assisted tunneling transport in HRS. The physical mechanisms responsible for the defect activation are discussed. We find that RTN current fluctuations can be due to either the coulomb interaction between oxygen vacancies (normally assisting the charge transport) and the electron charge trapped at interstitial oxygen defects, or the metastable defect configuration of oxygen vacancies assisting the electron transport in HRS. A consistent microscopic description of the phenomenon is proposed, linking the material properties to the device performance.

2015 - A Novel Program-Verify Algorithm for Multi-Bit Operation in HfO2 RRAM [Articolo su rivista]
Puglisi, Francesco Maria; Wenger, C.; Pavan, Paolo
abstract

In this letter, we propose a dispersion-aware program-verify algorithm to enable reliable multi-bit operations in HfO2-based RRAM. The significant intrinsic dispersion of the resistive states, typically hindering multi-bit operations, is exploited to devise a program-verify scheme which enables the multi-bit operations with unique properties of failure resilience and adaptability to degradation. We show that an appropriate choice of the algorithm parameters can minimize the average number of cycles needed to program the cell, enabling fast and reliable multi-bit operation. This maximizes the bit/cell ratio and minimizes the dispersion of targeted resistive states.

2015 - A microscopic physical description of RTN current fluctuations in HfOx RRAM [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo; Vandelli, Luca; Padovani, Andrea; Bertocchi, Matteo; Larcher, Luca
abstract

In this work we explore the microscopic mechanisms responsible for Random Telegraph Noise (RTN) current fluctuations in HfOx Resistive Random Access Memory (RRAM) devices. The statistical properties of the RTN current fluctuations are analyzed in a variety of reading conditions by exploiting the Factorial Hidden Markov Model (FHMM) to decompose the complex RTN traces in a superimposition of two-level fluctuations. We investigate the physical mechanisms that could be responsible for the RTN current fluctuations by considering two options that are the Coulomb blockade effect and the metastable-to-stable transition of defect assisting the Trap- Assisted-Tunneling (TAT) charge transport. Physics-based simulations show that both options allow reproducing the RTN current fluctuations. The electron TAT via oxygen vacancy defects, responsible for the current in High Resistive State (HRS), is significantly altered by the electric field caused by electron trapping at defects (i.e. neutral interstitial oxygen), not directly involved in charge transport. Similarly, the transition of oxygen vacancies into a stable-slow defect configuration (still unidentified in HfOx) can temporarily switch off the current, thus explaining the RTN.

2015 - Characterization of anomalous Random Telegraph Noise in Resistive Random Access Memory [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Larcher, Luca; Padovani, Andrea; Pavan, Paolo
abstract

In this paper we explore the features of complex anomalous Random Telegraph Noise (aRTN) in TiN/Ti/HfO2/TiN Resistive Random Access Memory (RRAM) devices. Careful design of experiment, dedicated characterization techniques, and physics-based simulations are exploited to gain insights into the physics of this phenomenon. The RTN parameters (amplitude of the current fluctuations, capture and emission times) observed in the experiments are analyzed in a variety of operating conditions. Anomalous behaviors are examined and their statistical characteristics are analyzed. Physics-based simulations taking into account both the Coulomb interactions among different defects in the device and the possibility for defects to show metastable states are exploited to suggest a possible origin of the aRTN. Results highlight the importance of the electrostatic interactions among individual defects and the trapped charge.

2015 - Statistical analysis of random telegraph noise in HfO2-based RRAM devices in LRS [Articolo su rivista]
Puglisi, Francesco Maria; Pavan, Paolo; Larcher, Luca; Padovani, Andrea
abstract

In this work, we present a thorough statistical characterization of Random Telegraph Noise (RTN) in HfO2-based Resistive Random Access Memory (RRAM) cells in Low Resistive State (LRS). Devices are tested under a variety of operational conditions. A Factorial Hidden Markov Model (FHMM) analysis is exploited to extrapolate the properties of the traps causing multi-level RTN in LRS. The trapping and de-trapping of charge carriers into/out of defects located in the proximity of the conductive filament results in a shielding effect on a portion of the conductive filament, leading to the observed RTN current fluctuations. It is found that both oxygen vacancies and oxygen ions defects may be responsible for the observed RTN. The variations of the current observed at subsequent set/reset cycles are instead attributed to the stochastic variations in the filament due to oxidation/reduction processes during reset and set operations, respectively.

2015 - Temperature impact on the reset operation in HfO2 RRAM [Articolo su rivista]
Puglisi, Francesco Maria; Qafa, Altin; Pavan, Paolo
abstract

In this letter we report about the impact of temperature on the reset process in HfO2 RRAM devices. I-V analysis of the device during consecutive switching cycles in different operating conditions and temperatures is performed. A compact model is exploited to extrapolate the properties of the conductive filament after the reset operation. The different temperature dependences of the reset process and the charge transport in High Resistive State are taken into account: by extracting the effective activation energy of the charge transport in High Resistive State, we are able to estimate the effect of temperature on the reset process. A linear relation is found between barrier thickness and reset temperature. High temperature switching may improve cycling variability at ultra- low reset voltage.

2014 - A Compact Model of Program Window in HfOx RRAM Devices for Conductive Filament Characteristics Analysis [Articolo su rivista]
Larcher, Luca; Puglisi, Francesco Maria; Pavan, Paolo; Padovani, Andrea; Vandelli, Luca; Bersuker, Gennadi
abstract

This paper presents a physics-based compact model for the program window in HfOx resistive random access memory devices, defined as the ratio of the resistances in high resistance state (HRS) and low resistance state (LRS). This model allows extracting the characteristics of the conductive filament (CF) in HRS. For a given forming current compliance limit, the program window is shown to be correlated to the thickness of the reoxidized portion of the CF in HRS, which can be modulated by the reset voltage amplitude. On the other hand, the statistical distribution of the memory window depends exponentially on the barrier thickness variations that points to the critical role of reset conditions for the performance optimization of RRAM devices.

2014 - A study on HfO2 RRAM in HRS based on I–V and RTN analysis [Articolo su rivista]
Puglisi, Francesco Maria; Pavan, Paolo; Padovani, Andrea; Larcher, Luca
abstract

This paper presents a statistical characterization of random telegraph noise (RTN) in hafnium-oxide based resistive random access memories (RRAMs) in high resistive state (HRS). Complex RTN signals are analyzed exploiting a Factorial Hidden Markov Model (FHMM) approach, which allows to derive the statistical properties of the RTN signals, directly related to the physical properties of the traps responsible for the multi-level RTN measured in these devices. Noise characteristics in different reset conditions are explored through consecutive switching cycles. Noise spectral analysis is also performed to fully support the investigation. An RRAM compact model is also exploited to estimate the physical properties of the conductive filament and of the dielectric barrier from simple I–V data. These tools are combined together to prove the existence of a direct statistical relation between the reset conditions, the volume of the dielectric barrier created during the reset operation and the average number of active traps contributing to the RTN.

2014 - An investigation on the role of current compliance in HfO2-based RRAM in HRS using RTN and I-V data [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo
abstract

In this paper we investigate the effect of current compliance during forming in HfO2-based Resistive Random Access Memories (RRAMs). We implemented a thorough statistical characterization of Random Telegraph Noise (RTN) in High Resistive State (HRS). Complex RTN signals are analyzed through a Factorial Hidden Markov Model (FHMM) approach, deriving the statistical properties of traps responsible for the multi-level RTN measured in these devices. Noise is explored in devices formed at different current compliances, demonstrating a direct relation between the current compliance, the cross-section of both the CF and the dielectric barrier created during the reset operation, and the number of active traps contributing to the RTN.

2014 - Analysis of RTN and cycling variability in HfO2 RRAM devices in LRS [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo; Larcher, Luca; Padovani, Andrea
abstract

In this work, we present a thorough statistical characterization of cycling variability and Random Telegraph Noise (RTN) in HfO2-based Resistive Random Access Memory (RRAM) cells in Low Resistive State (LRS). Devices are tested under a variety of operational conditions. A Factorial Hidden Markov Model (FHMM) analysis is exploited to extrapolate the properties of the traps causing multi-level RTN in LRS. The trapping and de-trapping of charge carriers into/out of defects located in the proximity of the conductive filament results in a shielding effect on a portion of the conductive filament, leading to the observed RTN current fluctuations. The variations of the current observed at subsequent set/reset cycles are instead attributed to the stochastic variations in the filament due to oxidation/reduction processes during reset and set operations, respectively. The statistical characterization of RTN and cycling variability does not show correlation between these phenomena.

2014 - Defect density evaluation in a high-k MOSFET gate stack combining experimental and modeling methods [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Veksler, D.; Matthews, K.; Bersuker, G.; Larcher, Luca; Padovani, Andrea; Vandelli, Luca; Pavan, Paolo
abstract

We report on a methodology to assist fabrication process development using a case study of high thermal budget (HTB) and low thermal budget (LTB) fabrication flows for high- k/metal gate stacks in n-MOSFETs. This methodology is supported by simulations that self-consistently extract defect characteristics by simultaneously considering a set of electrical measurement data, specifically stress-induced leakage current (SILC), threshold voltage shift (PBTI), and multi-frequency charge-pumping (MFCP). The contributions of pre-existing and stress-induced defects in SiO2/HfO2 gate stacks on device performance are examined. Information on defect distributions, extracted in the as-fabricated and post-stress HTB and LTB devices, allow understanding their dependence on the fabrication process, which can provide guidelines for the process optimization.

2014 - Factorial Hidden Markov Model analysis of Random Telegraph Noise in Resistive Random Access Memories [Articolo su rivista]
Puglisi, Francesco Maria; Pavan, Paolo
abstract

This paper presents a new technique to analyze the characteristics of multi-level random telegraph noise (RTN). RTN is dened as an abrupt switching of ei- ther the current or the voltage between discrete values as a result of trapping/de-trapping activity. RTN sig- nal properties are deduced exploiting a factorial hid- den Markov model (FHMM). The proposed method considers the measured multi-level RTN as a super- position of many two-levels RTNs, each represented by a Markov chain and associated to a single trap, and it is used to retrieve the statistical properties of each chain. These properties (i.e. dwell times and amplitude) are directly related to physical properties of each trap.

2014 - Instability of HfO2 RRAM devices: Comparing RTN and cycling variability [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Larcher, Luca; Pavan, Paolo; Padovani, Andrea; Bersuker, G.
abstract

In this study, we present an extensive statistical characterization of the cycling variability and Random Telegraph Noise (RTN) in the HfO2-based Resistive Random Access Memories (RRAM) cells. Devices with different dielectric stacks are tested under a variety of read (sampling times and read voltage magnitudes) and operational (reset voltages) conditions. A Factorial Hidden Markov Model (FHMM) analysis is employed to reveal the properties of the traps causing multi-level RTN in High Resistive State (HRS), while the I-V data are analyzed through the developed compact model to investigate cycling variability. The activation and deactivation of traps assisting the charge transport through a dielectric barrier in HRS is found to be responsible for the observed RTN while the read current variations can be attributed to the stochastic nature of the filament oxidation process during reset, also leading to a variable number of traps formed in the barrier after each switching cycle. The statistical characterization of RTN and cycling variability, which demonstrates the uncorrelated nature of these phenomena, provides guidelines for scaling and optimization of RRAM device operations and reliability.

2014 - Progresses in Modeling HfOx RRAM Operations and Variability [Relazione in Atti di Convegno]
Larcher, Luca; Pirrotta, Onofrio; Puglisi, Francesco Maria; Padovani, Andrea; Pavan, Paolo; Vandelli, Luca
abstract

This paper reports on recent progresses in modeling bi-polar RRAM devices based on hafnium oxide. The unique modeling environment adopted for the simulation of device operations accounts self-consistently for the charge and ion transport, and the structural device modification occurring during forming and set/reset operations. Reliability mechanisms as well as the major sources of devices variability are included thanks to a multi-scale approach that connects the electrical device performance to the atomic-level material properties. The modeling methodology can be successfully applied to both improve device performances and fabrication process of state-of-the-art RRAM devices, and devise device solutions for future 3D RRAM architectures.

2013 - A Compact Model of Hafnium-Oxide-Based Resistive Random Access Memory [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo; Padovani, Andrea; Larcher, Luca
abstract

In this paper, a compact model of hafnium-oxide-based resistive random access memory (RRAM) cell is developed. The proposed model includes the effect of the temperature and cycle-to-cycle stochastic variations affecting the device operations. Simple I-V measurements are used to extract the model parameters. The model accurately reproduces the I-V curves of the switching cycles in different operating conditions.

2013 - An Empirical Model for RRAM Resistance in Low- and High-Resistance State [Articolo su rivista]
Puglisi, Francesco Maria; Larcher, Luca; G., Bersuker; Padovani, Andrea; Pavan, Paolo
abstract

We present a simple empirical expression describing hafnium-based RRAM resistance at different reset voltages and current compliances. The model that we propose describes filament resistance measured at low (∼0.1 V) reading voltage in both low-resistance state (LRS) and high-resistance state (HRS). The proposed description confirms that conduction in LRS is ohmic (after forming with a sufficiently high current compliance) and is consistent with the earlier description of HRS resistance as controlled by a trap-assisted electron transfer via traps in the oxidized portion of the filament. The length of the nonohmic part of the filament is found to be directly proportional to reset voltage. Moreover, low-frequency noise measurements at different reset voltages evidence a tradeoff between HRS resistance and noise in reading conditions.

2013 - FHMM analysis for Multi-Defect Spectroscopy in HfOX RRAM [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo
abstract

This paper presents a new technique to analyze the characteristics of multi-level random telegraph noise (RTN) in HfOX RRAM. RTN is characterized by abrupt switching of either the current or the voltage between discrete values as a result of trapping/de-trapping activity while reading the RRAM cell. RTN statistical properties are deduced exploiting a factorial hidden Markov model (FHMM). The proposed method considers the measured multi-level RTN as a superposition of many two-levels RTN, each represented by a Markov chain and associated to a single trap, and it is used to retrieve the statistical properties of each chain. These properties (i.e. dwell times and amplitude) are directly related to physical properties of each trap

2013 - Perimeter and area current components in HfO2 and HfO2-x metal-insulator-metal capacitors [Articolo su rivista]
Puglisi, Francesco Maria; Pavan, Paolo; Padovani, Andrea; Larcher, Luca
abstract

In this paper, the authors present an experimental analysis on current conduction mechanisms in high-k oxides, where two metal–insulator–metal structures with different insulators (HfO2 and HfO2-x) are considered. Current density measurements indicate the existence of a perimeter-related component in the current, sizeable in HfO2, and negligible in HfO2-x samples, which have to be taken into account for a correct analysis of the device behavior and cannot be based only on the area scaling rules. For oxide breakdown, for example, a significant contribution of the perimeter-related current component results in conservative extrapolations of breakdown voltages for scaled devices.

2013 - RTN analysis with FHMM as a tool for multi-trap characterization in HfOx RRAM [Relazione in Atti di Convegno]
PUGLISI, Francesco Maria; PAVAN, Paolo
abstract

2013 - RTS Noise Characterization of HfOx RRAM in High Resistive State [Articolo su rivista]
Puglisi, Francesco Maria; Pavan, Paolo; Padovani, Andrea; Larcher, Luca; G., Bersuker
abstract

In this paper we analyze Random Telegraph Signal (RTS) noise cand Power Spectral Density (PSD) in hafnium-based RRAMs. RTS measured in HRS exhibits fast and slow multilevel switching events. RTS characteristics are examined through novel color-coded time-lag plots and Hidden Markov Model (HMM) time-series analyses. Results are validated by comparing simulated and experimental PSD. Noise is examined at different reset conditions to provide an insight into the conduction mechanisms in HRS. Higher reset voltages are found to result in greater RTS complexity due to a larger number of active traps as confirmed by PSD.

2013 - Random Telegraph Noise analysis to investigate the properties of active traps of HfO2-Based RRAM in HRS [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo; Padovani, Andrea; Larcher, Luca
abstract

This paper presents statistical characterization of Random Telegraph Noise (RTN) in hafnium-oxide-based Resistive Random Access Memories (RRAMs) in High Resistive State (HRS). Complex RTN signals are analyzed exploiting a Factorial Hidden Markov Model (FHMM) approach, allowing to derive the statistical properties of traps responsible of the multi-level RTN measured in these devices. Noise characteristics in different reset conditions are explored to prove the existence of a direct relation between the reset voltage, the volume of the dielectric barrier created during the reset operation and the number of active traps contributing to the RTN.

2012 - Random Telegraph Signal Noise Properties of HfOx RRAM in High Resistive States [Relazione in Atti di Convegno]
Puglisi, Francesco Maria; Pavan, Paolo; Padovani, Andrea; Larcher, Luca; G., Bersuker
abstract

In this paper we analyze Random Telegraph Signal (RTS) noise in hafnium-based RRAMs. RTS is measured in HRS, showing fast and slow multilevel switching events. RTS characteristics are examined through novel color-coded time-lag plots and Hidden Markov Model (HMM) time-series analyses. Noise is examined at different reset conditions to provide new insights on conduction mechanisms in HRS. Higher reset voltages result in an enhanced complexity in RTS due to a larger number of active traps

Università degli studi di Modena e Reggio Emilia

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