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Dipartimento di Ingegneria "Enzo Ferrari"

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2022 - Importance of Charge Trapping/Detrapping Involving the Gate Electrode on the Noise Currents of Scaled MOSFETs [Articolo su rivista]
Asanovski, R.; Palestri, P.; Selmi, L.

Carrier trapping/detrapping from/to the gate into dielectric traps is often neglected when modeling noise in MOSFETs and, to the best of our knowledge, no systematic study of its impacts on scaled devices is available. In this article, we show that this trapping mechanism cannot be neglected in nowadays aggressively scaled gate dielectric thicknesses without causing errors up to several orders of magnitude in the estimation of the drain current noise. The noise generation mechanism is modeled analytically and then analyzed through the use of 2-D and 3-D TCAD simulations of scaled MOSFETs with different architectures and channel/gate-stack materials. The results provide new insights for technology and device designers, highlight the relevance of the choice of the gate metal work function (WF) and the role of valence band electron trapping at high gate voltages.

2022 - On the accuracy of the formula used to extract trap density in MOSFETs from 1/f noise [Relazione in Atti di Convegno]
Asanovski, R.; Palestri, P.; Selmi, L.

Noise spectroscopy is a powerful non-destructive technique to characterize the quality of gate dielectrics in MOSFETs. Trap densities are routinely extracted by fitting the 1/f part of the drain current noise spectrum with a widely known analytical expression containing several approximations within. This paper compares this 1/f noise analytical expression with microscopic simulations, evaluates its accuracy under different scenarios, and highlights when the main assumptions fall short. It is found that the expression agrees well with non-radiative multi-phonon (NMP) models at room temperature for devices featuring a thick dielectric. However, the formula fails to correctly predict the noise of nowadays aggressively scaled devices, because it neglects trapping/de-trapping with the gate electrode and the electrostatic charge scaling of the traps due to their distance from the channel.

2021 - A Comprehensive Gate and Drain Trapping/Detrapping Noise Model and Its Implications for Thin-Dielectric MOSFETs [Articolo su rivista]
Asanovski, R.; Palestri, P.; Caruso, E.; Selmi, L.

We derive a complete set of expressions for the MOSFET gate and drain power spectral densities due to elastic and inelastic trapping/detrapping of channel carriers into the gate dielectric. Our calculations explain trapping/detrapping noise (TDN) in various FET operating regions and highlight trap's position-dependent terms, often neglected in the literature, which are instead important for devices with thin gate dielectrics. Furthermore, we show that TDN has a contribution to the gate current noise, correlated with the drain current fluctuations and we highlight the role of the transfer function between channel charge fluctuations and drain current on the noise characteristics. The model expressions are carefully validated by comparison with 2-D and 3-D TCAD simulations of scaled MOSFETs with different architectures (bulk, fully depleted-silicon-on-insulator (FD-SOI), FinFET), channel, and gate materials. Besides shedding new light on TDN, the results could enable trap density extraction from experimental samples with improved accuracy and pave the way to complete and accurate compact models for TDN in MOSFETs.

2020 - 1/f noise model based on trap-assisted tunneling for ultra-thin oxides MOSFETs [Abstract in Atti di Convegno]
Caruso, Enrico; Palestri, Pierpaolo; Selmi, Luca; Asanovski, Ruben

We derive an analytical model for 1/f noise in MOSFETs, highlighting a term that is often neglected in literature but becomes important for ultra-thin oxides. Furthermore, we identify an interesting relationship between the thermal noise of the gate impedance and the gate noise due to trapping/detrapping between the free carriers in the channel and the oxide traps, as well as the 1/f noise cross-correlation between drain and gate, showing that a single voltage noise generator is not enough to describe completely the 1/f noise. TCAD simulations are used to verify the model predictive capabilities.