Università degli studi di Modena e Reggio Emilia

We report self-consistent electrothermal simulations of large RF FinFET structures accounting for the multiscale effects of large BEOL metallizations and nanoscale device dimensions. A 6 fins x 4 fingers (24 channels) elementary cells is taken as a template reference device inspired by large RF transistors in 14-25 nm FinFET technology. Thermal resistances are extracted by means of the so-called AC small signal technique. The results highlight the sensitivity of the Rth to numerous geometrical and technological parameters, and the detrimental impact that reduced fin width and interfaces have on the thermal conductivity. The average temperature increase computed from the simulated thermal resistance provides useful guidelines for the design of RF FinFETs with lower maximum temperature, improved self-heating effects and reliability.