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LORENZO BENATTI

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Dipartimento di Ingegneria "Enzo Ferrari"

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Pubblicazioni

2023 - Biologically Plausible Information Propagation in a CMOS Integrate-and-Fire Artificial Neuron Circuit with Memristive Synapses [Articolo su rivista]
Benatti, Lorenzo; Zanotti, Tommaso; Gandolfi, Daniela; Mapelli, Jonathan; Puglisi, Francesco Maria
abstract

Neuromorphic circuits based on spikes are currently envisioned as a viable option to achieve brain-like computation capabilities in specific electronic implementations while limiting power dissipation given their ability to mimic energy efficient bio-inspired mechanisms. While several network architectures have been developed to embed in hardware the bio-inspired learning rules found in the biological brain, such as the Spike Timing Dependent Plasticity, it is still unclear if hardware spiking neural network architectures can handle and transfer information akin to biological networks. In this work, we investigate the analogies between an artificial neuron combining memristor synapses and rate-based learning rule with biological neuron response in terms of information propagation from a theoretical perspective. Bio-inspired experiments have been reproduced by linking the biological probability of release with the artificial synapses conductance. Mutual information and surprise have been chosen as metrics to evidence how, for different values of synaptic weights, an artificial neuron allows to develop a reliable and biological resembling neural network in terms of information propagation and analysis

2023 - Linking the Intrinsic Electrical Response of Ferroelectric Devices to Material Properties by means of Impedance Spectroscopy [Articolo su rivista]
Benatti, L.; Vecchi, S.; Puglisi, F. M.
abstract

Ferroelectric devices have gained attention in recent years as a potential solution for ultra-low power computing due to their ability to act as memory units and synaptic weights in brain-inspired architectures. One way to study the behavior of these devices under different conditions, particularly the influence of material composition and charge trapping on ferroelectric switching, is through impedance spectroscopy. However, the parasitic impedance of the metal lines that contact the electrodes of the device can affect the measured response and interpretation of the results. In this study, we examined the frequency response of ferroelectric tunnel junctions (FTJs) with a metal-dielectric-ferroelectric-metal (MDFM) stack at various voltages, starting from the analysis of single layer capacitors (MFM and MDM) to better interpret FTJ’s results. To accurately assess the intrinsic response of the device, we developed a method that estimates and removes the parasitic access impedance contribution, which was validated by means of physics-based simulations. This method allows quantifying the intrinsic device-level variability of FTJs and, for the first time, to investigate the relation between the thickness of the dielectric layer, the equivalent phase composition of the ferroelectric material, and the magnitude of the peak in the frequency response, often assumed to be related to charge trapping only.

2023 - The Role of Defects and Interface Degradation on Ferroelectric HZO Capacitors Aging [Relazione in Atti di Convegno]
Benatti, L.; Vecchi, S.; Pesic, M.; Puglisi, F. M.
abstract

2023 - Ultra-low power logic in memory with commercial grade memristors and FPGA-based smart-IMPLY architecture [Articolo su rivista]
Benatti, L; Zanotti, T; Pavan, P; Puglisi, Fm
abstract

Reducing power consumption in nowadays computer technologies represents an increasingly difficult challenge. Conventional computing architectures suffer from the so-called von Neumann bottleneck (VNB), which consists in the continuous need to exchange data and instructions between the memory and the processing unit, leading to significant and apparently unavoidable power consumption. Even the hardware typically employed to run Artificial Intelligence (AI) algorithms, such as Deep Neural Networks (DNN), suffers from this limitation. A change of paradigm is so needed to comply with the ever-increasing demand for ultra-low power, autonomous, and intelligent systems. From this perspective, emerging memristive non-volatile memories are considered a good candidate to lead this technological transition toward the next-generation hardware platforms, enabling the possibility to store and process information in the same place, therefore bypassing the VNB. To evaluate the state of current public-available devices, in this work commercial-grade packaged Self Directed Channel memristors are thoroughly studied to evaluate their performance in the framework of in-memory computing. Specifically, the operating conditions allowing both analog update of the synaptic weight and stable binary switching are identified, along with the associated issues. To this purpose, a dedicated yet prototypical system based on an FPGA control platform is designed and realized. Then, it is exploited to fully characterize the performance in terms of power consumption of an innovative Smart IMPLY (SIMPLY) Logic-in-Memory (LiM) computing framework that allows reliable in-memory computation of classical Boolean operations. The projection of these results to the nanoseconds regime leads to an estimation of the real potential of this computing paradigm. Although not investigated in this work, the presented platform can also be exploited to test memristor-based SNN and Binarized DNNs (i.e., BNN), that can be combined with LiM to provide the heterogeneous flexible architecture envisioned as the long-term goal for ubiquitous and pervasive AI.

2022 - A Hybrid CMOS-Memristor Spiking Neural Network Supporting Multiple Learning Rules [Articolo su rivista]
Florini, Davide; Gandolfi, Daniela; Mapelli, Jonathan; Benatti, Lorenzo; Pavan, Paolo; Puglisi, Francesco Maria
abstract

Artificial intelligence (AI) is changing the way computing is performed to cope with real-world, ill-defined tasks for which traditional algorithms fail. AI requires significant memory access, thus running into the von Neumann bottleneck when implemented in standard computing platforms. In this respect, low-latency energy-efficient in-memory computing can be achieved by exploiting emerging memristive devices, given their ability to emulate synaptic plasticity, which provides a path to design large-scale brain-inspired spiking neural networks (SNNs). Several plasticity rules have been described in the brain and their coexistence in the same network largely expands the computational capabilities of a given circuit. In this work, starting from the electrical characterization and modeling of the memristor device, we propose a neuro-synaptic architecture that co-integrates in a unique platform with a single type of synaptic device to implement two distinct learning rules, namely, the spike-timing-dependent plasticity (STDP) and the Bienenstock-Cooper-Munro (BCM). This architecture, by exploiting the aforementioned learning rules, successfully addressed two different tasks of unsupervised learning.

2022 - Combining Experiments and a Novel Small Signal Model to Investigate the Degradation Mechanisms in Ferroelectric Tunnel Junctions [Relazione in Atti di Convegno]
Benatti, L.; Pavan, P.; Puglisi, F. M.
abstract

2022 - Effect of cycling on ultra-thin HfZrO4, ferroelectric synaptic weights [Articolo su rivista]
Bégon-Lours, Laura; Halter, Mattia; Sousa, Marilyne; Popoff, Youri; Dávila Pineda, Diana; Falcone, Donato Francesco; Yu, Zhenming; Reidt, Steffen; Benatti, Lorenzo; Puglisi, Francesco Maria; Offrein, Bert Jan
abstract

2022 - Impedance Investigation of MIFM Ferroelectric Tunnel Junction using a Comprehensive Small-Signal Model [Articolo su rivista]
Benatti, L.; Puglisi, F. M.
abstract

The urge to develop efficient and ultra-low power architectures for modern and future technological needs lead to an increasing interest and investigation of neuromorphic and ultra-low power computing. In this respect, ferroelectric technology is found to be a perfect candidate to guide this technological transition. Elucidating the physical mechanisms occurring during ferroelectric-based devices operations is fundamental in order to improve the reliability of emerging architectures. In this work, we investigate metal/insulator/ferroelectric/metal (MIFM) ferroelectric tunnel junctions (FTJs) consisting of a ferroelectric hafnium zirconium oxide (HZO) layer and an alumina (Al2O3) layer by means of C-f and G-f measurements performed at multiple voltages and temperatures. For a trustworthy interpretation of the measurements results, an innovative small signal model is introduced that goes beyond the state of the art by i) separating the role played by the leakage in the two layers; ii) including the impact of the series impedance (that depends on the samples layout); iii) including the frequency dependence of the dielectric permittivity; iv) accounting for the fact that not the whole HZO volume crystallizes in the orthorhombic ferroelectric phase. The model correctly reproduces measurements taken on different devices in different conditions. Results highlight that the typical estimation method for interface trap density may be misleading.

2022 - Impedance Spectroscopy of Ferroelectric Capacitors and Ferroelectric Tunnel Junctions [Relazione in Atti di Convegno]
Benatti, L.; Vecchi, S.; Puglisi, F. M.
abstract

Ferroelectric devices are currently considered as a viable option for ultra-low power computing, thanks to their ability to act as memory units and synaptic weights in brain inspired architectures. A common methodology to assess their response in different conditions (especially the role of material composition and charge trapping in ferroelectric switching) is impedance spectroscopy. However, test devices may be affected by the parasitic impedance of the metal lines contacting the electrodes of the device, which may alter the measured response and the results interpretation. In this work, we investigate the frequency response at different voltages of ferroelectric tunnel junction (FTJ) having a metal-dielectric-ferroelectric-metal (MDFM) stack, starting from the analysis of single layer capacitors (MFM and MDM). A simple but reliable method, validated by physics-based simulations, is proposed to estimate and remove the parasitic access impedance contribution, revealing the intrinsic device response. The method is used to quantify the intrinsic device-level variability of FTJs and to highlight for the first time the relation between the thickness of the dielectric layer, the phase composition of the ferroelectric, and the magnitude of the peak in the frequency response, usually thought as related to charge trapping only.

2022 - Scaled, Ferroelectric Memristive Synapse for Back-End-of-Line Integration with Neuromorphic Hardware [Articolo su rivista]
Begon-Lours, L.; Halter, M.; Puglisi, F. M.; Benatti, L.; Falcone, D. F.; Popoff, Y.; Davila Pineda, D.; Sousa, M.; Offrein, B. J.
abstract

Ohmic, memristive synaptic weights are fabricated with a back-end-of-line compatible process, based on a 3.5 nm HfZrO4 thin film crystallized in the ferroelectric phase at only 400 °C. The current density is increased by three orders of magnitude compared to the state-of-the-art. The use of a metallic oxide interlayer, WOx, allows excellent retention (only 6% decay after 106 s) and endurance (1010 full switching cycles). The On/Off of 7 and the small device-to-device variability (<5%) make them promising candidates for neural networks inference. The synaptic functionality for online learning is also demonstrated: using pulses of increasing (resp. constant) amplitude and constant (resp. increasing) duration, emulating spike-timing (resp. spike-rate) dependent plasticity. Writing with 20 ns pulses only dissipate femtojoules. The cycle-to-cycle variation is below 2%. The training accuracy (MNIST) of a neural network is estimated to reach 92% after 36 epochs. Temperature-dependent experiments reveal the presence of allowed states for charge carriers within the bandgap of hafnium zirconate. Upon polarization switching, the screening of the polarization by mobile charges (that can be associated with oxygen vacancies and/or ions) within the ferroelectric layer modifies the energy profile of the conduction band and the bulk transport properties.

2021 - Understanding the Reliability of Ferroelectric Tunnel Junction Operations using an Advanced Small-Signal Model [Relazione in Atti di Convegno]
Benatti, Lorenzo; Puglisi, Francesco Maria
abstract

Ferroelectric technology is becoming ever more appealing for a variety of applications, especially analog neuromorphic computing. In this respect, elucidating the physical mechanisms occurring during device operation is of key importance to improve the reliability of ferroelectric devices. In this work, we investigate ferroelectric tunnel junctions (FTJs) consisting of a ferroelectric hafnium zirconium oxide (HZO) layer and an alumina (Al 2 O 3 ) layer by means of C-f and G-f measurements performed at multiple voltages and temperatures. For a dependable interpretation of the results, a new small signal model is introduced that goes beyond the state of the art by i) separating the role of the leakage in the two layers; ii) including the significant impact of the series impedance (that depends on the samples layout); iii) including the frequency dependence of the dielectric permittivity; iv) accounting for the fact that likely not the whole HZO volume crystallizes in the orthorhombic ferroelectric phase. The model correctly reproduces measurements taken on different devices in different conditions. Results highlight that the typical estimation method for interface trap density may be misleading.